diff --git a/cuda-oxide/crates/cuda-device/src/generated/async_copy.rs b/cuda-oxide/crates/cuda-device/src/generated/async_copy.rs index 7a0f911070..066e319591 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/async_copy.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/async_copy.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::async_copy` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/atomic.rs b/cuda-oxide/crates/cuda-device/src/generated/atomic.rs index 67ee992d23..f72cbc70df 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/atomic.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::atomic` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/bf16.rs b/cuda-oxide/crates/cuda-device/src/generated/bf16.rs index ca33fc259d..5e82cd759f 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/bf16.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/bf16.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::bf16` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/bf16x2.rs b/cuda-oxide/crates/cuda-device/src/generated/bf16x2.rs index d8a67a77ca..d2101058e4 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/bf16x2.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/bf16x2.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::bf16x2` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/clc.rs b/cuda-oxide/crates/cuda-device/src/generated/clc.rs index 966eb38a39..07ddee02a1 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/clc.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::clc` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/cluster_barrier.rs b/cuda-oxide/crates/cuda-device/src/generated/cluster_barrier.rs index a704ad9652..ab14cbbd65 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/cluster_barrier.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::cluster` to keep public paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/cluster_memory.rs b/cuda-oxide/crates/cuda-device/src/generated/cluster_memory.rs index 3c8fa79ec3..7a04e1329b 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/cluster_memory.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::cluster` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/cluster_sreg.rs b/cuda-oxide/crates/cuda-device/src/generated/cluster_sreg.rs index 7820114fbd..be19904042 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/cluster_sreg.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/cluster_sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // This file is included inside `cuda_device::cluster`. diff --git a/cuda-oxide/crates/cuda-device/src/generated/convert.rs b/cuda-oxide/crates/cuda-device/src/generated/convert.rs index 35970bd5d8..7c93c5142e 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/convert.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/convert.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::convert`. diff --git a/cuda-oxide/crates/cuda-device/src/generated/counted_barrier.rs b/cuda-oxide/crates/cuda-device/src/generated/counted_barrier.rs index b941b8a5bb..a4187ac665 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/counted_barrier.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/counted_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::barrier` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/debug_control.rs b/cuda-oxide/crates/cuda-device/src/generated/debug_control.rs index a54274bb6c..dff7317593 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/debug_control.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::debug` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/debug_sreg.rs b/cuda-oxide/crates/cuda-device/src/generated/debug_sreg.rs index 1be0474951..5900086ec9 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/debug_sreg.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/debug_sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::debug` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/dotprod.rs b/cuda-oxide/crates/cuda-device/src/generated/dotprod.rs index d93a6e5925..edd7b6d3cc 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/dotprod.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::dotprod` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/f16.rs b/cuda-oxide/crates/cuda-device/src/generated/f16.rs index 40c0334d6e..483a898e57 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/f16.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/f16.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::f16` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/f16x2.rs b/cuda-oxide/crates/cuda-device/src/generated/f16x2.rs index 4118c4cb83..8d59c69648 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/f16x2.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/f16x2.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::f16x2` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/f32x2.rs b/cuda-oxide/crates/cuda-device/src/generated/f32x2.rs index ae23507b76..72b0e71cec 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/f32x2.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/f32x2.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::f32x2` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/fence.rs b/cuda-oxide/crates/cuda-device/src/generated/fence.rs index 6c0eae9600..27f2bc6cfb 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/fence.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/fence.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // This file is included inside `cuda_device::fence` so existing paths stay stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/float.rs b/cuda-oxide/crates/cuda-device/src/generated/float.rs index 7438a673c3..17cd362e7e 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/float.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/float.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::float`. diff --git a/cuda-oxide/crates/cuda-device/src/generated/grid_dependency.rs b/cuda-oxide/crates/cuda-device/src/generated/grid_dependency.rs index 02fd87444a..b358ee03fc 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/grid_dependency.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/grid_dependency.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::grid` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/grid_sreg.rs b/cuda-oxide/crates/cuda-device/src/generated/grid_sreg.rs index 6745481b5a..edcdfd55fc 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/grid_sreg.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/grid_sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::grid` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/i16x2.rs b/cuda-oxide/crates/cuda-device/src/generated/i16x2.rs index 4ff8b83d36..38b8ce5b4d 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/i16x2.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/i16x2.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::i16x2` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/int.rs b/cuda-oxide/crates/cuda-device/src/generated/int.rs index d69f7999e5..ae635e6560 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/int.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/int.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::int` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/ldmatrix.rs b/cuda-oxide/crates/cuda-device/src/generated/ldmatrix.rs index ed3eb25000..083ee131fb 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/ldmatrix.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::wmma` to keep public paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/mbarrier_basic.rs b/cuda-oxide/crates/cuda-device/src/generated/mbarrier_basic.rs index 3de723ea87..3d113adcae 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/mbarrier_basic.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::barrier` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/mbarrier_extended.rs b/cuda-oxide/crates/cuda-device/src/generated/mbarrier_extended.rs index eb5b4cc387..bfc2cc6104 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/mbarrier_extended.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::barrier` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/movmatrix.rs b/cuda-oxide/crates/cuda-device/src/generated/movmatrix.rs index 12fabfbd99..51d18231fa 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/movmatrix.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::wmma` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/prmt.rs b/cuda-oxide/crates/cuda-device/src/generated/prmt.rs index 601a4ab647..643e8af6d5 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/prmt.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::prmt` to keep the public paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/register_control.rs b/cuda-oxide/crates/cuda-device/src/generated/register_control.rs index 8dfc5f6e85..25486e306e 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/register_control.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/register_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::thread` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/register_mma.rs b/cuda-oxide/crates/cuda-device/src/generated/register_mma.rs index e6bcd21bd6..5710a7ecd2 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/register_mma.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/register_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::wmma` to keep public paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/shared_sreg.rs b/cuda-oxide/crates/cuda-device/src/generated/shared_sreg.rs index 2eaceca7a3..99c4bdb8a8 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/shared_sreg.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/shared_sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::shared` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/sparse_mma.rs b/cuda-oxide/crates/cuda-device/src/generated/sparse_mma.rs index 7dfb3bd1ed..c683044489 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/sparse_mma.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::wmma` to keep public paths stable. @@ -209,6 +209,174 @@ pub unsafe fn mma_sp_m16n8k128_s32_u4_satfinite( unreachable!("mma_sp_m16n8k128_s32_u4_satfinite called outside CUDA kernel context") } +/// Multiplies warp-distributed sparse f16 A and B fragments and adds a packed f16 accumulator. +/// Lowers to `mma.sp.sync.aligned.m16n8k16.row.col.f16.f16.f16.f16`. C, A, B, and metadata are this lane's PTX fragments. +/// Requires PTX 7.1 and `sm_80+`. +/// +/// # Safety +/// All 32 lanes must execute the same instruction with the same qualifiers, and no lane may have exited. +/// `c`, `a`, and `b` must contain this lane's 2-, 2-, and 2-register fragments; `metadata` must contain its sparse metadata. +/// Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. +/// `selector` must be the compile-time constant `0`, `1`, `2`, or `3`. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +/// This register-only operation is not a memory fence. +#[must_use] +#[inline(never)] +pub unsafe fn mma_sp_m16n8k16_f16_f16( + c: [u32; 2], + a: [u32; 2], + b: [u32; 2], + metadata: u32, + selector: u32, +) -> [u32; 2] { + let _ = (c, a, b, metadata, selector); + unreachable!("mma_sp_m16n8k16_f16_f16 called outside CUDA kernel context") +} + +/// Multiplies warp-distributed sparse bf16 A and B fragments and adds a f32 accumulator. +/// Lowers to `mma.sp.sync.aligned.m16n8k16.row.col.f32.bf16.bf16.f32`. C, A, B, and metadata are this lane's PTX fragments. +/// Requires PTX 7.1 and `sm_80+`. +/// +/// # Safety +/// All 32 lanes must execute the same instruction with the same qualifiers, and no lane may have exited. +/// `c`, `a`, and `b` must contain this lane's 4-, 2-, and 2-register fragments; `metadata` must contain its sparse metadata. +/// Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. +/// `selector` must be the compile-time constant `0`, `1`, `2`, or `3`. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +/// This register-only operation is not a memory fence. +#[must_use] +#[inline(never)] +pub unsafe fn mma_sp_m16n8k16_f32_bf16( + c: [f32; 4], + a: [u32; 2], + b: [u32; 2], + metadata: u32, + selector: u32, +) -> [f32; 4] { + let _ = (c, a, b, metadata, selector); + unreachable!("mma_sp_m16n8k16_f32_bf16 called outside CUDA kernel context") +} + +/// Multiplies warp-distributed sparse f16 A and B fragments and adds a f32 accumulator. +/// Lowers to `mma.sp.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32`. C, A, B, and metadata are this lane's PTX fragments. +/// Requires PTX 7.1 and `sm_80+`. +/// +/// # Safety +/// All 32 lanes must execute the same instruction with the same qualifiers, and no lane may have exited. +/// `c`, `a`, and `b` must contain this lane's 4-, 2-, and 2-register fragments; `metadata` must contain its sparse metadata. +/// Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. +/// `selector` must be the compile-time constant `0`, `1`, `2`, or `3`. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +/// This register-only operation is not a memory fence. +#[must_use] +#[inline(never)] +pub unsafe fn mma_sp_m16n8k16_f32_f16( + c: [f32; 4], + a: [u32; 2], + b: [u32; 2], + metadata: u32, + selector: u32, +) -> [f32; 4] { + let _ = (c, a, b, metadata, selector); + unreachable!("mma_sp_m16n8k16_f32_f16 called outside CUDA kernel context") +} + +/// Multiplies warp-distributed sparse tf32 A and B fragments and adds a f32 accumulator. +/// Lowers to `mma.sp.sync.aligned.m16n8k16.row.col.f32.tf32.tf32.f32`. C, A, B, and metadata are this lane's PTX fragments. +/// Requires PTX 7.1 and `sm_80+`. +/// +/// # Safety +/// All 32 lanes must execute the same instruction with the same qualifiers, and no lane may have exited. +/// `c`, `a`, and `b` must contain this lane's 4-, 4-, and 4-register fragments; `metadata` must contain its sparse metadata. +/// Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. +/// `selector` must be the compile-time constant `0` or `1`. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +/// This register-only operation is not a memory fence. +#[must_use] +#[inline(never)] +pub unsafe fn mma_sp_m16n8k16_f32_tf32( + c: [f32; 4], + a: [u32; 4], + b: [u32; 4], + metadata: u32, + selector: u32, +) -> [f32; 4] { + let _ = (c, a, b, metadata, selector); + unreachable!("mma_sp_m16n8k16_f32_tf32 called outside CUDA kernel context") +} + +/// Multiplies warp-distributed sparse f16 A and B fragments and adds a packed f16 accumulator. +/// Lowers to `mma.sp.sync.aligned.m16n8k32.row.col.f16.f16.f16.f16`. C, A, B, and metadata are this lane's PTX fragments. +/// Requires PTX 7.1 and `sm_80+`. +/// +/// # Safety +/// All 32 lanes must execute the same instruction with the same qualifiers, and no lane may have exited. +/// `c`, `a`, and `b` must contain this lane's 2-, 4-, and 4-register fragments; `metadata` must contain its sparse metadata. +/// Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. +/// `selector` must be the compile-time constant `0` or `1`. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +/// This register-only operation is not a memory fence. +#[must_use] +#[inline(never)] +pub unsafe fn mma_sp_m16n8k32_f16_f16( + c: [u32; 2], + a: [u32; 4], + b: [u32; 4], + metadata: u32, + selector: u32, +) -> [u32; 2] { + let _ = (c, a, b, metadata, selector); + unreachable!("mma_sp_m16n8k32_f16_f16 called outside CUDA kernel context") +} + +/// Multiplies warp-distributed sparse bf16 A and B fragments and adds a f32 accumulator. +/// Lowers to `mma.sp.sync.aligned.m16n8k32.row.col.f32.bf16.bf16.f32`. C, A, B, and metadata are this lane's PTX fragments. +/// Requires PTX 7.1 and `sm_80+`. +/// +/// # Safety +/// All 32 lanes must execute the same instruction with the same qualifiers, and no lane may have exited. +/// `c`, `a`, and `b` must contain this lane's 4-, 4-, and 4-register fragments; `metadata` must contain its sparse metadata. +/// Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. +/// `selector` must be the compile-time constant `0` or `1`. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +/// This register-only operation is not a memory fence. +#[must_use] +#[inline(never)] +pub unsafe fn mma_sp_m16n8k32_f32_bf16( + c: [f32; 4], + a: [u32; 4], + b: [u32; 4], + metadata: u32, + selector: u32, +) -> [f32; 4] { + let _ = (c, a, b, metadata, selector); + unreachable!("mma_sp_m16n8k32_f32_bf16 called outside CUDA kernel context") +} + +/// Multiplies warp-distributed sparse f16 A and B fragments and adds a f32 accumulator. +/// Lowers to `mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32`. C, A, B, and metadata are this lane's PTX fragments. +/// Requires PTX 7.1 and `sm_80+`. +/// +/// # Safety +/// All 32 lanes must execute the same instruction with the same qualifiers, and no lane may have exited. +/// `c`, `a`, and `b` must contain this lane's 4-, 4-, and 4-register fragments; `metadata` must contain its sparse metadata. +/// Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. +/// `selector` must be the compile-time constant `0` or `1`. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +/// This register-only operation is not a memory fence. +#[must_use] +#[inline(never)] +pub unsafe fn mma_sp_m16n8k32_f32_f16( + c: [f32; 4], + a: [u32; 4], + b: [u32; 4], + metadata: u32, + selector: u32, +) -> [f32; 4] { + let _ = (c, a, b, metadata, selector); + unreachable!("mma_sp_m16n8k32_f32_f16 called outside CUDA kernel context") +} + /// Multiplies warp-distributed sparse signed A and signed B INT8 fragments and adds a wrapping s32 accumulator. /// Lowers to `mma.sp.sync.aligned.m16n8k32.row.col.s32.s8.s8.s32`. C, A, B, and metadata are this lane's PTX fragments. /// Requires PTX 7.1 and `sm_80+`. @@ -905,6 +1073,30 @@ pub unsafe fn mma_sp_m16n8k64_s32_u8_satfinite( unreachable!("mma_sp_m16n8k64_s32_u8_satfinite called outside CUDA kernel context") } +/// Multiplies warp-distributed sparse tf32 A and B fragments and adds a f32 accumulator. +/// Lowers to `mma.sp.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32`. C, A, B, and metadata are this lane's PTX fragments. +/// Requires PTX 7.1 and `sm_80+`. +/// +/// # Safety +/// All 32 lanes must execute the same instruction with the same qualifiers, and no lane may have exited. +/// `c`, `a`, and `b` must contain this lane's 4-, 2-, and 2-register fragments; `metadata` must contain its sparse metadata. +/// Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. +/// `selector` must be the compile-time constant `0`, `1`, `2`, or `3`. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +/// This register-only operation is not a memory fence. +#[must_use] +#[inline(never)] +pub unsafe fn mma_sp_m16n8k8_f32_tf32( + c: [f32; 4], + a: [u32; 2], + b: [u32; 2], + metadata: u32, + selector: u32, +) -> [f32; 4] { + let _ = (c, a, b, metadata, selector); + unreachable!("mma_sp_m16n8k8_f32_tf32 called outside CUDA kernel context") +} + /// Multiplies warp-distributed sparse signed A and signed B INT4 fragments with ordered sparsity metadata and adds a wrapping s32 accumulator. /// Lowers to `mma.sp::ordered_metadata.sync.aligned.m16n8k128.row.col.s32.s4.s4.s32`. C, A, B, and metadata are this lane's PTX fragments. /// Requires PTX 8.5 and `sm_80+`. diff --git a/cuda-oxide/crates/cuda-device/src/generated/sreg.rs b/cuda-oxide/crates/cuda-device/src/generated/sreg.rs index 3634cf8a0e..e6b260d8e8 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/sreg.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // This file is included lexically inside `cuda_device::thread` so existing diff --git a/cuda-oxide/crates/cuda-device/src/generated/stmatrix.rs b/cuda-oxide/crates/cuda-device/src/generated/stmatrix.rs index 2863fbf1f9..1640dc4619 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/stmatrix.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::tcgen05` to keep public paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/tcgen05.rs b/cuda-oxide/crates/cuda-device/src/generated/tcgen05.rs index 4efa57fc4f..6352adcfa0 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/tcgen05.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/tcgen05.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::tcgen05` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/tma.rs b/cuda-oxide/crates/cuda-device/src/generated/tma.rs index d716ca7d9e..f3b5cc6d5b 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/tma.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::tma` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/warp_sreg.rs b/cuda-oxide/crates/cuda-device/src/generated/warp_sreg.rs index 6630593fb4..8e49966053 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/warp_sreg.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/warp_sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::warp` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/wgmma_control.rs b/cuda-oxide/crates/cuda-device/src/generated/wgmma_control.rs index 68d9c4d252..bc9221f978 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/wgmma_control.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::wgmma` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-intrinsics-gen/src/model/overlay.rs b/cuda-oxide/crates/cuda-intrinsics-gen/src/model/overlay.rs index 2a7dd95c58..fe2ae468a6 100644 --- a/cuda-oxide/crates/cuda-intrinsics-gen/src/model/overlay.rs +++ b/cuda-oxide/crates/cuda-intrinsics-gen/src/model/overlay.rs @@ -75,7 +75,7 @@ pub struct OverlayShardFile { #[serde(default)] pub sparse_mma_fp8_f32: Option, #[serde(default)] - pub sparse_mma_ordered_ampere_float: Option, + pub sparse_mma_ampere_float: Option, #[serde(default)] pub prmt: Option, #[serde(default)] @@ -780,21 +780,24 @@ pub struct SparseMmaFp8F32Admission { pub product_count: usize, } -/// Compact admission for the reviewed ordered-metadata Ampere floating sparse MMA forms. +/// Compact admission for the reviewed Ampere floating sparse MMA forms. +/// `metadata` selects standard or ordered sparsity; identity and the PTX floor +/// are derived from that axis. #[derive(Debug, Clone, Deserialize)] #[serde(deny_unknown_fields)] -pub struct SparseMmaOrderedAmpereFloatAdmission { +pub struct SparseMmaAmpereFloatAdmission { pub llvm_evidence_profile: String, pub libnvvm_evidence_profile: String, pub runtime_validation: RuntimeValidation, + pub metadata: SparseMmaMetadata, #[serde(rename = "variant")] - pub variants: Vec, + pub variants: Vec, } -/// One reviewed ordered-metadata Ampere floating sparse MMA form. +/// One reviewed Ampere floating sparse MMA form. #[derive(Debug, Clone, Copy, PartialEq, Eq, Deserialize)] #[serde(deny_unknown_fields)] -pub struct SparseMmaOrderedAmpereFloatVariant { +pub struct SparseMmaAmpereFloatVariant { pub shape: SparseMmaShape, pub accumulator: SparseMmaAccumulator, pub element: SparseMmaElement, diff --git a/cuda-oxide/crates/cuda-intrinsics-gen/src/render/families/mma.rs b/cuda-oxide/crates/cuda-intrinsics-gen/src/render/families/mma.rs index 87ddd80577..a19021b8a6 100644 --- a/cuda-oxide/crates/cuda-intrinsics-gen/src/render/families/mma.rs +++ b/cuda-oxide/crates/cuda-intrinsics-gen/src/render/families/mma.rs @@ -363,6 +363,11 @@ pub(in crate::render) const SPARSE_MMA_STANDARD_METADATA_RULE: &str = "Every 4-b pub(in crate::render) const SPARSE_MMA_ORDERED_METADATA_RULE: &str = "Every 4-bit metadata group must be `0x4`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior."; pub(in crate::render) const SPARSE_MMA_ORDERED_TF32_METADATA_RULE: &str = "Every 4-bit metadata group must be `0x4` or `0xe`; any other value is undefined behavior."; +// The ISA lists twelve codes (any two distinct 2-bit indices; 0x0, 0x5, 0xa, +// 0xf are undefined). The six ascending codes are 0x4, 0x8, 0x9, 0xc, 0xd, +// 0xe, and sm_120 also honors 0x6. This is the supported set for plain +// 16-bit forms. +pub(in crate::render) const SPARSE_MMA_STANDARD_F16_BF16_METADATA_RULE: &str = "Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior."; pub(in crate::render) fn sparse_mma_metadata_rule(mma: &SparseMma) -> &'static str { match (mma.metadata, mma.a_element) { @@ -372,6 +377,9 @@ pub(in crate::render) fn sparse_mma_metadata_rule(mma: &SparseMma) -> &'static s (SparseMmaMetadata::Standard, SparseMmaElement::E4m3 | SparseMmaElement::E5m2) => { SPARSE_MMA_ORDERED_METADATA_RULE } + (SparseMmaMetadata::Standard, SparseMmaElement::F16 | SparseMmaElement::Bf16) => { + SPARSE_MMA_STANDARD_F16_BF16_METADATA_RULE + } (SparseMmaMetadata::Standard, _) => SPARSE_MMA_STANDARD_METADATA_RULE, (SparseMmaMetadata::Ordered, SparseMmaElement::Tf32) => { SPARSE_MMA_ORDERED_TF32_METADATA_RULE diff --git a/cuda-oxide/crates/cuda-intrinsics-gen/src/render/tests/mma.rs b/cuda-oxide/crates/cuda-intrinsics-gen/src/render/tests/mma.rs index b45c3afbae..40d0dfa684 100644 --- a/cuda-oxide/crates/cuda-intrinsics-gen/src/render/tests/mma.rs +++ b/cuda-oxide/crates/cuda-intrinsics-gen/src/render/tests/mma.rs @@ -7,7 +7,9 @@ use super::*; use crate::model::{ RegisterMmaAdapter, RegisterMmaCompatibilitySource, RegisterMmaKind, RuntimeValidation, - SparseMmaAccumulator, SparseMmaAdapter, SparseMmaShape, + SparseMma, SparseMmaAccumulator, SparseMmaAdapter, SparseMmaCompatibilitySource, + SparseMmaElement, SparseMmaLayout, SparseMmaLlvmAdapter, SparseMmaMetadata, SparseMmaOverflow, + SparseMmaParticipation, SparseMmaSelector, SparseMmaShape, }; use crate::render::collector_targets::generated_intrinsic_variant; use crate::render::common::intrinsic_marker; @@ -345,7 +347,7 @@ fn register_mma_rendering_preserves_apis_order_convergence_and_variants() { let repo_root = Path::new(env!("CARGO_MANIFEST_DIR")).join("../.."); let catalog = crate::resolve::resolve(&repo_root).unwrap(); validate_renderable(&catalog).unwrap(); - assert_eq!(catalog.intrinsics.len(), 1038); + assert_eq!(catalog.intrinsics.len(), 1046); let records: Vec<_> = register_mmas(&catalog).collect(); assert_eq!(records.len(), 154); let generated_records = records @@ -823,6 +825,50 @@ fn sparse_fp8_metadata_contract_requires_ordered_indices_without_changing_intege } } +#[test] +fn standard_ampere_float_16bit_metadata_rule_follows_the_metadata_axis() { + let plain_16bit = "Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior."; + let rule = |metadata, element| { + sparse_mma_metadata_rule(&SparseMma { + shape: SparseMmaShape::M16n8k16, + accumulator: SparseMmaAccumulator::F32, + a_element: element, + b_element: element, + a_layout: SparseMmaLayout::Row, + b_layout: SparseMmaLayout::Col, + overflow: SparseMmaOverflow::NotApplicable, + metadata, + selector: SparseMmaSelector::ImmediateZeroThroughThree, + participation: + SparseMmaParticipation::AllWarpLanesSameInstructionAndQualifiersNoExitedLanes, + adapter: SparseMmaAdapter::C4F32A2U32B2U32MetadataU32SelectorU32ToD4F32, + llvm_adapter: SparseMmaLlvmAdapter::A2I32B2I32C4F32MetadataI32SelectorI32ToD4F32, + compatibility_source: SparseMmaCompatibilitySource::GeneratedStub, + runtime_validation: RuntimeValidation::Unexecuted, + }) + }; + assert_eq!( + rule(SparseMmaMetadata::Standard, SparseMmaElement::Bf16), + plain_16bit + ); + assert_eq!( + rule(SparseMmaMetadata::Standard, SparseMmaElement::F16), + plain_16bit + ); + assert_eq!( + rule(SparseMmaMetadata::Standard, SparseMmaElement::Tf32), + SPARSE_MMA_STANDARD_METADATA_RULE + ); + assert_eq!( + rule(SparseMmaMetadata::Ordered, SparseMmaElement::Bf16), + SPARSE_MMA_ORDERED_METADATA_RULE + ); + assert_eq!( + rule(SparseMmaMetadata::Ordered, SparseMmaElement::Tf32), + SPARSE_MMA_ORDERED_TF32_METADATA_RULE + ); +} + #[test] fn sparse_mma_rendering_enforces_selector_and_keeps_family_distinct() { let repo_root = Path::new(env!("CARGO_MANIFEST_DIR")).join("../.."); @@ -841,7 +887,7 @@ fn sparse_mma_rendering_enforces_selector_and_keeps_family_distinct() { .iter() .filter(|record| record.sparse_mma.as_ref().unwrap().shape == SparseMmaShape::M16n8k128) .count(); - assert_eq!((records.len(), k32, k64, k128), (126, 19, 86, 16)); + assert_eq!((records.len(), k32, k64, k128), (134, 22, 86, 16)); let standard_k64 = records .iter() .copied() @@ -1003,7 +1049,7 @@ fn sparse_mma_rendering_enforces_selector_and_keeps_family_distinct() { } let compatibility = render_compat_sparse_mma(&catalog, "test-hash"); - assert_eq!(compatibility.matches("pub unsafe fn ").count(), 126); + assert_eq!(compatibility.matches("pub unsafe fn ").count(), 134); assert!( compatibility .contains("c: [i32; 4], a: [u32; 2], b: [u32; 2], metadata: u32, selector: u32") @@ -1104,7 +1150,7 @@ fn sparse_mma_rendering_enforces_selector_and_keeps_family_distinct() { assert!(targets.contains("GeneratedSparseMmaOverflow::NotApplicable")); assert!(targets.contains("GeneratedHardwareAlternative::ExactArchitecture(120)")); - assert_eq!(raw.matches(SPARSE_MMA_STANDARD_METADATA_RULE).count(), 32); + assert_eq!(raw.matches(SPARSE_MMA_STANDARD_METADATA_RULE).count(), 34); assert_eq!(raw.matches(SPARSE_MMA_ORDERED_METADATA_RULE).count(), 92); assert_eq!( raw.matches(SPARSE_MMA_ORDERED_TF32_METADATA_RULE).count(), @@ -1114,7 +1160,7 @@ fn sparse_mma_rendering_enforces_selector_and_keeps_family_distinct() { compatibility .matches(SPARSE_MMA_STANDARD_METADATA_RULE) .count(), - 32 + 34 ); assert_eq!( compatibility @@ -1178,7 +1224,7 @@ fn sparse_mma_rendering_enforces_selector_and_keeps_family_distinct() { assert!(reference.contains("LLVM source record uses A, B, C, metadata, selector order")); assert_eq!( reference.matches(SPARSE_MMA_STANDARD_METADATA_RULE).count(), - 32 + 34 ); assert_eq!( reference.matches(SPARSE_MMA_ORDERED_METADATA_RULE).count(), diff --git a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/families/mma/sparse.rs b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/families/mma/sparse.rs index d89ff06159..39ba69c425 100644 --- a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/families/mma/sparse.rs +++ b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/families/mma/sparse.rs @@ -6,11 +6,11 @@ use crate::model::{ BackendLoweringMechanism, ImportedIntrinsic, IntrinsicBackend, OverlayBackendLowering, OverlayIntrinsic, RuntimeValidation, SparseMma, SparseMmaAccumulator, SparseMmaAdapter, - SparseMmaCompatibilitySource, SparseMmaElement, SparseMmaF8F6F4Admission, - SparseMmaF8F6F4F16Admission, SparseMmaFp8F32Admission, SparseMmaIntegerAdmission, - SparseMmaLayout, SparseMmaLlvmAdapter, SparseMmaMetadata, SparseMmaOrderedAmpereFloatAdmission, - SparseMmaOrderedAmpereFloatVariant, SparseMmaOverflow, SparseMmaParticipation, - SparseMmaSelector, SparseMmaShape, + SparseMmaAmpereFloatAdmission, SparseMmaAmpereFloatVariant, SparseMmaCompatibilitySource, + SparseMmaElement, SparseMmaF8F6F4Admission, SparseMmaF8F6F4F16Admission, + SparseMmaFp8F32Admission, SparseMmaIntegerAdmission, SparseMmaLayout, SparseMmaLlvmAdapter, + SparseMmaMetadata, SparseMmaOverflow, SparseMmaParticipation, SparseMmaSelector, + SparseMmaShape, }; use crate::ptx::{InstructionPattern, OperandPattern}; use anyhow::{Context, Result, ensure}; @@ -449,18 +449,35 @@ pub(in crate::resolve) fn sparse_mma_identity(mma: &SparseMma) -> SparseMmaIdent (SparseMmaAccumulator::F32, SparseMmaElement::Tf32) => "tf32", _ => unreachable!("closed Ampere float recipe rejects this combination"), }; + let metadata_id_prefix = match mma.metadata { + SparseMmaMetadata::Standard => "", + SparseMmaMetadata::Ordered => "ordered_metadata_", + }; + let metadata_symbol_prefix = match mma.metadata { + SparseMmaMetadata::Standard => "", + SparseMmaMetadata::Ordered => "ordered.metadata.", + }; + let metadata_key = match mma.metadata { + SparseMmaMetadata::Standard => "standard_metadata", + SparseMmaMetadata::Ordered => "ordered_metadata", + }; return SparseMmaIdentity { - id: format!("mma_sp_ordered_metadata_{shape}_{accumulator}_{a_element}"), + id: format!("mma_sp_{metadata_id_prefix}{shape}_{accumulator}_{a_element}"), operation_key: format!( - "matrix.mma.sp.{shape}.row.col.{accumulator}.{a_element}.{b_element}.{accumulator}.not_applicable.ordered_metadata" + "matrix.mma.sp.{shape}.row.col.{accumulator}.{a_element}.{b_element}.{accumulator}.not_applicable.{metadata_key}" ), source_record: format!( - "int_nvvm_mma_sp_ordered_metadata_{shape}_row_col_{}", + "int_nvvm_mma_sp_{metadata_id_prefix}{shape}_row_col_{}", llvm_suffix.replace('.', "_") ), - llvm_symbol: format!("llvm.nvvm.mma.sp.ordered.metadata.{shape}.row.col.{llvm_suffix}"), + llvm_symbol: format!( + "llvm.nvvm.mma.sp.{metadata_symbol_prefix}{shape}.row.col.{llvm_suffix}" + ), ptx_modifiers: vec![ - "sp::ordered_metadata", + match mma.metadata { + SparseMmaMetadata::Standard => "sp", + SparseMmaMetadata::Ordered => "sp::ordered_metadata", + }, "sync", "aligned", shape, @@ -563,9 +580,9 @@ pub(in crate::resolve) fn sparse_mma_recipe(mma: &SparseMma) -> Option Option { + let metadata_ok = ampere_float || mma.metadata == SparseMmaMetadata::Ordered; mma.accumulator == carrier.accumulator && mma.overflow == SparseMmaOverflow::NotApplicable - && mma.metadata == SparseMmaMetadata::Ordered + && metadata_ok } SparseMmaAccumulator::S32 => { mma.accumulator == SparseMmaAccumulator::S32 @@ -627,11 +645,16 @@ pub(in crate::resolve) fn sparse_mma_minimum_ptx(mma: &SparseMma) -> &'static st if is_sparse_mma_fp8_f32(mma) { return "8.4"; } + // Every standard Ampere-float import is PTX >= 7.1 and sm_80. Ordered + // forms keep the 8.5 spelling. The floor is the metadata axis, not a form. if matches!( mma.a_element, SparseMmaElement::F16 | SparseMmaElement::Bf16 | SparseMmaElement::Tf32 ) { - return "8.5"; + return match mma.metadata { + SparseMmaMetadata::Ordered => "8.5", + SparseMmaMetadata::Standard => "7.1", + }; } if matches!( mma.accumulator, @@ -669,63 +692,63 @@ pub(in crate::resolve) fn sparse_mma_ptx_section(_: SparseMmaMetadata) -> &'stat "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp" } -// The eight reviewed forms in ledger order (i1017..i1024). The admission -// must list exactly these, in this order, so ABI identity stays stable. -pub(in crate::resolve) const SPARSE_MMA_ORDERED_AMPERE_FLOAT_VARIANTS: - [SparseMmaOrderedAmpereFloatVariant; 8] = [ - SparseMmaOrderedAmpereFloatVariant { +// The eight reviewed forms in ABI order. Ordered records bind ledger ids +// i1018..=i1025. The admission must list exactly these, in this order, for +// both metadata modes. +pub(in crate::resolve) const SPARSE_MMA_AMPERE_FLOAT_VARIANTS: [SparseMmaAmpereFloatVariant; 8] = [ + SparseMmaAmpereFloatVariant { shape: SparseMmaShape::M16n8k8, accumulator: SparseMmaAccumulator::F32, element: SparseMmaElement::Tf32, }, - SparseMmaOrderedAmpereFloatVariant { + SparseMmaAmpereFloatVariant { shape: SparseMmaShape::M16n8k16, accumulator: SparseMmaAccumulator::F32, element: SparseMmaElement::Tf32, }, - SparseMmaOrderedAmpereFloatVariant { + SparseMmaAmpereFloatVariant { shape: SparseMmaShape::M16n8k16, accumulator: SparseMmaAccumulator::F32, element: SparseMmaElement::Bf16, }, - SparseMmaOrderedAmpereFloatVariant { + SparseMmaAmpereFloatVariant { shape: SparseMmaShape::M16n8k16, accumulator: SparseMmaAccumulator::F16, element: SparseMmaElement::F16, }, - SparseMmaOrderedAmpereFloatVariant { + SparseMmaAmpereFloatVariant { shape: SparseMmaShape::M16n8k16, accumulator: SparseMmaAccumulator::F32, element: SparseMmaElement::F16, }, - SparseMmaOrderedAmpereFloatVariant { + SparseMmaAmpereFloatVariant { shape: SparseMmaShape::M16n8k32, accumulator: SparseMmaAccumulator::F32, element: SparseMmaElement::Bf16, }, - SparseMmaOrderedAmpereFloatVariant { + SparseMmaAmpereFloatVariant { shape: SparseMmaShape::M16n8k32, accumulator: SparseMmaAccumulator::F16, element: SparseMmaElement::F16, }, - SparseMmaOrderedAmpereFloatVariant { + SparseMmaAmpereFloatVariant { shape: SparseMmaShape::M16n8k32, accumulator: SparseMmaAccumulator::F32, element: SparseMmaElement::F16, }, ]; -pub(in crate::resolve) fn expand_sparse_mma_ordered_ampere_float_admission( - admission: &SparseMmaOrderedAmpereFloatAdmission, +pub(in crate::resolve) fn expand_sparse_mma_ampere_float_admission( + admission: &SparseMmaAmpereFloatAdmission, ) -> Result> { ensure!( !admission.llvm_evidence_profile.trim().is_empty() && !admission.libnvvm_evidence_profile.trim().is_empty(), - "ordered Ampere floating sparse MMA admission requires both backend evidence profiles" + "Ampere floating sparse MMA admission requires both backend evidence profiles" ); ensure!( - admission.variants == SPARSE_MMA_ORDERED_AMPERE_FLOAT_VARIANTS, - "ordered Ampere floating sparse MMA admission must retain the eight reviewed variants in ABI order" + admission.variants == SPARSE_MMA_AMPERE_FLOAT_VARIANTS, + "Ampere floating sparse MMA admission must retain the eight reviewed variants in ABI order" ); admission @@ -740,7 +763,7 @@ pub(in crate::resolve) fn expand_sparse_mma_ordered_ampere_float_admission( a_layout: SparseMmaLayout::Row, b_layout: SparseMmaLayout::Col, overflow: SparseMmaOverflow::NotApplicable, - metadata: SparseMmaMetadata::Ordered, + metadata: admission.metadata, selector: SparseMmaSelector::ImmediateZero, participation: SparseMmaParticipation::AllWarpLanesSameInstructionAndQualifiersNoExitedLanes, @@ -750,29 +773,36 @@ pub(in crate::resolve) fn expand_sparse_mma_ordered_ampere_float_admission( runtime_validation: admission.runtime_validation, }; let carrier = sparse_mma_ampere_float_carrier_recipe(&mma).context( - "ordered Ampere floating sparse MMA admission uses an unsupported carrier", + "Ampere floating sparse MMA admission uses an unsupported carrier", )?; mma.selector = carrier.selector; mma.adapter = carrier.adapter; mma.llvm_adapter = carrier.llvm_adapter; let recipe = sparse_mma_recipe(&mma).context( - "ordered Ampere floating sparse MMA admission requests a variant outside the closed recipe set", + "Ampere floating sparse MMA admission requests a variant outside the closed recipe set", )?; + let element = sparse_mma_element_name(variant.element); + let accumulator = match variant.accumulator { + SparseMmaAccumulator::F16 => "packed f16", + SparseMmaAccumulator::F32 => "f32", + SparseMmaAccumulator::S32 => unreachable!(), + }; + // Ordered wording stays byte-for-byte the admitted catalog sentence. + let summary = match admission.metadata { + SparseMmaMetadata::Ordered => format!( + "Multiplies warp-distributed ordered sparse {element} A and B fragments and adds a {accumulator} accumulator." + ), + SparseMmaMetadata::Standard => format!( + "Multiplies warp-distributed sparse {element} A and B fragments and adds a {accumulator} accumulator." + ), + }; Ok(sparse_mma_overlay_record( String::new(), mma, recipe, &admission.llvm_evidence_profile, &admission.libnvvm_evidence_profile, - format!( - "Multiplies warp-distributed ordered sparse {} A and B fragments and adds a {} accumulator.", - sparse_mma_element_name(variant.element), - match variant.accumulator { - SparseMmaAccumulator::F16 => "packed f16", - SparseMmaAccumulator::F32 => "f32", - SparseMmaAccumulator::S32 => unreachable!(), - }, - ), + summary, )) }) .collect() @@ -1298,11 +1328,14 @@ pub(in crate::resolve) fn validate_sparse_mma_policy( mma.a_element, SparseMmaElement::F16 | SparseMmaElement::Bf16 | SparseMmaElement::Tf32 ) { + // The imported PTX predicate is the metadata floor: standard + // forms are PTX >= 7.1 and ordered forms stay PTX >= 8.5. + let ptx_predicate = match mma.metadata { + SparseMmaMetadata::Standard => "Subtarget->getPTXVersion() >= 71", + SparseMmaMetadata::Ordered => "Subtarget->getPTXVersion() >= 85", + }; declaration.selections[0].predicates - == [ - "Subtarget->getSmVersion() >= 80", - "Subtarget->getPTXVersion() >= 85", - ] + == ["Subtarget->getSmVersion() >= 80", ptx_predicate] } else if is_sparse_mma_fp8_f32(mma) { // The upstream NVPTX selection for the plain SM89 FP8 forms // carries the Ampere floor and the Ada/PTX 8.4 floor as four diff --git a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/overlay.rs b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/overlay.rs index 703332219a..8cc44b8715 100644 --- a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/overlay.rs +++ b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/overlay.rs @@ -113,7 +113,7 @@ pub(super) fn read_overlay( let sparse_mma_f8f6f4_admission = shard.sparse_mma_f8f6f4_f32.take(); let sparse_mma_f8f6f4_f16_admission = shard.sparse_mma_f8f6f4_f16.take(); let sparse_mma_fp8_f32_admission = shard.sparse_mma_fp8_f32.take(); - let sparse_mma_ampere_float_admission = shard.sparse_mma_ordered_ampere_float.take(); + let sparse_mma_ampere_float_admission = shard.sparse_mma_ampere_float.take(); let prmt_admission = shard.prmt.take(); let packed_conversion_fp8_admission = shard.packed_conversion_fp8.take(); let packed_conversion_fp8_bf16x2_admission = shard.packed_conversion_fp8_bf16x2.take(); @@ -239,9 +239,9 @@ pub(super) fn read_overlay( if let Some(admission) = sparse_mma_ampere_float_admission { ensure!( shard.family == "sparse_mma" && shard.intrinsics.is_empty(), - "compact ordered Ampere floating sparse MMA admission must be the only content of a sparse_mma shard" + "compact Ampere floating sparse MMA admission must be the only content of a sparse_mma shard" ); - shard.intrinsics = expand_sparse_mma_ordered_ampere_float_admission(&admission)?; + shard.intrinsics = expand_sparse_mma_ampere_float_admission(&admission)?; } if let Some(admission) = prmt_admission { ensure!( @@ -438,9 +438,9 @@ pub(super) fn validate_overlay_shard_schema_with_max( SPARSE_MMA_F8F6F4_F16_SHARD_SCHEMA ); ensure!( - shard.sparse_mma_ordered_ampere_float.is_none() + shard.sparse_mma_ampere_float.is_none() || shard.schema >= SPARSE_MMA_AMPERE_FLOAT_SHARD_SCHEMA, - "compact ordered Ampere floating sparse MMA admission requires overlay shard schema {}", + "compact Ampere floating sparse MMA admission requires overlay shard schema {}", SPARSE_MMA_AMPERE_FLOAT_SHARD_SCHEMA ); ensure!( diff --git a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/misc_families.rs b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/misc_families.rs index 1fce9ebfdd..a4c5d6cbf8 100644 --- a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/misc_families.rs +++ b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/misc_families.rs @@ -188,7 +188,7 @@ fn debug_control_compact_schema_is_reserved_for_aggregation() { sparse_mma_f8f6f4_f32: None, sparse_mma_f8f6f4_f16: None, sparse_mma_fp8_f32: None, - sparse_mma_ordered_ampere_float: None, + sparse_mma_ampere_float: None, prmt: None, packed_conversion_fp8: None, packed_conversion_fp8_bf16x2: None, @@ -458,7 +458,7 @@ fn wgmma_control_compact_schema_is_reserved_for_aggregation() { sparse_mma_f8f6f4_f32: None, sparse_mma_f8f6f4_f16: None, sparse_mma_fp8_f32: None, - sparse_mma_ordered_ampere_float: None, + sparse_mma_ampere_float: None, prmt: None, packed_conversion_fp8: None, packed_conversion_fp8_bf16x2: None, diff --git a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/mma.rs b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/mma.rs index 14f5cd2c1e..11d4892962 100644 --- a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/mma.rs +++ b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/mma.rs @@ -290,11 +290,11 @@ fn compact_sparse_ordered_ampere_float_admission_is_closed_and_ledger_bound() { let path = repo_root.join("intrinsics/overlay/sparse_mma_ordered_ampere_float.toml"); let bytes = fs::read(&path).unwrap(); let shard: OverlayShardFile = toml::from_slice(&bytes).unwrap(); - let admission = shard.sparse_mma_ordered_ampere_float.unwrap(); + let admission = shard.sparse_mma_ampere_float.unwrap(); // Executed runtime validation is admitted for this family (GPU evidence backs it). assert_eq!(admission.runtime_validation, RuntimeValidation::Executed); - let records = expand_sparse_mma_ordered_ampere_float_admission(&admission).unwrap(); + let records = expand_sparse_mma_ampere_float_admission(&admission).unwrap(); assert_eq!(records.len(), 8); assert!(records.iter().all(|record| record.abi_id.is_empty())); assert!(records.iter().all(|record| { @@ -372,15 +372,351 @@ fn compact_sparse_ordered_ampere_float_admission_is_closed_and_ledger_bound() { let mut reordered = admission.clone(); reordered.variants.swap(0, 1); - assert!(expand_sparse_mma_ordered_ampere_float_admission(&reordered).is_err()); + assert!(expand_sparse_mma_ampere_float_admission(&reordered).is_err()); let mut missing = admission.clone(); missing.variants.pop(); - assert!(expand_sparse_mma_ordered_ampere_float_admission(&missing).is_err()); + assert!(expand_sparse_mma_ampere_float_admission(&missing).is_err()); let mut missing_evidence = admission; missing_evidence.llvm_evidence_profile.clear(); - assert!(expand_sparse_mma_ordered_ampere_float_admission(&missing_evidence).is_err()); + assert!(expand_sparse_mma_ampere_float_admission(&missing_evidence).is_err()); +} + +#[test] +fn ampere_float_sparse_mma_derives_identity_ptx_floor_and_carrier_from_metadata() { + let repo_root = Path::new(env!("CARGO_MANIFEST_DIR")).join("../.."); + let path = repo_root.join("intrinsics/overlay/sparse_mma_ordered_ampere_float.toml"); + let shard: OverlayShardFile = toml::from_slice(&fs::read(&path).unwrap()).unwrap(); + let ordered_admission = shard.sparse_mma_ampere_float.unwrap(); + assert_eq!(ordered_admission.metadata, SparseMmaMetadata::Ordered); + + let ordered = expand_sparse_mma_ampere_float_admission(&ordered_admission).unwrap(); + assert_eq!(ordered.len(), 8); + assert!(ordered.iter().all(|record| record.abi_id.is_empty())); + let mut bound = overlay_file(ordered.clone()); + bind_pinned_abi_ids(&repo_root, &mut bound); + assert_eq!( + bound + .intrinsics + .iter() + .map(|record| record.abi_id.clone()) + .collect::>(), + (1018..=1025) + .map(|id| format!("i{id:04}")) + .collect::>() + ); + + let mut standard_admission = ordered_admission; + standard_admission.metadata = SparseMmaMetadata::Standard; + let standard = expand_sparse_mma_ampere_float_admission(&standard_admission).unwrap(); + assert_eq!(standard.len(), 8); + assert!(standard.iter().all(|record| record.abi_id.is_empty())); + + // shape, accumulator, element, llvm source suffix, selector, register width. + // The suffix is the LLVM tail, not the id tail: f16 forms use f16_f16 / f32_f32. + let forms = [ + ( + "m16n8k8", + "f32", + "tf32", + "tf32", + SparseMmaSelector::ImmediateZeroThroughThree, + 2usize, + ), + ( + "m16n8k16", + "f32", + "tf32", + "tf32", + SparseMmaSelector::ImmediateZeroOrOne, + 4, + ), + ( + "m16n8k16", + "f32", + "bf16", + "bf16", + SparseMmaSelector::ImmediateZeroThroughThree, + 2, + ), + ( + "m16n8k16", + "f16", + "f16", + "f16_f16", + SparseMmaSelector::ImmediateZeroThroughThree, + 2, + ), + ( + "m16n8k16", + "f32", + "f16", + "f32_f32", + SparseMmaSelector::ImmediateZeroThroughThree, + 2, + ), + ( + "m16n8k32", + "f32", + "bf16", + "bf16", + SparseMmaSelector::ImmediateZeroOrOne, + 4, + ), + ( + "m16n8k32", + "f16", + "f16", + "f16_f16", + SparseMmaSelector::ImmediateZeroOrOne, + 4, + ), + ( + "m16n8k32", + "f32", + "f16", + "f32_f32", + SparseMmaSelector::ImmediateZeroOrOne, + 4, + ), + ]; + for (index, (shape, accumulator, element, suffix, selector, registers)) in + forms.into_iter().enumerate() + { + let ordered_record = &ordered[index]; + let standard_record = &standard[index]; + let llvm_suffix = suffix.replace('_', "."); + let ordered_id = format!("mma_sp_ordered_metadata_{shape}_{accumulator}_{element}"); + let standard_id = format!("mma_sp_{shape}_{accumulator}_{element}"); + let ordered_source = format!("int_nvvm_mma_sp_ordered_metadata_{shape}_row_col_{suffix}"); + let standard_source = format!("int_nvvm_mma_sp_{shape}_row_col_{suffix}"); + let ordered_symbol = + format!("llvm.nvvm.mma.sp.ordered.metadata.{shape}.row.col.{llvm_suffix}"); + let standard_symbol = format!("llvm.nvvm.mma.sp.{shape}.row.col.{llvm_suffix}"); + let ordered_key = format!( + "matrix.mma.sp.{shape}.row.col.{accumulator}.{element}.{element}.{accumulator}.not_applicable.ordered_metadata" + ); + let standard_key = format!( + "matrix.mma.sp.{shape}.row.col.{accumulator}.{element}.{element}.{accumulator}.not_applicable.standard_metadata" + ); + let tail = [ + "sync", + "aligned", + shape, + "row", + "col", + accumulator, + element, + element, + accumulator, + ]; + let modifiers = |head: &str| { + std::iter::once(head.to_owned()) + .chain(tail.iter().map(|part| (*part).to_owned())) + .collect::>() + }; + + assert_eq!(ordered_record.id, ordered_id); + assert_eq!( + ordered_record.source_record.as_deref(), + Some(ordered_source.as_str()) + ); + assert_eq!( + ordered_record.llvm_symbol.as_deref(), + Some(ordered_symbol.as_str()) + ); + assert_eq!(ordered_record.operation_key, ordered_key); + assert_eq!( + ordered_record.expected_ptx.modifiers, + modifiers("sp::ordered_metadata") + ); + assert_eq!(ordered_record.minimum_ptx, "8.5"); + assert_eq!(ordered_record.minimum_sm.as_deref(), Some("sm_80")); + assert_eq!(ordered_record.targets, "all"); + + assert_eq!(standard_record.id, standard_id); + assert_eq!( + standard_record.source_record.as_deref(), + Some(standard_source.as_str()) + ); + assert_eq!( + standard_record.llvm_symbol.as_deref(), + Some(standard_symbol.as_str()) + ); + assert_eq!(standard_record.operation_key, standard_key); + assert_eq!(standard_record.expected_ptx.modifiers, modifiers("sp")); + assert_eq!(standard_record.minimum_ptx, "7.1"); + assert_eq!(standard_record.minimum_sm.as_deref(), Some("sm_80")); + assert_eq!(standard_record.targets, "all"); + assert!(standard_record.abi_id.is_empty()); + + let ordered_mma = ordered_record.sparse_mma.as_ref().unwrap(); + let standard_mma = standard_record.sparse_mma.as_ref().unwrap(); + assert_eq!(ordered_mma.metadata, SparseMmaMetadata::Ordered); + assert_eq!(standard_mma.metadata, SparseMmaMetadata::Standard); + assert_eq!(ordered_mma.selector, selector); + assert_eq!(standard_mma.selector, ordered_mma.selector); + assert_eq!(standard_mma.adapter, ordered_mma.adapter); + assert_eq!(standard_mma.llvm_adapter, ordered_mma.llvm_adapter); + assert_eq!( + standard_record.rust_arguments, + ordered_record.rust_arguments + ); + assert_eq!( + standard_record.llvm_arguments, + ordered_record.llvm_arguments + ); + assert_eq!( + standard_record.rust_arguments[1], + format!("[u32; {registers}]") + ); + assert_eq!( + standard_record.rust_arguments[2], + format!("[u32; {registers}]") + ); + assert!(sparse_mma_recipe(standard_mma).is_some()); + } + + // Plain 16-bit bf16 m16n8k16 stays the 2-register, selector 0-3 carrier. + let standard_bf16 = &standard[2]; + assert_eq!(standard_bf16.id, "mma_sp_m16n8k16_f32_bf16"); + assert_eq!( + standard_bf16.sparse_mma.as_ref().unwrap().selector, + SparseMmaSelector::ImmediateZeroThroughThree + ); + assert_eq!(standard_bf16.rust_arguments[1], "[u32; 2]"); + + let mut forced_f8f6f4 = expand_sparse_mma_f8f6f4_admission(&test_f8f6f4_admission()) + .unwrap() + .remove(0) + .sparse_mma + .unwrap(); + assert_eq!(forced_f8f6f4.a_element, SparseMmaElement::E2m1); + assert_eq!(forced_f8f6f4.metadata, SparseMmaMetadata::Ordered); + assert!(sparse_mma_recipe(&forced_f8f6f4).is_some()); + forced_f8f6f4.metadata = SparseMmaMetadata::Standard; + assert!(sparse_mma_recipe(&forced_f8f6f4).is_none()); + + let mut forced_f16 = + expand_sparse_mma_f8f6f4_f16_admission(&test_sparse_mma_f8f6f4_f16_admission()) + .unwrap() + .remove(0) + .sparse_mma + .unwrap(); + forced_f16.metadata = SparseMmaMetadata::Standard; + assert!(sparse_mma_recipe(&forced_f16).is_none()); + + let plain_fp8 = expand_sparse_mma_fp8_f32_admission(&test_sparse_mma_fp8_f32_admission()) + .unwrap() + .remove(0); + assert_eq!(plain_fp8.id, "mma_sp_m16n8k64_f32_e4m3_e4m3_f32"); + assert_eq!( + plain_fp8.sparse_mma.as_ref().unwrap().metadata, + SparseMmaMetadata::Standard + ); + assert!(sparse_mma_recipe(plain_fp8.sparse_mma.as_ref().unwrap()).is_some()); +} + +#[test] +fn standard_ampere_float_shard_admits_eight_forms_and_leaves_ordered_abi() { + let repo_root = Path::new(env!("CARGO_MANIFEST_DIR")).join("../.."); + let path = repo_root.join("intrinsics/overlay/sparse_mma_ampere_float.toml"); + let shard: OverlayShardFile = toml::from_slice(&fs::read(&path).unwrap()).unwrap(); + assert_eq!(shard.schema, SPARSE_MMA_AMPERE_FLOAT_SHARD_SCHEMA); + assert_eq!(shard.family, "sparse_mma"); + let admission = shard.sparse_mma_ampere_float.unwrap(); + assert_eq!(admission.metadata, SparseMmaMetadata::Standard); + assert_eq!(admission.runtime_validation, RuntimeValidation::Executed); + assert_eq!(admission.llvm_evidence_profile, "rust-llvm-23.1.3-aab11ee0"); + assert_eq!( + admission.libnvvm_evidence_profile, + "cuda-13.3-libnvvm-13.3.33" + ); + + let records = expand_sparse_mma_ampere_float_admission(&admission).unwrap(); + assert_eq!(records.len(), 8); + let expected = [ + ( + "mma_sp_m16n8k8_f32_tf32", + "int_nvvm_mma_sp_m16n8k8_row_col_tf32", + ), + ( + "mma_sp_m16n8k16_f32_tf32", + "int_nvvm_mma_sp_m16n8k16_row_col_tf32", + ), + ( + "mma_sp_m16n8k16_f32_bf16", + "int_nvvm_mma_sp_m16n8k16_row_col_bf16", + ), + ( + "mma_sp_m16n8k16_f16_f16", + "int_nvvm_mma_sp_m16n8k16_row_col_f16_f16", + ), + ( + "mma_sp_m16n8k16_f32_f16", + "int_nvvm_mma_sp_m16n8k16_row_col_f32_f32", + ), + ( + "mma_sp_m16n8k32_f32_bf16", + "int_nvvm_mma_sp_m16n8k32_row_col_bf16", + ), + ( + "mma_sp_m16n8k32_f16_f16", + "int_nvvm_mma_sp_m16n8k32_row_col_f16_f16", + ), + ( + "mma_sp_m16n8k32_f32_f16", + "int_nvvm_mma_sp_m16n8k32_row_col_f32_f32", + ), + ]; + for (record, (id, source)) in records.iter().zip(expected) { + assert_eq!(record.id, id); + assert_eq!(record.source_record.as_deref(), Some(source)); + assert_eq!( + record.expected_ptx.modifiers.first().map(String::as_str), + Some("sp") + ); + assert_ne!( + record.expected_ptx.modifiers.first().map(String::as_str), + Some("sp::ordered_metadata") + ); + assert_eq!(record.minimum_ptx, "7.1"); + assert_eq!(record.minimum_sm.as_deref(), Some("sm_80")); + assert!(record.abi_id.is_empty()); + } + + let mut bound = overlay_file(records); + bind_pinned_abi_ids(&repo_root, &mut bound); + assert_eq!( + bound + .intrinsics + .iter() + .map(|record| record.abi_id.clone()) + .collect::>(), + (1039..=1046) + .map(|id| format!("i{id:04}")) + .collect::>() + ); + + let ordered_path = repo_root.join("intrinsics/overlay/sparse_mma_ordered_ampere_float.toml"); + let ordered_shard: OverlayShardFile = + toml::from_slice(&fs::read(&ordered_path).unwrap()).unwrap(); + let ordered = + expand_sparse_mma_ampere_float_admission(&ordered_shard.sparse_mma_ampere_float.unwrap()) + .unwrap(); + let mut ordered_bound = overlay_file(ordered); + bind_pinned_abi_ids(&repo_root, &mut ordered_bound); + assert_eq!( + ordered_bound + .intrinsics + .iter() + .map(|record| record.abi_id.clone()) + .collect::>(), + (1018..=1025) + .map(|id| format!("i{id:04}")) + .collect::>() + ); } #[test] @@ -1594,7 +1930,7 @@ fn pinned_sparse_mma_records_close_shape_specific_selectors_and_ranges() { .iter() .filter(|record| record.family == "sparse_mma") .collect::>(); - assert_eq!(records.len(), 126); + assert_eq!(records.len(), 134); assert_eq!( records .iter() @@ -1603,6 +1939,7 @@ fn pinned_sparse_mma_records_close_shape_specific_selectors_and_ranges() { (163..=251) .chain(525..=549) .chain(1018..=1029) + .chain(1039..=1046) .map(|id| format!("i{id:04}")) .collect::>() ); @@ -1631,10 +1968,10 @@ fn pinned_sparse_mma_records_close_shape_specific_selectors_and_ranges() { assert!(derived_source_records.insert(identity.source_record.clone())); assert!(derived_llvm_symbols.insert(identity.llvm_symbol.clone())); } - assert_eq!(derived_ids.len(), 126); - assert_eq!(derived_operation_keys.len(), 126); - assert_eq!(derived_source_records.len(), 126); - assert_eq!(derived_llvm_symbols.len(), 126); + assert_eq!(derived_ids.len(), 134); + assert_eq!(derived_operation_keys.len(), 134); + assert_eq!(derived_source_records.len(), 134); + assert_eq!(derived_llvm_symbols.len(), 134); let integer_records = records .iter() diff --git a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/overlay_schema.rs b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/overlay_schema.rs index 8be4c95782..4032af5a2a 100644 --- a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/overlay_schema.rs +++ b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/overlay_schema.rs @@ -48,8 +48,8 @@ fn overlay_manifest_loads_sorted_family_shards() { let (overlay, hash) = read_overlay(&repo_root, &repo_root.join("intrinsics/overlay.toml")).unwrap(); assert_eq!(overlay.schema, OVERLAY_SCHEMA); - assert_eq!(overlay.shards.len(), 67); - assert_eq!(overlay.intrinsics.len(), 1038); + assert_eq!(overlay.shards.len(), 68); + assert_eq!(overlay.intrinsics.len(), 1046); assert_eq!( overlay .intrinsics @@ -144,7 +144,7 @@ fn overlay_manifest_loads_sorted_family_shards() { .iter() .filter(|record| record.family == "sparse_mma") .count(), - 126 + 134 ); assert_eq!( overlay @@ -265,7 +265,7 @@ fn overlay_shard_schema_range_is_composable_and_new_fields_fail_closed() { sparse_mma_f8f6f4_f32, sparse_mma_f8f6f4_f16: None, sparse_mma_fp8_f32: None, - sparse_mma_ordered_ampere_float: None, + sparse_mma_ampere_float: None, prmt, packed_conversion_fp8: None, packed_conversion_fp8_bf16x2: None, @@ -372,11 +372,7 @@ fn overlay_shard_schema_range_is_composable_and_new_fields_fail_closed() { std::fs::read(repo_root.join("intrinsics/overlay/sparse_mma_ordered_ampere_float.toml")) .unwrap(); let mut sparse_ampere_float: OverlayShardFile = toml::from_slice(&ere_float_bytes).unwrap(); - assert!( - sparse_ampere_float - .sparse_mma_ordered_ampere_float - .is_some() - ); + assert!(sparse_ampere_float.sparse_mma_ampere_float.is_some()); assert_eq!( sparse_ampere_float.schema, SPARSE_MMA_AMPERE_FLOAT_SHARD_SCHEMA @@ -418,7 +414,7 @@ fn overlay_shard_schema_range_is_composable_and_new_fields_fail_closed() { sparse_mma_f8f6f4_f32: None, sparse_mma_f8f6f4_f16: None, sparse_mma_fp8_f32: None, - sparse_mma_ordered_ampere_float: None, + sparse_mma_ampere_float: None, prmt: None, packed_conversion_fp8: Some(test_fp8_conversion_admission()), packed_conversion_fp8_bf16x2: None, @@ -465,7 +461,7 @@ fn overlay_shard_schema_range_is_composable_and_new_fields_fail_closed() { sparse_mma_f8f6f4_f32: None, sparse_mma_f8f6f4_f16: None, sparse_mma_fp8_f32: None, - sparse_mma_ordered_ampere_float: None, + sparse_mma_ampere_float: None, prmt: None, packed_conversion_fp8: None, packed_conversion_fp8_bf16x2: None, @@ -513,7 +509,7 @@ fn overlay_shard_schema_range_is_composable_and_new_fields_fail_closed() { sparse_mma_f8f6f4_f32: None, sparse_mma_f8f6f4_f16: None, sparse_mma_fp8_f32: None, - sparse_mma_ordered_ampere_float: None, + sparse_mma_ampere_float: None, prmt: None, packed_conversion_fp8: None, packed_conversion_fp8_bf16x2: None, diff --git a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/sreg_threadfence.rs b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/sreg_threadfence.rs index 959622a23d..d630f60332 100644 --- a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/sreg_threadfence.rs +++ b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/sreg_threadfence.rs @@ -113,7 +113,7 @@ fn special_register_admission_is_closed_and_schema_gated() { sparse_mma_f8f6f4_f32: None, sparse_mma_f8f6f4_f16: None, sparse_mma_fp8_f32: None, - sparse_mma_ordered_ampere_float: None, + sparse_mma_ampere_float: None, prmt: None, packed_conversion_fp8: None, packed_conversion_fp8_bf16x2: None, diff --git a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/tcgen05.rs b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/tcgen05.rs index 48c6f8c1e3..d8a504dc3e 100644 --- a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/tcgen05.rs +++ b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/tcgen05.rs @@ -1185,7 +1185,7 @@ fn tcgen05_compact_schema_is_reserved_for_aggregation() { sparse_mma_f8f6f4_f32: None, sparse_mma_f8f6f4_f16: None, sparse_mma_fp8_f32: None, - sparse_mma_ordered_ampere_float: None, + sparse_mma_ampere_float: None, prmt: None, packed_conversion_fp8: None, packed_conversion_fp8_bf16x2: None, diff --git a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/tma_clc_cluster.rs b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/tma_clc_cluster.rs index 3aa380c48f..c287597724 100644 --- a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/tma_clc_cluster.rs +++ b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/tma_clc_cluster.rs @@ -113,7 +113,7 @@ fn clc_compact_schema_is_reserved_for_aggregation() { sparse_mma_f8f6f4_f32: None, sparse_mma_f8f6f4_f16: None, sparse_mma_fp8_f32: None, - sparse_mma_ordered_ampere_float: None, + sparse_mma_ampere_float: None, prmt: None, packed_conversion_fp8: None, packed_conversion_fp8_bf16x2: None, @@ -400,7 +400,7 @@ fn tma_compact_schema_is_reserved_for_aggregation() { sparse_mma_f8f6f4_f32: None, sparse_mma_f8f6f4_f16: None, sparse_mma_fp8_f32: None, - sparse_mma_ordered_ampere_float: None, + sparse_mma_ampere_float: None, prmt: None, packed_conversion_fp8: None, packed_conversion_fp8_bf16x2: None, @@ -495,7 +495,7 @@ fn cluster_memory_compact_schema_is_reserved_and_fail_closed() { sparse_mma_f8f6f4_f32: None, sparse_mma_f8f6f4_f16: None, sparse_mma_fp8_f32: None, - sparse_mma_ordered_ampere_float: None, + sparse_mma_ampere_float: None, prmt: None, packed_conversion_fp8: None, packed_conversion_fp8_bf16x2: None, diff --git a/cuda-oxide/crates/cuda-intrinsics/src/generated/abi_v1.rs b/cuda-oxide/crates/cuda-intrinsics/src/generated/abi_v1.rs index 30caf5b4fe..0af26b1d75 100644 --- a/cuda-oxide/crates/cuda-intrinsics/src/generated/abi_v1.rs +++ b/cuda-oxide/crates/cuda-intrinsics/src/generated/abi_v1.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Raw ABI functions recognized by cuda-oxide. @@ -9181,6 +9181,188 @@ pub unsafe fn i0225( ) } +/// Multiplies warp-distributed sparse f16 A and B fragments and adds a packed f16 accumulator. +/// +/// Catalog ID: `mma_sp_m16n8k16_f16_f16`. Source: LLVM `llvm.nvvm.mma.sp.m16n8k16.row.col.f16.f16` from `int_nvvm_mma_sp_m16n8k16_row_col_f16_f16`; expects PTX `mma.sp.sync.aligned.m16n8k16.row.col.f16.f16.f16.f16 , , , , , ;`. +/// Available on `sm_80+` targets from PTX 7.1. +/// +/// # Safety +/// All 32 warp lanes must execute the same sparse MMA instruction with the same qualifiers, and no lane may have exited. +/// `_arg0`, `_arg1`, and `_arg2` hold this lane's 2-register C, 2-register A, and 2-register B fragments; `_arg3` holds its sparse metadata. +/// `_arg4` must be the compile-time constant `0`, `1`, `2`, or `3`. +/// The operation is register-only and is not a memory fence. +/// Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +#[must_use] +#[inline(never)] +pub unsafe fn i1042( + _arg0: [u32; 2], + _arg1: [u32; 2], + _arg2: [u32; 2], + _arg3: u32, + _arg4: u32, +) -> [u32; 2] { + unreachable!( + "generated CUDA intrinsic `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1042` executed outside device compilation" + ) +} + +/// Multiplies warp-distributed sparse bf16 A and B fragments and adds a f32 accumulator. +/// +/// Catalog ID: `mma_sp_m16n8k16_f32_bf16`. Source: LLVM `llvm.nvvm.mma.sp.m16n8k16.row.col.bf16` from `int_nvvm_mma_sp_m16n8k16_row_col_bf16`; expects PTX `mma.sp.sync.aligned.m16n8k16.row.col.f32.bf16.bf16.f32 , , , , , ;`. +/// Available on `sm_80+` targets from PTX 7.1. +/// +/// # Safety +/// All 32 warp lanes must execute the same sparse MMA instruction with the same qualifiers, and no lane may have exited. +/// `_arg0`, `_arg1`, and `_arg2` hold this lane's 4-register C, 2-register A, and 2-register B fragments; `_arg3` holds its sparse metadata. +/// `_arg4` must be the compile-time constant `0`, `1`, `2`, or `3`. +/// The operation is register-only and is not a memory fence. +/// Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +#[must_use] +#[inline(never)] +pub unsafe fn i1041( + _arg0: [f32; 4], + _arg1: [u32; 2], + _arg2: [u32; 2], + _arg3: u32, + _arg4: u32, +) -> [f32; 4] { + unreachable!( + "generated CUDA intrinsic `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1041` executed outside device compilation" + ) +} + +/// Multiplies warp-distributed sparse f16 A and B fragments and adds a f32 accumulator. +/// +/// Catalog ID: `mma_sp_m16n8k16_f32_f16`. Source: LLVM `llvm.nvvm.mma.sp.m16n8k16.row.col.f32.f32` from `int_nvvm_mma_sp_m16n8k16_row_col_f32_f32`; expects PTX `mma.sp.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32 , , , , , ;`. +/// Available on `sm_80+` targets from PTX 7.1. +/// +/// # Safety +/// All 32 warp lanes must execute the same sparse MMA instruction with the same qualifiers, and no lane may have exited. +/// `_arg0`, `_arg1`, and `_arg2` hold this lane's 4-register C, 2-register A, and 2-register B fragments; `_arg3` holds its sparse metadata. +/// `_arg4` must be the compile-time constant `0`, `1`, `2`, or `3`. +/// The operation is register-only and is not a memory fence. +/// Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +#[must_use] +#[inline(never)] +pub unsafe fn i1043( + _arg0: [f32; 4], + _arg1: [u32; 2], + _arg2: [u32; 2], + _arg3: u32, + _arg4: u32, +) -> [f32; 4] { + unreachable!( + "generated CUDA intrinsic `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1043` executed outside device compilation" + ) +} + +/// Multiplies warp-distributed sparse tf32 A and B fragments and adds a f32 accumulator. +/// +/// Catalog ID: `mma_sp_m16n8k16_f32_tf32`. Source: LLVM `llvm.nvvm.mma.sp.m16n8k16.row.col.tf32` from `int_nvvm_mma_sp_m16n8k16_row_col_tf32`; expects PTX `mma.sp.sync.aligned.m16n8k16.row.col.f32.tf32.tf32.f32 , , , , , ;`. +/// Available on `sm_80+` targets from PTX 7.1. +/// +/// # Safety +/// All 32 warp lanes must execute the same sparse MMA instruction with the same qualifiers, and no lane may have exited. +/// `_arg0`, `_arg1`, and `_arg2` hold this lane's 4-register C, 4-register A, and 4-register B fragments; `_arg3` holds its sparse metadata. +/// `_arg4` must be the compile-time constant `0` or `1`. +/// The operation is register-only and is not a memory fence. +/// Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +#[must_use] +#[inline(never)] +pub unsafe fn i1040( + _arg0: [f32; 4], + _arg1: [u32; 4], + _arg2: [u32; 4], + _arg3: u32, + _arg4: u32, +) -> [f32; 4] { + unreachable!( + "generated CUDA intrinsic `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1040` executed outside device compilation" + ) +} + +/// Multiplies warp-distributed sparse f16 A and B fragments and adds a packed f16 accumulator. +/// +/// Catalog ID: `mma_sp_m16n8k32_f16_f16`. Source: LLVM `llvm.nvvm.mma.sp.m16n8k32.row.col.f16.f16` from `int_nvvm_mma_sp_m16n8k32_row_col_f16_f16`; expects PTX `mma.sp.sync.aligned.m16n8k32.row.col.f16.f16.f16.f16 , , , , , ;`. +/// Available on `sm_80+` targets from PTX 7.1. +/// +/// # Safety +/// All 32 warp lanes must execute the same sparse MMA instruction with the same qualifiers, and no lane may have exited. +/// `_arg0`, `_arg1`, and `_arg2` hold this lane's 2-register C, 4-register A, and 4-register B fragments; `_arg3` holds its sparse metadata. +/// `_arg4` must be the compile-time constant `0` or `1`. +/// The operation is register-only and is not a memory fence. +/// Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +#[must_use] +#[inline(never)] +pub unsafe fn i1045( + _arg0: [u32; 2], + _arg1: [u32; 4], + _arg2: [u32; 4], + _arg3: u32, + _arg4: u32, +) -> [u32; 2] { + unreachable!( + "generated CUDA intrinsic `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1045` executed outside device compilation" + ) +} + +/// Multiplies warp-distributed sparse bf16 A and B fragments and adds a f32 accumulator. +/// +/// Catalog ID: `mma_sp_m16n8k32_f32_bf16`. Source: LLVM `llvm.nvvm.mma.sp.m16n8k32.row.col.bf16` from `int_nvvm_mma_sp_m16n8k32_row_col_bf16`; expects PTX `mma.sp.sync.aligned.m16n8k32.row.col.f32.bf16.bf16.f32 , , , , , ;`. +/// Available on `sm_80+` targets from PTX 7.1. +/// +/// # Safety +/// All 32 warp lanes must execute the same sparse MMA instruction with the same qualifiers, and no lane may have exited. +/// `_arg0`, `_arg1`, and `_arg2` hold this lane's 4-register C, 4-register A, and 4-register B fragments; `_arg3` holds its sparse metadata. +/// `_arg4` must be the compile-time constant `0` or `1`. +/// The operation is register-only and is not a memory fence. +/// Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +#[must_use] +#[inline(never)] +pub unsafe fn i1044( + _arg0: [f32; 4], + _arg1: [u32; 4], + _arg2: [u32; 4], + _arg3: u32, + _arg4: u32, +) -> [f32; 4] { + unreachable!( + "generated CUDA intrinsic `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1044` executed outside device compilation" + ) +} + +/// Multiplies warp-distributed sparse f16 A and B fragments and adds a f32 accumulator. +/// +/// Catalog ID: `mma_sp_m16n8k32_f32_f16`. Source: LLVM `llvm.nvvm.mma.sp.m16n8k32.row.col.f32.f32` from `int_nvvm_mma_sp_m16n8k32_row_col_f32_f32`; expects PTX `mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32 , , , , , ;`. +/// Available on `sm_80+` targets from PTX 7.1. +/// +/// # Safety +/// All 32 warp lanes must execute the same sparse MMA instruction with the same qualifiers, and no lane may have exited. +/// `_arg0`, `_arg1`, and `_arg2` hold this lane's 4-register C, 4-register A, and 4-register B fragments; `_arg3` holds its sparse metadata. +/// `_arg4` must be the compile-time constant `0` or `1`. +/// The operation is register-only and is not a memory fence. +/// Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +#[must_use] +#[inline(never)] +pub unsafe fn i1046( + _arg0: [f32; 4], + _arg1: [u32; 4], + _arg2: [u32; 4], + _arg3: u32, + _arg4: u32, +) -> [f32; 4] { + unreachable!( + "generated CUDA intrinsic `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1046` executed outside device compilation" + ) +} + /// Multiplies warp-distributed sparse signed A and signed B INT8 fragments and adds a wrapping s32 accumulator. /// /// Catalog ID: `mma_sp_m16n8k32_s32_s8`. Source: LLVM `llvm.nvvm.mma.sp.m16n8k32.row.col.s8` from `int_nvvm_mma_sp_m16n8k32_row_col_s8`; expects PTX `mma.sp.sync.aligned.m16n8k32.row.col.s32.s8.s8.s32 , , , , , ;`. @@ -9933,6 +10115,32 @@ pub unsafe fn i0193( ) } +/// Multiplies warp-distributed sparse tf32 A and B fragments and adds a f32 accumulator. +/// +/// Catalog ID: `mma_sp_m16n8k8_f32_tf32`. Source: LLVM `llvm.nvvm.mma.sp.m16n8k8.row.col.tf32` from `int_nvvm_mma_sp_m16n8k8_row_col_tf32`; expects PTX `mma.sp.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32 , , , , , ;`. +/// Available on `sm_80+` targets from PTX 7.1. +/// +/// # Safety +/// All 32 warp lanes must execute the same sparse MMA instruction with the same qualifiers, and no lane may have exited. +/// `_arg0`, `_arg1`, and `_arg2` hold this lane's 4-register C, 2-register A, and 2-register B fragments; `_arg3` holds its sparse metadata. +/// `_arg4` must be the compile-time constant `0`, `1`, `2`, or `3`. +/// The operation is register-only and is not a memory fence. +/// Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. +/// See the [PTX sparse MMA fragment layouts](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp). +#[must_use] +#[inline(never)] +pub unsafe fn i1039( + _arg0: [f32; 4], + _arg1: [u32; 2], + _arg2: [u32; 2], + _arg3: u32, + _arg4: u32, +) -> [f32; 4] { + unreachable!( + "generated CUDA intrinsic `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1039` executed outside device compilation" + ) +} + /// Multiplies warp-distributed sparse signed A and signed B INT4 fragments with ordered sparsity metadata and adds a wrapping s32 accumulator. /// /// Catalog ID: `mma_sp_ordered_metadata_m16n8k128_s32_s4`. Source: LLVM `llvm.nvvm.mma.sp.ordered.metadata.m16n8k128.row.col.s4` from `int_nvvm_mma_sp_ordered_metadata_m16n8k128_row_col_s4`; expects PTX `mma.sp::ordered_metadata.sync.aligned.m16n8k128.row.col.s32.s4.s4.s32 , , , , , ;`. diff --git a/cuda-oxide/crates/cuda-intrinsics/src/generated/mod.rs b/cuda-oxide/crates/cuda-intrinsics/src/generated/mod.rs index 0dbdbcf1bc..f8ddc5960c 100644 --- a/cuda-oxide/crates/cuda-intrinsics/src/generated/mod.rs +++ b/cuda-oxide/crates/cuda-intrinsics/src/generated/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. #[doc(hidden)] @@ -683,6 +683,14 @@ pub mod matrix { pub use crate::__cuda_oxide_intrinsic_abi_v1::i1027 as mma_sp_m16n8k64_f32_e4m3_e5m2_f32; pub use crate::__cuda_oxide_intrinsic_abi_v1::i1028 as mma_sp_m16n8k64_f32_e5m2_e4m3_f32; pub use crate::__cuda_oxide_intrinsic_abi_v1::i1029 as mma_sp_m16n8k64_f32_e5m2_e5m2_f32; + pub use crate::__cuda_oxide_intrinsic_abi_v1::i1039 as mma_sp_m16n8k8_f32_tf32; + pub use crate::__cuda_oxide_intrinsic_abi_v1::i1040 as mma_sp_m16n8k16_f32_tf32; + pub use crate::__cuda_oxide_intrinsic_abi_v1::i1041 as mma_sp_m16n8k16_f32_bf16; + pub use crate::__cuda_oxide_intrinsic_abi_v1::i1042 as mma_sp_m16n8k16_f16_f16; + pub use crate::__cuda_oxide_intrinsic_abi_v1::i1043 as mma_sp_m16n8k16_f32_f16; + pub use crate::__cuda_oxide_intrinsic_abi_v1::i1044 as mma_sp_m16n8k32_f32_bf16; + pub use crate::__cuda_oxide_intrinsic_abi_v1::i1045 as mma_sp_m16n8k32_f16_f16; + pub use crate::__cuda_oxide_intrinsic_abi_v1::i1046 as mma_sp_m16n8k32_f32_f16; } /// Generated `prmt` intrinsic source API. @@ -5501,6 +5509,62 @@ mod tests { assert_eq!(public as usize, canonical as usize); } #[test] + fn public_mma_sp_m16n8k16_f16_f16_reexports_abi_i1042() { + let public: unsafe fn([u32; 2], [u32; 2], [u32; 2], u32, u32) -> [u32; 2] = + super::matrix::mma_sp_m16n8k16_f16_f16; + let canonical: unsafe fn([u32; 2], [u32; 2], [u32; 2], u32, u32) -> [u32; 2] = + super::__cuda_oxide_intrinsic_abi_v1::i1042; + assert_eq!(public as usize, canonical as usize); + } + #[test] + fn public_mma_sp_m16n8k16_f32_bf16_reexports_abi_i1041() { + let public: unsafe fn([f32; 4], [u32; 2], [u32; 2], u32, u32) -> [f32; 4] = + super::matrix::mma_sp_m16n8k16_f32_bf16; + let canonical: unsafe fn([f32; 4], [u32; 2], [u32; 2], u32, u32) -> [f32; 4] = + super::__cuda_oxide_intrinsic_abi_v1::i1041; + assert_eq!(public as usize, canonical as usize); + } + #[test] + fn public_mma_sp_m16n8k16_f32_f16_reexports_abi_i1043() { + let public: unsafe fn([f32; 4], [u32; 2], [u32; 2], u32, u32) -> [f32; 4] = + super::matrix::mma_sp_m16n8k16_f32_f16; + let canonical: unsafe fn([f32; 4], [u32; 2], [u32; 2], u32, u32) -> [f32; 4] = + super::__cuda_oxide_intrinsic_abi_v1::i1043; + assert_eq!(public as usize, canonical as usize); + } + #[test] + fn public_mma_sp_m16n8k16_f32_tf32_reexports_abi_i1040() { + let public: unsafe fn([f32; 4], [u32; 4], [u32; 4], u32, u32) -> [f32; 4] = + super::matrix::mma_sp_m16n8k16_f32_tf32; + let canonical: unsafe fn([f32; 4], [u32; 4], [u32; 4], u32, u32) -> [f32; 4] = + super::__cuda_oxide_intrinsic_abi_v1::i1040; + assert_eq!(public as usize, canonical as usize); + } + #[test] + fn public_mma_sp_m16n8k32_f16_f16_reexports_abi_i1045() { + let public: unsafe fn([u32; 2], [u32; 4], [u32; 4], u32, u32) -> [u32; 2] = + super::matrix::mma_sp_m16n8k32_f16_f16; + let canonical: unsafe fn([u32; 2], [u32; 4], [u32; 4], u32, u32) -> [u32; 2] = + super::__cuda_oxide_intrinsic_abi_v1::i1045; + assert_eq!(public as usize, canonical as usize); + } + #[test] + fn public_mma_sp_m16n8k32_f32_bf16_reexports_abi_i1044() { + let public: unsafe fn([f32; 4], [u32; 4], [u32; 4], u32, u32) -> [f32; 4] = + super::matrix::mma_sp_m16n8k32_f32_bf16; + let canonical: unsafe fn([f32; 4], [u32; 4], [u32; 4], u32, u32) -> [f32; 4] = + super::__cuda_oxide_intrinsic_abi_v1::i1044; + assert_eq!(public as usize, canonical as usize); + } + #[test] + fn public_mma_sp_m16n8k32_f32_f16_reexports_abi_i1046() { + let public: unsafe fn([f32; 4], [u32; 4], [u32; 4], u32, u32) -> [f32; 4] = + super::matrix::mma_sp_m16n8k32_f32_f16; + let canonical: unsafe fn([f32; 4], [u32; 4], [u32; 4], u32, u32) -> [f32; 4] = + super::__cuda_oxide_intrinsic_abi_v1::i1046; + assert_eq!(public as usize, canonical as usize); + } + #[test] fn public_mma_sp_m16n8k32_s32_s8_reexports_abi_i0163() { let public: unsafe fn([i32; 4], [u32; 2], [u32; 2], u32, u32) -> [i32; 4] = super::matrix::mma_sp_m16n8k32_s32_s8; @@ -5725,6 +5789,14 @@ mod tests { assert_eq!(public as usize, canonical as usize); } #[test] + fn public_mma_sp_m16n8k8_f32_tf32_reexports_abi_i1039() { + let public: unsafe fn([f32; 4], [u32; 2], [u32; 2], u32, u32) -> [f32; 4] = + super::matrix::mma_sp_m16n8k8_f32_tf32; + let canonical: unsafe fn([f32; 4], [u32; 2], [u32; 2], u32, u32) -> [f32; 4] = + super::__cuda_oxide_intrinsic_abi_v1::i1039; + assert_eq!(public as usize, canonical as usize); + } + #[test] fn public_mma_sp_ordered_metadata_m16n8k128_s32_s4_reexports_abi_i0203() { let public: unsafe fn([i32; 4], [u32; 4], [u32; 4], u32, u32) -> [i32; 4] = super::matrix::mma_sp_ordered_metadata_m16n8k128_s32_s4; diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/active_mask.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/active_mask.rs index b98af30924..b397e161af 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/active_mask.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/active_mask.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `active_mask` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/clc.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/clc.rs index 31ad15d2aa..c47085f35d 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/clc.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `clc` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_barrier.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_barrier.rs index 03e9b01832..12b6324751 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_barrier.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `cluster_barrier` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_memory.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_memory.rs index 8b71148cd8..b0d26f9064 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_memory.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `cluster_memory` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cp_async.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cp_async.rs index a70f45bc9a..766f8bd8dd 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cp_async.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cp_async.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `cp_async` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/debug_control.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/debug_control.rs index b9dd3af0a8..64abb333f5 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/debug_control.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `debug_control` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/dotprod.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/dotprod.rs index e18d1602b7..281e498b96 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/dotprod.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `dotprod` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/elect.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/elect.rs index e3a82698e6..084038b0ee 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/elect.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/elect.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `elect` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/execution_control.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/execution_control.rs index 5e62065edf..2f9c3290d1 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/execution_control.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/execution_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `execution_control` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/extended_minmax.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/extended_minmax.rs index 1e7852cd3e..95a409bc2e 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/extended_minmax.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/extended_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `extended_minmax` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/integer_minmax.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/integer_minmax.rs index 06f2b97853..7ad80f8ff1 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/integer_minmax.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/integer_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `integer_minmax` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/ldmatrix.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/ldmatrix.rs index afb45c1cd6..afd5056433 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/ldmatrix.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `ldmatrix` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_basic.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_basic.rs index 92cc6bef9f..8bd759c8d6 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_basic.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `mbarrier_basic` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_extended.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_extended.rs index cbd62399d2..d20633c0b8 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_extended.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `mbarrier_extended` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mod.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mod.rs index fae12bae4d..a296a7d03d 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mod.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated target requirements and separately imported LLVM/selection facts. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/movmatrix.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/movmatrix.rs index 082f67415a..08e9d68416 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/movmatrix.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `movmatrix` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_alu.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_alu.rs index 03d04d4ca7..0b032d609d 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_alu.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_alu.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `packed_alu` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_atomic.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_atomic.rs index b16813cd15..6765dd91c3 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_atomic.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `packed_atomic` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_conversion.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_conversion.rs index 5d2d7956f6..554e02f5d3 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_conversion.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `packed_conversion` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/prmt.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/prmt.rs index 218f67468c..8740d0facb 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/prmt.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `prmt` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/redux.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/redux.rs index c7cc2c8688..a38a04dace 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/redux.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/redux.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `redux` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/register_mma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/register_mma.rs index d39dec27bb..4fe8d1b569 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/register_mma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/register_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `register_mma` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_arithmetic.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_arithmetic.rs index 60a21dbe3f..a72852aa8c 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_arithmetic.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_arithmetic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `scalar_arithmetic` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_conversion.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_conversion.rs index a41ae115e0..cb0474e60c 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_conversion.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `scalar_conversion` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_math.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_math.rs index 74fc6f9745..5eb0369074 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_math.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_math.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `scalar_math` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sparse_mma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sparse_mma.rs index 5d932855a2..69292ab4ee 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sparse_mma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `sparse_mma` intrinsics. @@ -8517,4 +8517,524 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ result_range: None, }), }, + GeneratedIntrinsicTarget { + marker: "v1:i1039", + id: "mma_sp_m16n8k8_f32_tf32", + abi_id: "i1039", + dialect_op: "nvvm.sparse_mma", + variant: GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k8, + accumulator: GeneratedSparseMmaAccumulator::F32, + a_element: GeneratedSparseMmaElement::Tf32, + b_element: GeneratedSparseMmaElement::Tf32, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroThroughThree, + }, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( + 80, + )]), + }, + backend_requirements: &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ], + selections: &[GeneratedSelectionAlternative { + source_record: "anonymous_19330", + asm: "mma.sp.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71", + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[], + }, + }], + llvm: Some(GeneratedLlvmFacts { + properties: &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range", + ], + result_no_undef: false, + result_range: None, + }), + }, + GeneratedIntrinsicTarget { + marker: "v1:i1040", + id: "mma_sp_m16n8k16_f32_tf32", + abi_id: "i1040", + dialect_op: "nvvm.sparse_mma", + variant: GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k16, + accumulator: GeneratedSparseMmaAccumulator::F32, + a_element: GeneratedSparseMmaElement::Tf32, + b_element: GeneratedSparseMmaElement::Tf32, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroOrOne, + }, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( + 80, + )]), + }, + backend_requirements: &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ], + selections: &[GeneratedSelectionAlternative { + source_record: "anonymous_19336", + asm: "mma.sp.sync.aligned.m16n8k16.row.col.f32.tf32.tf32.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71", + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[], + }, + }], + llvm: Some(GeneratedLlvmFacts { + properties: &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range", + ], + result_no_undef: false, + result_range: None, + }), + }, + GeneratedIntrinsicTarget { + marker: "v1:i1041", + id: "mma_sp_m16n8k16_f32_bf16", + abi_id: "i1041", + dialect_op: "nvvm.sparse_mma", + variant: GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k16, + accumulator: GeneratedSparseMmaAccumulator::F32, + a_element: GeneratedSparseMmaElement::Bf16, + b_element: GeneratedSparseMmaElement::Bf16, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroThroughThree, + }, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( + 80, + )]), + }, + backend_requirements: &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ], + selections: &[GeneratedSelectionAlternative { + source_record: "anonymous_19308", + asm: "mma.sp.sync.aligned.m16n8k16.row.col.f32.bf16.bf16.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71", + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[], + }, + }], + llvm: Some(GeneratedLlvmFacts { + properties: &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range", + ], + result_no_undef: false, + result_range: None, + }), + }, + GeneratedIntrinsicTarget { + marker: "v1:i1042", + id: "mma_sp_m16n8k16_f16_f16", + abi_id: "i1042", + dialect_op: "nvvm.sparse_mma", + variant: GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k16, + accumulator: GeneratedSparseMmaAccumulator::F16, + a_element: GeneratedSparseMmaElement::F16, + b_element: GeneratedSparseMmaElement::F16, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroThroughThree, + }, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( + 80, + )]), + }, + backend_requirements: &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ], + selections: &[GeneratedSelectionAlternative { + source_record: "anonymous_19344", + asm: "mma.sp.sync.aligned.m16n8k16.row.col.f16.f16.f16.f16\n\t\t{{$rd0, $rd1}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71", + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[], + }, + }], + llvm: Some(GeneratedLlvmFacts { + properties: &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range", + ], + result_no_undef: false, + result_range: None, + }), + }, + GeneratedIntrinsicTarget { + marker: "v1:i1043", + id: "mma_sp_m16n8k16_f32_f16", + abi_id: "i1043", + dialect_op: "nvvm.sparse_mma", + variant: GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k16, + accumulator: GeneratedSparseMmaAccumulator::F32, + a_element: GeneratedSparseMmaElement::F16, + b_element: GeneratedSparseMmaElement::F16, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroThroughThree, + }, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( + 80, + )]), + }, + backend_requirements: &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ], + selections: &[GeneratedSelectionAlternative { + source_record: "anonymous_19348", + asm: "mma.sp.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71", + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[], + }, + }], + llvm: Some(GeneratedLlvmFacts { + properties: &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range", + ], + result_no_undef: false, + result_range: None, + }), + }, + GeneratedIntrinsicTarget { + marker: "v1:i1044", + id: "mma_sp_m16n8k32_f32_bf16", + abi_id: "i1044", + dialect_op: "nvvm.sparse_mma", + variant: GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k32, + accumulator: GeneratedSparseMmaAccumulator::F32, + a_element: GeneratedSparseMmaElement::Bf16, + b_element: GeneratedSparseMmaElement::Bf16, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroOrOne, + }, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( + 80, + )]), + }, + backend_requirements: &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ], + selections: &[GeneratedSelectionAlternative { + source_record: "anonymous_19322", + asm: "mma.sp.sync.aligned.m16n8k32.row.col.f32.bf16.bf16.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71", + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[], + }, + }], + llvm: Some(GeneratedLlvmFacts { + properties: &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range", + ], + result_no_undef: false, + result_range: None, + }), + }, + GeneratedIntrinsicTarget { + marker: "v1:i1045", + id: "mma_sp_m16n8k32_f16_f16", + abi_id: "i1045", + dialect_op: "nvvm.sparse_mma", + variant: GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k32, + accumulator: GeneratedSparseMmaAccumulator::F16, + a_element: GeneratedSparseMmaElement::F16, + b_element: GeneratedSparseMmaElement::F16, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroOrOne, + }, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( + 80, + )]), + }, + backend_requirements: &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ], + selections: &[GeneratedSelectionAlternative { + source_record: "anonymous_19356", + asm: "mma.sp.sync.aligned.m16n8k32.row.col.f16.f16.f16.f16\n\t\t{{$rd0, $rd1}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71", + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[], + }, + }], + llvm: Some(GeneratedLlvmFacts { + properties: &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range", + ], + result_no_undef: false, + result_range: None, + }), + }, + GeneratedIntrinsicTarget { + marker: "v1:i1046", + id: "mma_sp_m16n8k32_f32_f16", + abi_id: "i1046", + dialect_op: "nvvm.sparse_mma", + variant: GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k32, + accumulator: GeneratedSparseMmaAccumulator::F32, + a_element: GeneratedSparseMmaElement::F16, + b_element: GeneratedSparseMmaElement::F16, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroOrOne, + }, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( + 80, + )]), + }, + backend_requirements: &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ], + selections: &[GeneratedSelectionAlternative { + source_record: "anonymous_19360", + asm: "mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71", + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[], + }, + }], + llvm: Some(GeneratedLlvmFacts { + properties: &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range", + ], + result_no_undef: false, + result_range: None, + }), + }, ]; diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sreg.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sreg.rs index 425aff37d8..448b7bf4db 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sreg.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `sreg` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/stmatrix.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/stmatrix.rs index cc5ca29161..9cc8b3c7f8 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/stmatrix.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `stmatrix` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sync.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sync.rs index 80010ce4bb..8c9caa1492 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sync.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sync.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `sync` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_cp.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_cp.rs index f85ca20ab1..c824567908 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_cp.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_cp.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tcgen05_cp` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_ld.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_ld.rs index 8fe001d6b5..40389c6b7c 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_ld.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_ld.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tcgen05_ld` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma.rs index be40bde5d2..063c7d9b3b 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tcgen05_mma` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma_ws.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma_ws.rs index 1e621efbe7..892802b781 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma_ws.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma_ws.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tcgen05_mma_ws` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_other.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_other.rs index d3fd5dbdff..a124c90247 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_other.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_other.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tcgen05_other` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_st.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_st.rs index 82f51f8e93..80b9d3fccf 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_st.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_st.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tcgen05_st` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/active_mask.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/active_mask.rs index 26ca71b44d..dfb76df7db 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/active_mask.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/active_mask.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `active_mask` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/clc.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/clc.rs index 7c98e49459..a2a9c461c5 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/clc.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `clc` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_barrier.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_barrier.rs index 734046a818..7aa2255c84 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_barrier.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `cluster_barrier` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_memory.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_memory.rs index b6912253dc..56346a80c6 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_memory.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `cluster_memory` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cp_async.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cp_async.rs index 1de82cf936..96f849a331 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cp_async.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cp_async.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `cp_async` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/debug_control.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/debug_control.rs index 9166dcc661..71eb7f630b 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/debug_control.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `debug_control` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/dotprod.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/dotprod.rs index 9f0a3fdeb1..63c56e53e1 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/dotprod.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `dotprod` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/elect.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/elect.rs index fb0ec54a76..be23f66705 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/elect.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/elect.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `elect` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/execution_control.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/execution_control.rs index 26b58a196c..95bf24421d 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/execution_control.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/execution_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `execution_control` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/extended_minmax.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/extended_minmax.rs index 6366219601..fb5cfffa40 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/extended_minmax.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/extended_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `extended_minmax` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/integer_minmax.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/integer_minmax.rs index ccb9d78ade..2a89c6ef6e 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/integer_minmax.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/integer_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `integer_minmax` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/ldmatrix.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/ldmatrix.rs index 8443460449..7ad31fd1eb 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/ldmatrix.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `ldmatrix` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_basic.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_basic.rs index 84a9a99d29..e248974952 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_basic.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `mbarrier_basic` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_extended.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_extended.rs index 489f4002ad..f33f40bcd1 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_extended.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `mbarrier_extended` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mod.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mod.rs index 3563eb4391..82e4ec97ab 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mod.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests, grouped per family shard. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/movmatrix.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/movmatrix.rs index 0b11ce5341..b33cdf990f 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/movmatrix.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `movmatrix` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_alu.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_alu.rs index 6bd00d7b5f..a48dec3791 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_alu.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_alu.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `packed_alu` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_atomic.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_atomic.rs index 662abc5144..8c136709de 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_atomic.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `packed_atomic` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_conversion.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_conversion.rs index 7946d3a243..6125516313 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_conversion.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `packed_conversion` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/prmt.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/prmt.rs index 68b0189d30..ff9ff7d1d5 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/prmt.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `prmt` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/redux.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/redux.rs index 02715a5695..51f7ec2b29 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/redux.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/redux.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `redux` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_float.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_float.rs index 85b894a235..4464f895d4 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_float.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_float.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `register_mma_float` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_s32.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_s32.rs index 039355ee52..93d315bf26 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_s32.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_s32.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `register_mma_s32` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_arithmetic.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_arithmetic.rs index 6b65cae93b..eef74414a2 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_arithmetic.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_arithmetic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `scalar_arithmetic` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_conversion.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_conversion.rs index a7c82b59bb..cd0f626577 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_conversion.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `scalar_conversion` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_math.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_math.rs index dda7dcaba5..16142e680f 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_math.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_math.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `scalar_math` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sparse_mma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sparse_mma.rs index cd986ff572..031b56e2d3 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sparse_mma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `sparse_mma` intrinsics. @@ -10292,3 +10292,611 @@ fn mma_sp_m16n8k64_f32_e5m2_e5m2_f32_target_matches_the_catalog() { ] as &[&str] ); } + +#[test] +fn mma_sp_m16n8k8_f32_tf32_target_matches_the_catalog() { + let target = generated_intrinsic_target_by_marker("v1:i1039").unwrap(); + assert_eq!(target.id, "mma_sp_m16n8k8_f32_tf32"); + assert_eq!(target.abi_id, "i1039"); + assert_eq!(target.dialect_op, "nvvm.sparse_mma"); + assert_eq!( + target.variant, + GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k8, + accumulator: GeneratedSparseMmaAccumulator::F32, + a_element: GeneratedSparseMmaElement::Tf32, + b_element: GeneratedSparseMmaElement::Tf32, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroThroughThree + } + ); + assert_eq!(target.requirement.minimum_ptx.encoded(), 71); + assert_eq!( + target.requirement.hardware, + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + ); + assert_eq!( + target.backend_requirements, + const { + &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ] + } + ); + assert_eq!( + target.selections, + &[GeneratedSelectionAlternative { + source_record: "anonymous_19330", + asm: "mma.sp.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[] + } + },] + ); + assert_eq!( + target.llvm.unwrap().properties, + &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ] as &[&str] + ); +} + +#[test] +fn mma_sp_m16n8k16_f32_tf32_target_matches_the_catalog() { + let target = generated_intrinsic_target_by_marker("v1:i1040").unwrap(); + assert_eq!(target.id, "mma_sp_m16n8k16_f32_tf32"); + assert_eq!(target.abi_id, "i1040"); + assert_eq!(target.dialect_op, "nvvm.sparse_mma"); + assert_eq!( + target.variant, + GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k16, + accumulator: GeneratedSparseMmaAccumulator::F32, + a_element: GeneratedSparseMmaElement::Tf32, + b_element: GeneratedSparseMmaElement::Tf32, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroOrOne + } + ); + assert_eq!(target.requirement.minimum_ptx.encoded(), 71); + assert_eq!( + target.requirement.hardware, + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + ); + assert_eq!( + target.backend_requirements, + const { + &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ] + } + ); + assert_eq!( + target.selections, + &[GeneratedSelectionAlternative { + source_record: "anonymous_19336", + asm: "mma.sp.sync.aligned.m16n8k16.row.col.f32.tf32.tf32.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[] + } + },] + ); + assert_eq!( + target.llvm.unwrap().properties, + &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ] as &[&str] + ); +} + +#[test] +fn mma_sp_m16n8k16_f32_bf16_target_matches_the_catalog() { + let target = generated_intrinsic_target_by_marker("v1:i1041").unwrap(); + assert_eq!(target.id, "mma_sp_m16n8k16_f32_bf16"); + assert_eq!(target.abi_id, "i1041"); + assert_eq!(target.dialect_op, "nvvm.sparse_mma"); + assert_eq!( + target.variant, + GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k16, + accumulator: GeneratedSparseMmaAccumulator::F32, + a_element: GeneratedSparseMmaElement::Bf16, + b_element: GeneratedSparseMmaElement::Bf16, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroThroughThree + } + ); + assert_eq!(target.requirement.minimum_ptx.encoded(), 71); + assert_eq!( + target.requirement.hardware, + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + ); + assert_eq!( + target.backend_requirements, + const { + &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ] + } + ); + assert_eq!( + target.selections, + &[GeneratedSelectionAlternative { + source_record: "anonymous_19308", + asm: "mma.sp.sync.aligned.m16n8k16.row.col.f32.bf16.bf16.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[] + } + },] + ); + assert_eq!( + target.llvm.unwrap().properties, + &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ] as &[&str] + ); +} + +#[test] +fn mma_sp_m16n8k16_f16_f16_target_matches_the_catalog() { + let target = generated_intrinsic_target_by_marker("v1:i1042").unwrap(); + assert_eq!(target.id, "mma_sp_m16n8k16_f16_f16"); + assert_eq!(target.abi_id, "i1042"); + assert_eq!(target.dialect_op, "nvvm.sparse_mma"); + assert_eq!( + target.variant, + GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k16, + accumulator: GeneratedSparseMmaAccumulator::F16, + a_element: GeneratedSparseMmaElement::F16, + b_element: GeneratedSparseMmaElement::F16, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroThroughThree + } + ); + assert_eq!(target.requirement.minimum_ptx.encoded(), 71); + assert_eq!( + target.requirement.hardware, + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + ); + assert_eq!( + target.backend_requirements, + const { + &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ] + } + ); + assert_eq!( + target.selections, + &[GeneratedSelectionAlternative { + source_record: "anonymous_19344", + asm: "mma.sp.sync.aligned.m16n8k16.row.col.f16.f16.f16.f16\n\t\t{{$rd0, $rd1}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[] + } + },] + ); + assert_eq!( + target.llvm.unwrap().properties, + &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ] as &[&str] + ); +} + +#[test] +fn mma_sp_m16n8k16_f32_f16_target_matches_the_catalog() { + let target = generated_intrinsic_target_by_marker("v1:i1043").unwrap(); + assert_eq!(target.id, "mma_sp_m16n8k16_f32_f16"); + assert_eq!(target.abi_id, "i1043"); + assert_eq!(target.dialect_op, "nvvm.sparse_mma"); + assert_eq!( + target.variant, + GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k16, + accumulator: GeneratedSparseMmaAccumulator::F32, + a_element: GeneratedSparseMmaElement::F16, + b_element: GeneratedSparseMmaElement::F16, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroThroughThree + } + ); + assert_eq!(target.requirement.minimum_ptx.encoded(), 71); + assert_eq!( + target.requirement.hardware, + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + ); + assert_eq!( + target.backend_requirements, + const { + &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ] + } + ); + assert_eq!( + target.selections, + &[GeneratedSelectionAlternative { + source_record: "anonymous_19348", + asm: "mma.sp.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[] + } + },] + ); + assert_eq!( + target.llvm.unwrap().properties, + &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ] as &[&str] + ); +} + +#[test] +fn mma_sp_m16n8k32_f32_bf16_target_matches_the_catalog() { + let target = generated_intrinsic_target_by_marker("v1:i1044").unwrap(); + assert_eq!(target.id, "mma_sp_m16n8k32_f32_bf16"); + assert_eq!(target.abi_id, "i1044"); + assert_eq!(target.dialect_op, "nvvm.sparse_mma"); + assert_eq!( + target.variant, + GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k32, + accumulator: GeneratedSparseMmaAccumulator::F32, + a_element: GeneratedSparseMmaElement::Bf16, + b_element: GeneratedSparseMmaElement::Bf16, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroOrOne + } + ); + assert_eq!(target.requirement.minimum_ptx.encoded(), 71); + assert_eq!( + target.requirement.hardware, + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + ); + assert_eq!( + target.backend_requirements, + const { + &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ] + } + ); + assert_eq!( + target.selections, + &[GeneratedSelectionAlternative { + source_record: "anonymous_19322", + asm: "mma.sp.sync.aligned.m16n8k32.row.col.f32.bf16.bf16.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[] + } + },] + ); + assert_eq!( + target.llvm.unwrap().properties, + &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ] as &[&str] + ); +} + +#[test] +fn mma_sp_m16n8k32_f16_f16_target_matches_the_catalog() { + let target = generated_intrinsic_target_by_marker("v1:i1045").unwrap(); + assert_eq!(target.id, "mma_sp_m16n8k32_f16_f16"); + assert_eq!(target.abi_id, "i1045"); + assert_eq!(target.dialect_op, "nvvm.sparse_mma"); + assert_eq!( + target.variant, + GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k32, + accumulator: GeneratedSparseMmaAccumulator::F16, + a_element: GeneratedSparseMmaElement::F16, + b_element: GeneratedSparseMmaElement::F16, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroOrOne + } + ); + assert_eq!(target.requirement.minimum_ptx.encoded(), 71); + assert_eq!( + target.requirement.hardware, + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + ); + assert_eq!( + target.backend_requirements, + const { + &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ] + } + ); + assert_eq!( + target.selections, + &[GeneratedSelectionAlternative { + source_record: "anonymous_19356", + asm: "mma.sp.sync.aligned.m16n8k32.row.col.f16.f16.f16.f16\n\t\t{{$rd0, $rd1}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[] + } + },] + ); + assert_eq!( + target.llvm.unwrap().properties, + &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ] as &[&str] + ); +} + +#[test] +fn mma_sp_m16n8k32_f32_f16_target_matches_the_catalog() { + let target = generated_intrinsic_target_by_marker("v1:i1046").unwrap(); + assert_eq!(target.id, "mma_sp_m16n8k32_f32_f16"); + assert_eq!(target.abi_id, "i1046"); + assert_eq!(target.dialect_op, "nvvm.sparse_mma"); + assert_eq!( + target.variant, + GeneratedIntrinsicVariant::SparseMma { + shape: GeneratedSparseMmaShape::M16n8k32, + accumulator: GeneratedSparseMmaAccumulator::F32, + a_element: GeneratedSparseMmaElement::F16, + b_element: GeneratedSparseMmaElement::F16, + a_layout: GeneratedSparseMmaLayout::Row, + b_layout: GeneratedSparseMmaLayout::Col, + overflow: GeneratedSparseMmaOverflow::NotApplicable, + metadata: GeneratedSparseMmaMetadata::Standard, + selector: GeneratedSparseMmaSelector::ImmediateZeroOrOne + } + ); + assert_eq!(target.requirement.minimum_ptx.encoded(), 71); + assert_eq!( + target.requirement.hardware, + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + ); + assert_eq!( + target.backend_requirements, + const { + &[ + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LlvmNvptx, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + GeneratedBackendRequirement { + backend: GeneratedIntrinsicBackend::LibNvvm, + requirement: GeneratedTargetRequirement { + minimum_ptx: GeneratedPtxVersion::from_encoded(71), + hardware: GeneratedHardwareTarget::AnyOf(&[ + GeneratedHardwareAlternative::MinimumSm(80), + ]), + }, + }, + ] + } + ); + assert_eq!( + target.selections, + &[GeneratedSelectionAlternative { + source_record: "anonymous_19360", + asm: "mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + predicates: &[ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ], + constraints: GeneratedSelectionConstraints { + address_space: None, + immediate_bindings: &[] + } + },] + ); + assert_eq!( + target.llvm.unwrap().properties, + &[ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ] as &[&str] + ); +} diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sreg.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sreg.rs index 0f049292aa..a9060cedb4 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sreg.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `sreg` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/stmatrix.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/stmatrix.rs index 04de6265b2..d9948a7379 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/stmatrix.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `stmatrix` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sync.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sync.rs index 56e87ad452..8530930f9a 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sync.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sync.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `sync` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_cp.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_cp.rs index 4386115e63..a8d51884dd 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_cp.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_cp.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tcgen05_cp` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_ld.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_ld.rs index 1017a9f455..e938a3d7c5 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_ld.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_ld.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tcgen05_ld` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma.rs index a077eb0e5b..c9a05337f1 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tcgen05_mma` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma_ws.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma_ws.rs index a6b1cbc212..5b46e1dee4 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma_ws.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma_ws.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tcgen05_mma_ws` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_other.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_other.rs index 4fe601b16c..564285e4cb 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_other.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_other.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tcgen05_other` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_st.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_st.rs index aaa9c828d9..b7689e6be0 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_st.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_st.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tcgen05_st` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tma.rs index 2072748ea7..c59d85608f 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tma` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/vote.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/vote.rs index 72b99c50d2..e46dab8a32 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/vote.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/vote.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `vote` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_barrier.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_barrier.rs index 901e09e656..92b86d3198 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_barrier.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `warp_barrier` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_match.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_match.rs index 87fb6f18d8..3584a812dc 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_match.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_match.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `warp_match` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_shuffle.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_shuffle.rs index 69e7fd10fe..7e3bb67339 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_shuffle.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_shuffle.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `warp_shuffle` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/wgmma_control.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/wgmma_control.rs index 1fe226c429..bfe81d3fc2 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/wgmma_control.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `wgmma_control` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tma.rs index a1858f9e89..483045b816 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tma` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/vote.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/vote.rs index 44f829e5df..92e58ac979 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/vote.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/vote.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `vote` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_barrier.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_barrier.rs index bc7aad6911..5ff53e282b 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_barrier.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `warp_barrier` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_match.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_match.rs index 12f9894c87..6946ee6884 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_match.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_match.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `warp_match` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_shuffle.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_shuffle.rs index 0b1891da9d..a9e91e483f 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_shuffle.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_shuffle.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `warp_shuffle` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/wgmma_control.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/wgmma_control.rs index 3a205d31cc..b94eabbc38 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/wgmma_control.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `wgmma_control` intrinsics. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/active_mask.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/active_mask.rs index a9495a2ce2..1fadbce454 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/active_mask.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/active_mask.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operation for the generated active warp mask. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/clc.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/clc.rs index 725bccc422..6debbac95b 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/clc.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated Cluster Launch Control operations. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_barrier.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_barrier.rs index a625b4e58a..bdb73c6e69 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_barrier.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated operations for the closed cluster-barrier family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_memory.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_memory.rs index 21d02655d5..06d5b7d9c6 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_memory.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for cluster address mapping and remote shared reads. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cp_async.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cp_async.rs index c043e4082f..451a37f78d 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cp_async.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cp_async.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for classic `cp.async` instructions. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/debug_control.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/debug_control.rs index f5bd427647..d151bad096 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/debug_control.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for generated PTX debug controls. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/dotprod.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/dotprod.rs index 5149db0eff..834f8c6c8d 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/dotprod.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for generated packed integer dot products. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/elect.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/elect.rs index 9fd056a5d0..901b47d153 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/elect.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/elect.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated warp leader-election operation. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/execution_control.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/execution_control.rs index 1dc0242394..c3bd6b07eb 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/execution_control.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/execution_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated counted-barrier, grid-dependency, and register-control operations. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/extended_minmax.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/extended_minmax.rs index 31808ec24c..28dec99a6f 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/extended_minmax.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/extended_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for extended floating-point min/max. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/integer_minmax.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/integer_minmax.rs index 956c4a7cab..8c16bdf1b1 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/integer_minmax.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/integer_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for generated extended integer min/max. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/ldmatrix.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/ldmatrix.rs index 5c9e6433c4..0845f7904b 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/ldmatrix.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operation and compatibility carriers for generated `ldmatrix`. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_basic.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_basic.rs index 28e36eaf1d..7ecb8b5b3f 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_basic.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for the basic shared-memory mbarrier lifecycle. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_extended.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_extended.rs index 040d990e95..802c6c6e7f 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_extended.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for extended mbarrier and async-proxy instructions. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mod.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mod.rs index 1f009779b9..1ce229dec6 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mod.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. mod active_mask; diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/movmatrix.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/movmatrix.rs index c36bee63cd..f704aa39a6 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/movmatrix.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operation for generated in-register matrix transpose. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_alu.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_alu.rs index ff8f56f8a7..d52a4f5b17 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_alu.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_alu.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for generated packed floating-point arithmetic. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_atomic.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_atomic.rs index c222cf85bb..04f1609b25 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_atomic.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for the closed generated packed-atomic family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_conversion.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_conversion.rs index 4223b26248..1c06d139a8 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_conversion.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operation for generated packed conversion. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/prmt.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/prmt.rs index 8c55ea87fb..4b2674c206 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/prmt.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for the closed generated `prmt` family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/redux.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/redux.rs index f66d2dfe03..288c3a7c11 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/redux.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/redux.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural NVVM operations for the closed generated `redux.sync` family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/register_mma.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/register_mma.rs index b6bf65886f..7da0416341 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/register_mma.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/register_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for generated register-only `mma.sync` variants. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_arithmetic.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_arithmetic.rs index 1fc9f83f5d..beff46e03f 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_arithmetic.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_arithmetic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for generated scalar arithmetic. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_conversion.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_conversion.rs index 35358e18bc..452c40427b 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_conversion.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for generated `f32` to TF32 conversions. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_math.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_math.rs index bcfd1655b6..89a71fc84b 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_math.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_math.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for generated scalar math. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sparse_mma.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sparse_mma.rs index df9659d2f9..9ba9e31ed2 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sparse_mma.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for generated sparse MMA variants. @@ -452,6 +452,225 @@ impl Verify for SparseMmaOp { ], 1, ), + ( + Some(&SparseMmaShapeAttr::M16n8k16), + Some(&SparseMmaAccumulatorAttr::F16), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroThroughThree), + ) => ( + &[ + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + ], + &[MmaCarrier::U32, MmaCarrier::U32], + 4, + ), + ( + Some(&SparseMmaShapeAttr::M16n8k16), + Some(&SparseMmaAccumulatorAttr::F32), + Some(&SparseMmaElementAttr::Bf16), + Some(&SparseMmaElementAttr::Bf16), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroThroughThree), + ) => ( + &[ + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + ], + &[ + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + ], + 4, + ), + ( + Some(&SparseMmaShapeAttr::M16n8k16), + Some(&SparseMmaAccumulatorAttr::F32), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroThroughThree), + ) => ( + &[ + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + ], + &[ + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + ], + 4, + ), + ( + Some(&SparseMmaShapeAttr::M16n8k16), + Some(&SparseMmaAccumulatorAttr::F32), + Some(&SparseMmaElementAttr::Tf32), + Some(&SparseMmaElementAttr::Tf32), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroOrOne), + ) => ( + &[ + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + ], + &[ + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + ], + 2, + ), + ( + Some(&SparseMmaShapeAttr::M16n8k32), + Some(&SparseMmaAccumulatorAttr::F16), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroOrOne), + ) => ( + &[ + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + ], + &[MmaCarrier::U32, MmaCarrier::U32], + 2, + ), + ( + Some(&SparseMmaShapeAttr::M16n8k32), + Some(&SparseMmaAccumulatorAttr::F32), + Some(&SparseMmaElementAttr::Bf16), + Some(&SparseMmaElementAttr::Bf16), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroOrOne), + ) => ( + &[ + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + ], + &[ + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + ], + 2, + ), + ( + Some(&SparseMmaShapeAttr::M16n8k32), + Some(&SparseMmaAccumulatorAttr::F32), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroOrOne), + ) => ( + &[ + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + ], + &[ + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + ], + 2, + ), ( Some(&SparseMmaShapeAttr::M16n8k32), Some(&SparseMmaAccumulatorAttr::S32), @@ -1368,6 +1587,37 @@ impl Verify for SparseMmaOp { ], 1, ), + ( + Some(&SparseMmaShapeAttr::M16n8k8), + Some(&SparseMmaAccumulatorAttr::F32), + Some(&SparseMmaElementAttr::Tf32), + Some(&SparseMmaElementAttr::Tf32), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroThroughThree), + ) => ( + &[ + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + MmaCarrier::U32, + ], + &[ + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + MmaCarrier::F32, + ], + 4, + ), ( Some(&SparseMmaShapeAttr::M16n8k128), Some(&SparseMmaAccumulatorAttr::S32), diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sreg.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sreg.rs index dd514a3e42..4daa902edb 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sreg.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural NVVM operations for generated special-register reads. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/stmatrix.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/stmatrix.rs index fbde0f174f..df32842e00 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/stmatrix.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for the four generated `stmatrix` stores. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sync.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sync.rs index 6e0f7527db..7ac2658a52 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sync.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sync.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operation for generated CTA synchronization. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tcgen05.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tcgen05.rs index 95dd733aad..59178412e7 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tcgen05.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tcgen05.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated Tensor Core Generation 5 operations. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tma.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tma.rs index 2a6454bc62..d411784031 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tma.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated Tensor Memory Accelerator operations. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/vote.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/vote.rs index 61fe550adf..83030db334 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/vote.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/vote.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for the generated `vote.sync` family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_barrier.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_barrier.rs index 1c280bfe18..45c070217c 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_barrier.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operation for generated warp synchronization. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_match.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_match.rs index d10423c5c2..15014a03c3 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_match.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_match.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for the generated `match.sync` family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_shuffle.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_shuffle.rs index 4a33bd74f5..05f7e6e2f8 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_shuffle.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_shuffle.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for the generated `shfl.sync` family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/wgmma_control.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/wgmma_control.rs index 8de8f3f129..8bc92022db 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/wgmma_control.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for generated WGMMA controls. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/active_mask.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/active_mask.rs index 230d9328f1..257a2fbc42 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/active_mask.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/active_mask.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `active_mask` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/clc.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/clc.rs index 8564244bef..48e083a4c5 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/clc.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `clc` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_barrier.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_barrier.rs index 0003ca73b3..e3490061c0 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_barrier.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `cluster_barrier` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_memory.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_memory.rs index 9b98425297..47625111e0 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_memory.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `cluster_memory` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cp_async.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cp_async.rs index 2f094cbde2..67909c2cc5 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cp_async.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cp_async.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `cp_async` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/debug_control.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/debug_control.rs index d7121a8933..cfb1ffbd55 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/debug_control.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `debug_control` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/dotprod.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/dotprod.rs index 8a0f114705..b4aaf667ef 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/dotprod.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `dotprod` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/elect.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/elect.rs index 5e57988c8f..17772100ec 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/elect.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/elect.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `elect` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/execution_control.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/execution_control.rs index ae5162f1bf..900c6b3291 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/execution_control.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/execution_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `execution_control` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/extended_minmax.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/extended_minmax.rs index 0ca7643ffb..91bd49491a 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/extended_minmax.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/extended_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `extended_minmax` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/helpers.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/helpers.rs index a75e5f01c3..b212be35df 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/helpers.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/helpers.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Shared glue for the generated intrinsic dispatch shards. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/integer_minmax.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/integer_minmax.rs index 81160e1b04..eb53ff4f15 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/integer_minmax.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/integer_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `integer_minmax` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/ldmatrix.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/ldmatrix.rs index 89203b59b7..3e04d7bee9 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/ldmatrix.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `ldmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_basic.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_basic.rs index abbfe8b90c..ed9aaf64c7 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_basic.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `mbarrier_basic` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_extended.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_extended.rs index e7b455627c..2a5a97c841 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_extended.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `mbarrier_extended` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mod.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mod.rs index e3355982d3..f48234e5a1 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mod.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility path dispatch for CUDA intrinsics. @@ -1254,6 +1254,20 @@ pub fn is_generated_intrinsic_path(name: &str) -> bool { | "cuda_device::wmma::mma_sp_m16n8k128_s32_u4_s4_satfinite" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0225" | "cuda_device::wmma::mma_sp_m16n8k128_s32_u4_satfinite" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1042" + | "cuda_device::wmma::mma_sp_m16n8k16_f16_f16" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1041" + | "cuda_device::wmma::mma_sp_m16n8k16_f32_bf16" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1043" + | "cuda_device::wmma::mma_sp_m16n8k16_f32_f16" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1040" + | "cuda_device::wmma::mma_sp_m16n8k16_f32_tf32" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1045" + | "cuda_device::wmma::mma_sp_m16n8k32_f16_f16" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1044" + | "cuda_device::wmma::mma_sp_m16n8k32_f32_bf16" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1046" + | "cuda_device::wmma::mma_sp_m16n8k32_f32_f16" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0163" | "cuda_device::wmma::mma_sp_m16n8k32_s32_s8" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0167" @@ -1310,6 +1324,8 @@ pub fn is_generated_intrinsic_path(name: &str) -> bool { | "cuda_device::wmma::mma_sp_m16n8k64_s32_u8_s8_satfinite" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0193" | "cuda_device::wmma::mma_sp_m16n8k64_s32_u8_satfinite" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1039" + | "cuda_device::wmma::mma_sp_m16n8k8_f32_tf32" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0203" | "cuda_device::wmma::mma_sp_ordered_metadata_m16n8k128_s32_s4" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0207" @@ -2789,6 +2805,13 @@ pub fn is_raw_generated_intrinsic_path(name: &str) -> bool { | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0222" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0226" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0225" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1042" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1041" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1043" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1040" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1045" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1044" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1046" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0163" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0167" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0164" @@ -2817,6 +2840,7 @@ pub fn is_raw_generated_intrinsic_path(name: &str) -> bool { | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0190" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0194" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0193" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1039" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0203" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0207" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0204" @@ -4410,6 +4434,20 @@ pub fn generated_intrinsic_marker(name: &str) -> Option<&'static str> { | "cuda_device::wmma::mma_sp_m16n8k128_s32_u4_s4_satfinite" => Some("v1:i0226"), "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0225" | "cuda_device::wmma::mma_sp_m16n8k128_s32_u4_satfinite" => Some("v1:i0225"), + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1042" + | "cuda_device::wmma::mma_sp_m16n8k16_f16_f16" => Some("v1:i1042"), + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1041" + | "cuda_device::wmma::mma_sp_m16n8k16_f32_bf16" => Some("v1:i1041"), + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1043" + | "cuda_device::wmma::mma_sp_m16n8k16_f32_f16" => Some("v1:i1043"), + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1040" + | "cuda_device::wmma::mma_sp_m16n8k16_f32_tf32" => Some("v1:i1040"), + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1045" + | "cuda_device::wmma::mma_sp_m16n8k32_f16_f16" => Some("v1:i1045"), + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1044" + | "cuda_device::wmma::mma_sp_m16n8k32_f32_bf16" => Some("v1:i1044"), + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1046" + | "cuda_device::wmma::mma_sp_m16n8k32_f32_f16" => Some("v1:i1046"), "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0163" | "cuda_device::wmma::mma_sp_m16n8k32_s32_s8" => Some("v1:i0163"), "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0167" @@ -4466,6 +4504,8 @@ pub fn generated_intrinsic_marker(name: &str) -> Option<&'static str> { | "cuda_device::wmma::mma_sp_m16n8k64_s32_u8_s8_satfinite" => Some("v1:i0194"), "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0193" | "cuda_device::wmma::mma_sp_m16n8k64_s32_u8_satfinite" => Some("v1:i0193"), + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1039" + | "cuda_device::wmma::mma_sp_m16n8k8_f32_tf32" => Some("v1:i1039"), "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0203" | "cuda_device::wmma::mma_sp_ordered_metadata_m16n8k128_s32_s4" => Some("v1:i0203"), "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0207" diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/movmatrix.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/movmatrix.rs index e88cca166a..b3f204c4a9 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/movmatrix.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `movmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_alu.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_alu.rs index 2dbde4941c..87e5b07aed 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_alu.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_alu.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `packed_alu` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_atomic.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_atomic.rs index 17ace3efe1..f9bae0a870 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_atomic.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `packed_atomic` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_conversion.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_conversion.rs index 72cca157a1..3ea7f2af8a 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_conversion.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `packed_conversion` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/prmt.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/prmt.rs index d0ca47ff84..637ce5d3df 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/prmt.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `prmt` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/redux.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/redux.rs index a4266d3dcb..5355677ad9 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/redux.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/redux.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `redux` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/register_mma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/register_mma.rs index 96fbc9a321..b7f0491b7f 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/register_mma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/register_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `register_mma` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_arithmetic.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_arithmetic.rs index 5169f0a38e..02c37cf03f 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_arithmetic.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_arithmetic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `scalar_arithmetic` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_conversion.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_conversion.rs index fa13d0392c..45665f838f 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_conversion.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `scalar_conversion` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_math.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_math.rs index e3dcd08795..de4c050f9a 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_math.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_math.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `scalar_math` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sparse_mma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sparse_mma.rs index 0caab1ecbc..844e85d693 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sparse_mma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `sparse_mma` intrinsics. @@ -738,6 +738,627 @@ pub(super) fn try_dispatch( "mma_sp_m16n8k128_s32_u4_satfinite call without target block", )?)) } + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1042" + | "cuda_device::wmma::mma_sp_m16n8k16_f16_f16" => { + require_arity(name, args.len(), 5, &loc)?; + if !matches!(&args[4], mir::Operand::Constant(_)) { + return input_err!( + loc, + TranslationErr::unsupported( + "sparse MMA selector must be the compile-time constant 0, 1, 2, or 3" + .to_owned() + ) + ); + } + let (mut operands, last_op, result_ty, result_count) = import_generated_mma_operands( + ctx, + body, + args, + block_ptr, + prev_op, + value_map, + loc.clone(), + GeneratedMmaImportAdapter::C2U32A2U32B2U32ToD2U32, + )?; + let (metadata, last_op) = rvalue::translate_operand( + ctx, + body, + &args[3], + value_map, + block_ptr, + Some(last_op), + loc.clone(), + )?; + operands.push(metadata); + let (selector_value, last_op) = rvalue::translate_operand( + ctx, + body, + &args[4], + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + operands.push(selector_value); + let mma = Operation::new( + ctx, + SparseMmaOp::get_concrete_op_info(), + vec![result_ty; result_count], + operands, + vec![], + 0, + ); + mma.deref_mut(ctx).set_loc(loc.clone()); + let mma = SparseMmaOp::new(mma); + mma.set_attr_nvvm_sparse_mma_shape(ctx, SparseMmaShapeAttr::M16n8k16); + mma.set_attr_nvvm_sparse_mma_accumulator(ctx, SparseMmaAccumulatorAttr::F16); + mma.set_attr_nvvm_sparse_mma_a_element(ctx, SparseMmaElementAttr::F16); + mma.set_attr_nvvm_sparse_mma_b_element(ctx, SparseMmaElementAttr::F16); + mma.set_attr_nvvm_sparse_mma_a_layout(ctx, SparseMmaLayoutAttr::Row); + mma.set_attr_nvvm_sparse_mma_b_layout(ctx, SparseMmaLayoutAttr::Col); + mma.set_attr_nvvm_sparse_mma_overflow(ctx, SparseMmaOverflowAttr::NotApplicable); + mma.set_attr_nvvm_sparse_mma_metadata(ctx, SparseMmaMetadataAttr::Standard); + mma.set_attr_nvvm_sparse_mma_selector( + ctx, + SparseMmaSelectorAttr::ImmediateZeroThroughThree, + ); + let mma = mma.get_operation(); + helpers::set_generated_intrinsic_marker(ctx, mma, "v1:i1042"); + let (prepared_destination, prepared_last_op) = helpers::prepare_destination_write( + ctx, + body, + destination, + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + helpers::insert_op(ctx, mma, block_ptr, prepared_last_op); + let (result, last_op) = + bundle_generated_mma_results(ctx, mma, result_ty, result_count, loc.clone()); + Ok(Some(helpers::emit_prepared_result_and_goto( + ctx, + prepared_destination, + result, + target, + block_ptr, + last_op, + value_map, + block_map, + loc, + "mma_sp_m16n8k16_f16_f16 call without target block", + )?)) + } + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1041" + | "cuda_device::wmma::mma_sp_m16n8k16_f32_bf16" => { + require_arity(name, args.len(), 5, &loc)?; + if !matches!(&args[4], mir::Operand::Constant(_)) { + return input_err!( + loc, + TranslationErr::unsupported( + "sparse MMA selector must be the compile-time constant 0, 1, 2, or 3" + .to_owned() + ) + ); + } + let (mut operands, last_op, result_ty, result_count) = import_generated_mma_operands( + ctx, + body, + args, + block_ptr, + prev_op, + value_map, + loc.clone(), + GeneratedMmaImportAdapter::C4F32A2U32B2U32ToD4F32, + )?; + let (metadata, last_op) = rvalue::translate_operand( + ctx, + body, + &args[3], + value_map, + block_ptr, + Some(last_op), + loc.clone(), + )?; + operands.push(metadata); + let (selector_value, last_op) = rvalue::translate_operand( + ctx, + body, + &args[4], + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + operands.push(selector_value); + let mma = Operation::new( + ctx, + SparseMmaOp::get_concrete_op_info(), + vec![result_ty; result_count], + operands, + vec![], + 0, + ); + mma.deref_mut(ctx).set_loc(loc.clone()); + let mma = SparseMmaOp::new(mma); + mma.set_attr_nvvm_sparse_mma_shape(ctx, SparseMmaShapeAttr::M16n8k16); + mma.set_attr_nvvm_sparse_mma_accumulator(ctx, SparseMmaAccumulatorAttr::F32); + mma.set_attr_nvvm_sparse_mma_a_element(ctx, SparseMmaElementAttr::Bf16); + mma.set_attr_nvvm_sparse_mma_b_element(ctx, SparseMmaElementAttr::Bf16); + mma.set_attr_nvvm_sparse_mma_a_layout(ctx, SparseMmaLayoutAttr::Row); + mma.set_attr_nvvm_sparse_mma_b_layout(ctx, SparseMmaLayoutAttr::Col); + mma.set_attr_nvvm_sparse_mma_overflow(ctx, SparseMmaOverflowAttr::NotApplicable); + mma.set_attr_nvvm_sparse_mma_metadata(ctx, SparseMmaMetadataAttr::Standard); + mma.set_attr_nvvm_sparse_mma_selector( + ctx, + SparseMmaSelectorAttr::ImmediateZeroThroughThree, + ); + let mma = mma.get_operation(); + helpers::set_generated_intrinsic_marker(ctx, mma, "v1:i1041"); + let (prepared_destination, prepared_last_op) = helpers::prepare_destination_write( + ctx, + body, + destination, + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + helpers::insert_op(ctx, mma, block_ptr, prepared_last_op); + let (result, last_op) = + bundle_generated_mma_results(ctx, mma, result_ty, result_count, loc.clone()); + Ok(Some(helpers::emit_prepared_result_and_goto( + ctx, + prepared_destination, + result, + target, + block_ptr, + last_op, + value_map, + block_map, + loc, + "mma_sp_m16n8k16_f32_bf16 call without target block", + )?)) + } + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1043" + | "cuda_device::wmma::mma_sp_m16n8k16_f32_f16" => { + require_arity(name, args.len(), 5, &loc)?; + if !matches!(&args[4], mir::Operand::Constant(_)) { + return input_err!( + loc, + TranslationErr::unsupported( + "sparse MMA selector must be the compile-time constant 0, 1, 2, or 3" + .to_owned() + ) + ); + } + let (mut operands, last_op, result_ty, result_count) = import_generated_mma_operands( + ctx, + body, + args, + block_ptr, + prev_op, + value_map, + loc.clone(), + GeneratedMmaImportAdapter::C4F32A2U32B2U32ToD4F32, + )?; + let (metadata, last_op) = rvalue::translate_operand( + ctx, + body, + &args[3], + value_map, + block_ptr, + Some(last_op), + loc.clone(), + )?; + operands.push(metadata); + let (selector_value, last_op) = rvalue::translate_operand( + ctx, + body, + &args[4], + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + operands.push(selector_value); + let mma = Operation::new( + ctx, + SparseMmaOp::get_concrete_op_info(), + vec![result_ty; result_count], + operands, + vec![], + 0, + ); + mma.deref_mut(ctx).set_loc(loc.clone()); + let mma = SparseMmaOp::new(mma); + mma.set_attr_nvvm_sparse_mma_shape(ctx, SparseMmaShapeAttr::M16n8k16); + mma.set_attr_nvvm_sparse_mma_accumulator(ctx, SparseMmaAccumulatorAttr::F32); + mma.set_attr_nvvm_sparse_mma_a_element(ctx, SparseMmaElementAttr::F16); + mma.set_attr_nvvm_sparse_mma_b_element(ctx, SparseMmaElementAttr::F16); + mma.set_attr_nvvm_sparse_mma_a_layout(ctx, SparseMmaLayoutAttr::Row); + mma.set_attr_nvvm_sparse_mma_b_layout(ctx, SparseMmaLayoutAttr::Col); + mma.set_attr_nvvm_sparse_mma_overflow(ctx, SparseMmaOverflowAttr::NotApplicable); + mma.set_attr_nvvm_sparse_mma_metadata(ctx, SparseMmaMetadataAttr::Standard); + mma.set_attr_nvvm_sparse_mma_selector( + ctx, + SparseMmaSelectorAttr::ImmediateZeroThroughThree, + ); + let mma = mma.get_operation(); + helpers::set_generated_intrinsic_marker(ctx, mma, "v1:i1043"); + let (prepared_destination, prepared_last_op) = helpers::prepare_destination_write( + ctx, + body, + destination, + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + helpers::insert_op(ctx, mma, block_ptr, prepared_last_op); + let (result, last_op) = + bundle_generated_mma_results(ctx, mma, result_ty, result_count, loc.clone()); + Ok(Some(helpers::emit_prepared_result_and_goto( + ctx, + prepared_destination, + result, + target, + block_ptr, + last_op, + value_map, + block_map, + loc, + "mma_sp_m16n8k16_f32_f16 call without target block", + )?)) + } + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1040" + | "cuda_device::wmma::mma_sp_m16n8k16_f32_tf32" => { + require_arity(name, args.len(), 5, &loc)?; + if !matches!(&args[4], mir::Operand::Constant(_)) { + return input_err!( + loc, + TranslationErr::unsupported( + "sparse MMA selector must be the compile-time constant 0 or 1".to_owned() + ) + ); + } + let (mut operands, last_op, result_ty, result_count) = import_generated_mma_operands( + ctx, + body, + args, + block_ptr, + prev_op, + value_map, + loc.clone(), + GeneratedMmaImportAdapter::C4F32A4U32B4U32ToD4F32, + )?; + let (metadata, last_op) = rvalue::translate_operand( + ctx, + body, + &args[3], + value_map, + block_ptr, + Some(last_op), + loc.clone(), + )?; + operands.push(metadata); + let (selector_value, last_op) = rvalue::translate_operand( + ctx, + body, + &args[4], + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + operands.push(selector_value); + let mma = Operation::new( + ctx, + SparseMmaOp::get_concrete_op_info(), + vec![result_ty; result_count], + operands, + vec![], + 0, + ); + mma.deref_mut(ctx).set_loc(loc.clone()); + let mma = SparseMmaOp::new(mma); + mma.set_attr_nvvm_sparse_mma_shape(ctx, SparseMmaShapeAttr::M16n8k16); + mma.set_attr_nvvm_sparse_mma_accumulator(ctx, SparseMmaAccumulatorAttr::F32); + mma.set_attr_nvvm_sparse_mma_a_element(ctx, SparseMmaElementAttr::Tf32); + mma.set_attr_nvvm_sparse_mma_b_element(ctx, SparseMmaElementAttr::Tf32); + mma.set_attr_nvvm_sparse_mma_a_layout(ctx, SparseMmaLayoutAttr::Row); + mma.set_attr_nvvm_sparse_mma_b_layout(ctx, SparseMmaLayoutAttr::Col); + mma.set_attr_nvvm_sparse_mma_overflow(ctx, SparseMmaOverflowAttr::NotApplicable); + mma.set_attr_nvvm_sparse_mma_metadata(ctx, SparseMmaMetadataAttr::Standard); + mma.set_attr_nvvm_sparse_mma_selector(ctx, SparseMmaSelectorAttr::ImmediateZeroOrOne); + let mma = mma.get_operation(); + helpers::set_generated_intrinsic_marker(ctx, mma, "v1:i1040"); + let (prepared_destination, prepared_last_op) = helpers::prepare_destination_write( + ctx, + body, + destination, + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + helpers::insert_op(ctx, mma, block_ptr, prepared_last_op); + let (result, last_op) = + bundle_generated_mma_results(ctx, mma, result_ty, result_count, loc.clone()); + Ok(Some(helpers::emit_prepared_result_and_goto( + ctx, + prepared_destination, + result, + target, + block_ptr, + last_op, + value_map, + block_map, + loc, + "mma_sp_m16n8k16_f32_tf32 call without target block", + )?)) + } + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1045" + | "cuda_device::wmma::mma_sp_m16n8k32_f16_f16" => { + require_arity(name, args.len(), 5, &loc)?; + if !matches!(&args[4], mir::Operand::Constant(_)) { + return input_err!( + loc, + TranslationErr::unsupported( + "sparse MMA selector must be the compile-time constant 0 or 1".to_owned() + ) + ); + } + let (mut operands, last_op, result_ty, result_count) = import_generated_mma_operands( + ctx, + body, + args, + block_ptr, + prev_op, + value_map, + loc.clone(), + GeneratedMmaImportAdapter::C2U32A4U32B4U32ToD2U32, + )?; + let (metadata, last_op) = rvalue::translate_operand( + ctx, + body, + &args[3], + value_map, + block_ptr, + Some(last_op), + loc.clone(), + )?; + operands.push(metadata); + let (selector_value, last_op) = rvalue::translate_operand( + ctx, + body, + &args[4], + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + operands.push(selector_value); + let mma = Operation::new( + ctx, + SparseMmaOp::get_concrete_op_info(), + vec![result_ty; result_count], + operands, + vec![], + 0, + ); + mma.deref_mut(ctx).set_loc(loc.clone()); + let mma = SparseMmaOp::new(mma); + mma.set_attr_nvvm_sparse_mma_shape(ctx, SparseMmaShapeAttr::M16n8k32); + mma.set_attr_nvvm_sparse_mma_accumulator(ctx, SparseMmaAccumulatorAttr::F16); + mma.set_attr_nvvm_sparse_mma_a_element(ctx, SparseMmaElementAttr::F16); + mma.set_attr_nvvm_sparse_mma_b_element(ctx, SparseMmaElementAttr::F16); + mma.set_attr_nvvm_sparse_mma_a_layout(ctx, SparseMmaLayoutAttr::Row); + mma.set_attr_nvvm_sparse_mma_b_layout(ctx, SparseMmaLayoutAttr::Col); + mma.set_attr_nvvm_sparse_mma_overflow(ctx, SparseMmaOverflowAttr::NotApplicable); + mma.set_attr_nvvm_sparse_mma_metadata(ctx, SparseMmaMetadataAttr::Standard); + mma.set_attr_nvvm_sparse_mma_selector(ctx, SparseMmaSelectorAttr::ImmediateZeroOrOne); + let mma = mma.get_operation(); + helpers::set_generated_intrinsic_marker(ctx, mma, "v1:i1045"); + let (prepared_destination, prepared_last_op) = helpers::prepare_destination_write( + ctx, + body, + destination, + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + helpers::insert_op(ctx, mma, block_ptr, prepared_last_op); + let (result, last_op) = + bundle_generated_mma_results(ctx, mma, result_ty, result_count, loc.clone()); + Ok(Some(helpers::emit_prepared_result_and_goto( + ctx, + prepared_destination, + result, + target, + block_ptr, + last_op, + value_map, + block_map, + loc, + "mma_sp_m16n8k32_f16_f16 call without target block", + )?)) + } + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1044" + | "cuda_device::wmma::mma_sp_m16n8k32_f32_bf16" => { + require_arity(name, args.len(), 5, &loc)?; + if !matches!(&args[4], mir::Operand::Constant(_)) { + return input_err!( + loc, + TranslationErr::unsupported( + "sparse MMA selector must be the compile-time constant 0 or 1".to_owned() + ) + ); + } + let (mut operands, last_op, result_ty, result_count) = import_generated_mma_operands( + ctx, + body, + args, + block_ptr, + prev_op, + value_map, + loc.clone(), + GeneratedMmaImportAdapter::C4F32A4U32B4U32ToD4F32, + )?; + let (metadata, last_op) = rvalue::translate_operand( + ctx, + body, + &args[3], + value_map, + block_ptr, + Some(last_op), + loc.clone(), + )?; + operands.push(metadata); + let (selector_value, last_op) = rvalue::translate_operand( + ctx, + body, + &args[4], + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + operands.push(selector_value); + let mma = Operation::new( + ctx, + SparseMmaOp::get_concrete_op_info(), + vec![result_ty; result_count], + operands, + vec![], + 0, + ); + mma.deref_mut(ctx).set_loc(loc.clone()); + let mma = SparseMmaOp::new(mma); + mma.set_attr_nvvm_sparse_mma_shape(ctx, SparseMmaShapeAttr::M16n8k32); + mma.set_attr_nvvm_sparse_mma_accumulator(ctx, SparseMmaAccumulatorAttr::F32); + mma.set_attr_nvvm_sparse_mma_a_element(ctx, SparseMmaElementAttr::Bf16); + mma.set_attr_nvvm_sparse_mma_b_element(ctx, SparseMmaElementAttr::Bf16); + mma.set_attr_nvvm_sparse_mma_a_layout(ctx, SparseMmaLayoutAttr::Row); + mma.set_attr_nvvm_sparse_mma_b_layout(ctx, SparseMmaLayoutAttr::Col); + mma.set_attr_nvvm_sparse_mma_overflow(ctx, SparseMmaOverflowAttr::NotApplicable); + mma.set_attr_nvvm_sparse_mma_metadata(ctx, SparseMmaMetadataAttr::Standard); + mma.set_attr_nvvm_sparse_mma_selector(ctx, SparseMmaSelectorAttr::ImmediateZeroOrOne); + let mma = mma.get_operation(); + helpers::set_generated_intrinsic_marker(ctx, mma, "v1:i1044"); + let (prepared_destination, prepared_last_op) = helpers::prepare_destination_write( + ctx, + body, + destination, + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + helpers::insert_op(ctx, mma, block_ptr, prepared_last_op); + let (result, last_op) = + bundle_generated_mma_results(ctx, mma, result_ty, result_count, loc.clone()); + Ok(Some(helpers::emit_prepared_result_and_goto( + ctx, + prepared_destination, + result, + target, + block_ptr, + last_op, + value_map, + block_map, + loc, + "mma_sp_m16n8k32_f32_bf16 call without target block", + )?)) + } + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1046" + | "cuda_device::wmma::mma_sp_m16n8k32_f32_f16" => { + require_arity(name, args.len(), 5, &loc)?; + if !matches!(&args[4], mir::Operand::Constant(_)) { + return input_err!( + loc, + TranslationErr::unsupported( + "sparse MMA selector must be the compile-time constant 0 or 1".to_owned() + ) + ); + } + let (mut operands, last_op, result_ty, result_count) = import_generated_mma_operands( + ctx, + body, + args, + block_ptr, + prev_op, + value_map, + loc.clone(), + GeneratedMmaImportAdapter::C4F32A4U32B4U32ToD4F32, + )?; + let (metadata, last_op) = rvalue::translate_operand( + ctx, + body, + &args[3], + value_map, + block_ptr, + Some(last_op), + loc.clone(), + )?; + operands.push(metadata); + let (selector_value, last_op) = rvalue::translate_operand( + ctx, + body, + &args[4], + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + operands.push(selector_value); + let mma = Operation::new( + ctx, + SparseMmaOp::get_concrete_op_info(), + vec![result_ty; result_count], + operands, + vec![], + 0, + ); + mma.deref_mut(ctx).set_loc(loc.clone()); + let mma = SparseMmaOp::new(mma); + mma.set_attr_nvvm_sparse_mma_shape(ctx, SparseMmaShapeAttr::M16n8k32); + mma.set_attr_nvvm_sparse_mma_accumulator(ctx, SparseMmaAccumulatorAttr::F32); + mma.set_attr_nvvm_sparse_mma_a_element(ctx, SparseMmaElementAttr::F16); + mma.set_attr_nvvm_sparse_mma_b_element(ctx, SparseMmaElementAttr::F16); + mma.set_attr_nvvm_sparse_mma_a_layout(ctx, SparseMmaLayoutAttr::Row); + mma.set_attr_nvvm_sparse_mma_b_layout(ctx, SparseMmaLayoutAttr::Col); + mma.set_attr_nvvm_sparse_mma_overflow(ctx, SparseMmaOverflowAttr::NotApplicable); + mma.set_attr_nvvm_sparse_mma_metadata(ctx, SparseMmaMetadataAttr::Standard); + mma.set_attr_nvvm_sparse_mma_selector(ctx, SparseMmaSelectorAttr::ImmediateZeroOrOne); + let mma = mma.get_operation(); + helpers::set_generated_intrinsic_marker(ctx, mma, "v1:i1046"); + let (prepared_destination, prepared_last_op) = helpers::prepare_destination_write( + ctx, + body, + destination, + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + helpers::insert_op(ctx, mma, block_ptr, prepared_last_op); + let (result, last_op) = + bundle_generated_mma_results(ctx, mma, result_ty, result_count, loc.clone()); + Ok(Some(helpers::emit_prepared_result_and_goto( + ctx, + prepared_destination, + result, + target, + block_ptr, + last_op, + value_map, + block_map, + loc, + "mma_sp_m16n8k32_f32_f16 call without target block", + )?)) + } "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0163" | "cuda_device::wmma::mma_sp_m16n8k32_s32_s8" => { require_arity(name, args.len(), 5, &loc)?; @@ -3174,6 +3795,97 @@ pub(super) fn try_dispatch( "mma_sp_m16n8k64_s32_u8_satfinite call without target block", )?)) } + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1039" + | "cuda_device::wmma::mma_sp_m16n8k8_f32_tf32" => { + require_arity(name, args.len(), 5, &loc)?; + if !matches!(&args[4], mir::Operand::Constant(_)) { + return input_err!( + loc, + TranslationErr::unsupported( + "sparse MMA selector must be the compile-time constant 0, 1, 2, or 3" + .to_owned() + ) + ); + } + let (mut operands, last_op, result_ty, result_count) = import_generated_mma_operands( + ctx, + body, + args, + block_ptr, + prev_op, + value_map, + loc.clone(), + GeneratedMmaImportAdapter::C4F32A2U32B2U32ToD4F32, + )?; + let (metadata, last_op) = rvalue::translate_operand( + ctx, + body, + &args[3], + value_map, + block_ptr, + Some(last_op), + loc.clone(), + )?; + operands.push(metadata); + let (selector_value, last_op) = rvalue::translate_operand( + ctx, + body, + &args[4], + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + operands.push(selector_value); + let mma = Operation::new( + ctx, + SparseMmaOp::get_concrete_op_info(), + vec![result_ty; result_count], + operands, + vec![], + 0, + ); + mma.deref_mut(ctx).set_loc(loc.clone()); + let mma = SparseMmaOp::new(mma); + mma.set_attr_nvvm_sparse_mma_shape(ctx, SparseMmaShapeAttr::M16n8k8); + mma.set_attr_nvvm_sparse_mma_accumulator(ctx, SparseMmaAccumulatorAttr::F32); + mma.set_attr_nvvm_sparse_mma_a_element(ctx, SparseMmaElementAttr::Tf32); + mma.set_attr_nvvm_sparse_mma_b_element(ctx, SparseMmaElementAttr::Tf32); + mma.set_attr_nvvm_sparse_mma_a_layout(ctx, SparseMmaLayoutAttr::Row); + mma.set_attr_nvvm_sparse_mma_b_layout(ctx, SparseMmaLayoutAttr::Col); + mma.set_attr_nvvm_sparse_mma_overflow(ctx, SparseMmaOverflowAttr::NotApplicable); + mma.set_attr_nvvm_sparse_mma_metadata(ctx, SparseMmaMetadataAttr::Standard); + mma.set_attr_nvvm_sparse_mma_selector( + ctx, + SparseMmaSelectorAttr::ImmediateZeroThroughThree, + ); + let mma = mma.get_operation(); + helpers::set_generated_intrinsic_marker(ctx, mma, "v1:i1039"); + let (prepared_destination, prepared_last_op) = helpers::prepare_destination_write( + ctx, + body, + destination, + value_map, + block_ptr, + last_op, + loc.clone(), + )?; + helpers::insert_op(ctx, mma, block_ptr, prepared_last_op); + let (result, last_op) = + bundle_generated_mma_results(ctx, mma, result_ty, result_count, loc.clone()); + Ok(Some(helpers::emit_prepared_result_and_goto( + ctx, + prepared_destination, + result, + target, + block_ptr, + last_op, + value_map, + block_map, + loc, + "mma_sp_m16n8k8_f32_tf32 call without target block", + )?)) + } "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0203" | "cuda_device::wmma::mma_sp_ordered_metadata_m16n8k128_s32_s4" => { require_arity(name, args.len(), 5, &loc)?; diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sreg.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sreg.rs index 424884c665..f257dbf035 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sreg.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `sreg` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/stmatrix.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/stmatrix.rs index 91eaeb2c98..6cd376f126 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/stmatrix.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `stmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sync.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sync.rs index d512c13821..333047f134 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sync.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sync.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `sync` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_cp.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_cp.rs index 33d2e9000d..0e9fbbc487 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_cp.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_cp.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `tcgen05_cp` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_ld.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_ld.rs index c0f96923fa..16af1402bd 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_ld.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_ld.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `tcgen05_ld` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_mma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_mma.rs index c7bcf88c9f..df8c1e508f 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_mma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `tcgen05_mma` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_other.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_other.rs index d335198d0b..de7eb2713b 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_other.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_other.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `tcgen05_other` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_st.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_st.rs index 9a24687307..fb339cf7fe 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_st.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_st.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `tcgen05_st` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/active_mask.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/active_mask.rs index 76af4ebd4b..692f247d10 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/active_mask.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/active_mask.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `active_mask` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/clc.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/clc.rs index fadcb28f60..d539b0ccd7 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/clc.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `clc` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_barrier.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_barrier.rs index 37efbd61da..53fa383159 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_barrier.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `cluster_barrier` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_memory.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_memory.rs index f2539775fc..7ae3ba8e0d 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_memory.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `cluster_memory` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cp_async.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cp_async.rs index fdb56c3acd..3589c54a32 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cp_async.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cp_async.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `cp_async` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/debug_control.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/debug_control.rs index 1d3e283004..7372ab1730 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/debug_control.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `debug_control` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/dotprod.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/dotprod.rs index 6044b37f76..1fb6b0a227 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/dotprod.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `dotprod` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/elect.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/elect.rs index 6154ad507d..75ffd53951 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/elect.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/elect.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `elect` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/execution_control.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/execution_control.rs index 32eb53bd92..583fbb5e8a 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/execution_control.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/execution_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `execution_control` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/extended_minmax.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/extended_minmax.rs index ebaedbc13c..b4015d310d 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/extended_minmax.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/extended_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `extended_minmax` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/integer_minmax.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/integer_minmax.rs index 4ed38845d3..01055f5563 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/integer_minmax.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/integer_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `integer_minmax` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/ldmatrix.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/ldmatrix.rs index 33ee956869..abaa2eb36d 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/ldmatrix.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `ldmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_basic.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_basic.rs index 6d036a77a1..912d705a94 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_basic.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `mbarrier_basic` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_extended.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_extended.rs index 18c76eafc5..8203a6a269 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_extended.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `mbarrier_extended` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mod.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mod.rs index 565f8d0f47..e30af3541b 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mod.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests, grouped per intrinsic family. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/movmatrix.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/movmatrix.rs index 8494def465..5debadd46b 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/movmatrix.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `movmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_alu.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_alu.rs index 5f3d1cc7d5..eb0d130d1d 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_alu.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_alu.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `packed_alu` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_atomic.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_atomic.rs index 21b7e977a4..2be365677b 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_atomic.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `packed_atomic` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_conversion.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_conversion.rs index 631742faf9..5dcf813e40 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_conversion.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `packed_conversion` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/prmt.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/prmt.rs index 0b15dff2e7..97b308600f 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/prmt.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `prmt` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/redux.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/redux.rs index df47440ddf..a52034b556 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/redux.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/redux.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `redux` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/register_mma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/register_mma.rs index c0bed7caf1..8e8efce446 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/register_mma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/register_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `register_mma` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_arithmetic.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_arithmetic.rs index c83a02f8c7..f7778c2c8b 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_arithmetic.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_arithmetic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `scalar_arithmetic` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_conversion.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_conversion.rs index 3ccd82f21f..98c0e9f5d5 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_conversion.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `scalar_conversion` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_math.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_math.rs index 810379af2c..1a8ba2a4be 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_math.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_math.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `scalar_math` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sparse_mma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sparse_mma.rs index 016e6adff6..586f30feb0 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sparse_mma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `sparse_mma` intrinsics. @@ -300,6 +300,258 @@ fn mma_sp_m16n8k128_s32_u4_satfinite_uses_only_canonical_or_compatibility_defpat )); } #[test] +fn mma_sp_m16n8k16_f16_f16_uses_only_canonical_or_compatibility_defpaths() { + assert!(is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1042" + )); + assert!(is_raw_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1042" + )); + assert_eq!( + generated_intrinsic_marker("cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1042"), + Some("v1:i1042") + ); + assert!(matches!( + classify_raw_intrinsic_path( + "cuda_intrinsics", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1042".into() + ), + RawIntrinsicIdentity::Known(_) + )); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::matrix::mma_sp_m16n8k16_f16_f16" + )); + assert!(is_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k16_f16_f16" + )); + assert!(!is_raw_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k16_f16_f16" + )); + assert_eq!( + generated_intrinsic_marker("cuda_device::wmma::mma_sp_m16n8k16_f16_f16"), + Some("v1:i1042") + ); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v2::i1042" + )); +} +#[test] +fn mma_sp_m16n8k16_f32_bf16_uses_only_canonical_or_compatibility_defpaths() { + assert!(is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1041" + )); + assert!(is_raw_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1041" + )); + assert_eq!( + generated_intrinsic_marker("cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1041"), + Some("v1:i1041") + ); + assert!(matches!( + classify_raw_intrinsic_path( + "cuda_intrinsics", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1041".into() + ), + RawIntrinsicIdentity::Known(_) + )); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_bf16" + )); + assert!(is_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k16_f32_bf16" + )); + assert!(!is_raw_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k16_f32_bf16" + )); + assert_eq!( + generated_intrinsic_marker("cuda_device::wmma::mma_sp_m16n8k16_f32_bf16"), + Some("v1:i1041") + ); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v2::i1041" + )); +} +#[test] +fn mma_sp_m16n8k16_f32_f16_uses_only_canonical_or_compatibility_defpaths() { + assert!(is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1043" + )); + assert!(is_raw_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1043" + )); + assert_eq!( + generated_intrinsic_marker("cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1043"), + Some("v1:i1043") + ); + assert!(matches!( + classify_raw_intrinsic_path( + "cuda_intrinsics", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1043".into() + ), + RawIntrinsicIdentity::Known(_) + )); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_f16" + )); + assert!(is_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k16_f32_f16" + )); + assert!(!is_raw_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k16_f32_f16" + )); + assert_eq!( + generated_intrinsic_marker("cuda_device::wmma::mma_sp_m16n8k16_f32_f16"), + Some("v1:i1043") + ); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v2::i1043" + )); +} +#[test] +fn mma_sp_m16n8k16_f32_tf32_uses_only_canonical_or_compatibility_defpaths() { + assert!(is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1040" + )); + assert!(is_raw_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1040" + )); + assert_eq!( + generated_intrinsic_marker("cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1040"), + Some("v1:i1040") + ); + assert!(matches!( + classify_raw_intrinsic_path( + "cuda_intrinsics", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1040".into() + ), + RawIntrinsicIdentity::Known(_) + )); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_tf32" + )); + assert!(is_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k16_f32_tf32" + )); + assert!(!is_raw_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k16_f32_tf32" + )); + assert_eq!( + generated_intrinsic_marker("cuda_device::wmma::mma_sp_m16n8k16_f32_tf32"), + Some("v1:i1040") + ); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v2::i1040" + )); +} +#[test] +fn mma_sp_m16n8k32_f16_f16_uses_only_canonical_or_compatibility_defpaths() { + assert!(is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1045" + )); + assert!(is_raw_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1045" + )); + assert_eq!( + generated_intrinsic_marker("cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1045"), + Some("v1:i1045") + ); + assert!(matches!( + classify_raw_intrinsic_path( + "cuda_intrinsics", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1045".into() + ), + RawIntrinsicIdentity::Known(_) + )); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::matrix::mma_sp_m16n8k32_f16_f16" + )); + assert!(is_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k32_f16_f16" + )); + assert!(!is_raw_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k32_f16_f16" + )); + assert_eq!( + generated_intrinsic_marker("cuda_device::wmma::mma_sp_m16n8k32_f16_f16"), + Some("v1:i1045") + ); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v2::i1045" + )); +} +#[test] +fn mma_sp_m16n8k32_f32_bf16_uses_only_canonical_or_compatibility_defpaths() { + assert!(is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1044" + )); + assert!(is_raw_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1044" + )); + assert_eq!( + generated_intrinsic_marker("cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1044"), + Some("v1:i1044") + ); + assert!(matches!( + classify_raw_intrinsic_path( + "cuda_intrinsics", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1044".into() + ), + RawIntrinsicIdentity::Known(_) + )); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::matrix::mma_sp_m16n8k32_f32_bf16" + )); + assert!(is_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k32_f32_bf16" + )); + assert!(!is_raw_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k32_f32_bf16" + )); + assert_eq!( + generated_intrinsic_marker("cuda_device::wmma::mma_sp_m16n8k32_f32_bf16"), + Some("v1:i1044") + ); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v2::i1044" + )); +} +#[test] +fn mma_sp_m16n8k32_f32_f16_uses_only_canonical_or_compatibility_defpaths() { + assert!(is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1046" + )); + assert!(is_raw_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1046" + )); + assert_eq!( + generated_intrinsic_marker("cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1046"), + Some("v1:i1046") + ); + assert!(matches!( + classify_raw_intrinsic_path( + "cuda_intrinsics", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1046".into() + ), + RawIntrinsicIdentity::Known(_) + )); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::matrix::mma_sp_m16n8k32_f32_f16" + )); + assert!(is_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k32_f32_f16" + )); + assert!(!is_raw_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k32_f32_f16" + )); + assert_eq!( + generated_intrinsic_marker("cuda_device::wmma::mma_sp_m16n8k32_f32_f16"), + Some("v1:i1046") + ); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v2::i1046" + )); +} +#[test] fn mma_sp_m16n8k32_s32_s8_uses_only_canonical_or_compatibility_defpaths() { assert!(is_generated_intrinsic_path( "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0163" @@ -1308,6 +1560,42 @@ fn mma_sp_m16n8k64_s32_u8_satfinite_uses_only_canonical_or_compatibility_defpath )); } #[test] +fn mma_sp_m16n8k8_f32_tf32_uses_only_canonical_or_compatibility_defpaths() { + assert!(is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1039" + )); + assert!(is_raw_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1039" + )); + assert_eq!( + generated_intrinsic_marker("cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1039"), + Some("v1:i1039") + ); + assert!(matches!( + classify_raw_intrinsic_path( + "cuda_intrinsics", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1039".into() + ), + RawIntrinsicIdentity::Known(_) + )); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::matrix::mma_sp_m16n8k8_f32_tf32" + )); + assert!(is_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k8_f32_tf32" + )); + assert!(!is_raw_generated_intrinsic_path( + "cuda_device::wmma::mma_sp_m16n8k8_f32_tf32" + )); + assert_eq!( + generated_intrinsic_marker("cuda_device::wmma::mma_sp_m16n8k8_f32_tf32"), + Some("v1:i1039") + ); + assert!(!is_generated_intrinsic_path( + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v2::i1039" + )); +} +#[test] fn mma_sp_ordered_metadata_m16n8k128_s32_s4_uses_only_canonical_or_compatibility_defpaths() { assert!(is_generated_intrinsic_path( "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0203" diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sreg.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sreg.rs index 12b0d52620..f19b8e1e06 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sreg.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `sreg` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/stmatrix.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/stmatrix.rs index 57d1792af1..6d382029ea 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/stmatrix.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `stmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sync.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sync.rs index 604b55d031..66ae03a38f 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sync.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sync.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `sync` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tcgen05.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tcgen05.rs index 2aab6e65a8..403b538cda 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tcgen05.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tcgen05.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `tcgen05` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tma.rs index a819be423d..d95d7213b6 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `tma` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/vote.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/vote.rs index fb8dfc0432..23da06f44f 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/vote.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/vote.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `vote` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_barrier.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_barrier.rs index 1fac7ad53d..a922c4ca0c 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_barrier.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `warp_barrier` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_match.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_match.rs index 8a5dbddcf2..281c955649 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_match.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_match.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `warp_match` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_shuffle.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_shuffle.rs index ae0ba0cb1e..5a70f392da 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_shuffle.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_shuffle.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `warp_shuffle` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/wgmma_control.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/wgmma_control.rs index 89ac02894a..234995e8d8 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/wgmma_control.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `wgmma_control` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tma.rs index 8114ef4158..25f0bf30f3 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `tma` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/vote.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/vote.rs index f0c6e4aa97..cccef69c04 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/vote.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/vote.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `vote` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_barrier.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_barrier.rs index c3b33fcb86..b511af5bd3 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_barrier.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `warp_barrier` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_match.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_match.rs index 6efbb7eec0..808bca29ff 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_match.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_match.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `warp_match` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_shuffle.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_shuffle.rs index f0a267bfd8..b5a6b4ca19 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_shuffle.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_shuffle.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `warp_shuffle` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/wgmma_control.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/wgmma_control.rs index 2fd62b2fed..7a3f171398 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/wgmma_control.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `wgmma_control` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/active_mask.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/active_mask.rs index b976d918c1..9cab539946 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/active_mask.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/active_mask.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `active_mask` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/clc.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/clc.rs index 6539303d91..c94def40e1 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/clc.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `clc` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_barrier.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_barrier.rs index 54ea032e58..3e378ace83 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_barrier.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `cluster_barrier` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_memory.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_memory.rs index 507fba08de..595ac9f843 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_memory.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `cluster_memory` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cp_async.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cp_async.rs index 7e05acca3d..b5e6027aba 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cp_async.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cp_async.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `cp_async` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/debug_control.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/debug_control.rs index 42096e065a..6f21d60c9a 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/debug_control.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `debug_control` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/dotprod.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/dotprod.rs index 8ca4269bd1..bd8a5af8bb 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/dotprod.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `dotprod` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/elect.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/elect.rs index 51544ab2a1..16644b1ec9 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/elect.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/elect.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `elect` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/execution_control.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/execution_control.rs index cc8c53c24a..888dfb97c0 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/execution_control.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/execution_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `execution_control` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/extended_minmax.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/extended_minmax.rs index 93fa8e6798..ee49709d97 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/extended_minmax.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/extended_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `extended_minmax` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/integer_minmax.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/integer_minmax.rs index 0d99dc692e..4df53fc193 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/integer_minmax.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/integer_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `integer_minmax` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/ldmatrix.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/ldmatrix.rs index be52262fd0..f5a80d2cb0 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/ldmatrix.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `ldmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_basic.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_basic.rs index 03aec87416..c0c01949a2 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_basic.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `mbarrier_basic` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_extended.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_extended.rs index f75d9b824c..276ba8b444 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_extended.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `mbarrier_extended` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mod.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mod.rs index e9867a4cb4..06c54ad359 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mod.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces for admitted CUDA intrinsic families. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/movmatrix.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/movmatrix.rs index 25e0ea09b0..5f31e22b54 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/movmatrix.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `movmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_alu.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_alu.rs index 81d979e5f5..03551a8b9d 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_alu.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_alu.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `packed_alu` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_atomic.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_atomic.rs index 39b38cc87e..48c052ccd5 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_atomic.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `packed_atomic` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_conversion.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_conversion.rs index 45cd3c17b2..a11f79f91a 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_conversion.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `packed_conversion` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/prmt.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/prmt.rs index 55df006d2b..fecdaa236a 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/prmt.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `prmt` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/redux.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/redux.rs index 5a9360d2cd..85f7e985ba 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/redux.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/redux.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `redux` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/register_mma.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/register_mma.rs index 8b9ebfa2fe..3659a884f4 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/register_mma.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/register_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `register_mma` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_arithmetic.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_arithmetic.rs index 487a60358e..fae07377af 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_arithmetic.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_arithmetic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `scalar_arithmetic` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_conversion.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_conversion.rs index 7f78ccbed3..4071102ac8 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_conversion.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `scalar_conversion` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_math.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_math.rs index b1f3baf883..92b02c918a 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_math.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_math.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `scalar_math` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sparse_mma.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sparse_mma.rs index d608302717..e0a37be6cd 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sparse_mma.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `sparse_mma` intrinsics. @@ -178,6 +178,125 @@ impl MirToLlvmConversion for SparseMmaOp { "mma.sp.sync.aligned.m16n8k128.row.col.satfinite.s32.u4.u4.s32 {$0, $1, $2, $3}, {$8, $9, $10, $11}, {$12, $13, $14, $15}, {$4, $5, $6, $7}, $16, $17;", "=r,=r,=r,=r,r,r,r,r,r,r,r,r,r,r,r,r,r,n", ), + ( + Some(&SparseMmaShapeAttr::M16n8k16), + Some(&SparseMmaAccumulatorAttr::F16), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroThroughThree), + ) => ( + GeneratedMmaResultType::I32, + 2, + 8, + "mma.sp.sync.aligned.m16n8k16.row.col.f16.f16.f16.f16 {$0, $1}, {$4, $5}, {$6, $7}, {$2, $3}, $8, $9;", + "=r,=r,r,r,r,r,r,r,r,n", + ), + ( + Some(&SparseMmaShapeAttr::M16n8k16), + Some(&SparseMmaAccumulatorAttr::F32), + Some(&SparseMmaElementAttr::Bf16), + Some(&SparseMmaElementAttr::Bf16), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroThroughThree), + ) => ( + GeneratedMmaResultType::F32, + 4, + 10, + "mma.sp.sync.aligned.m16n8k16.row.col.f32.bf16.bf16.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", + "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n", + ), + ( + Some(&SparseMmaShapeAttr::M16n8k16), + Some(&SparseMmaAccumulatorAttr::F32), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroThroughThree), + ) => ( + GeneratedMmaResultType::F32, + 4, + 10, + "mma.sp.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", + "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n", + ), + ( + Some(&SparseMmaShapeAttr::M16n8k16), + Some(&SparseMmaAccumulatorAttr::F32), + Some(&SparseMmaElementAttr::Tf32), + Some(&SparseMmaElementAttr::Tf32), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroOrOne), + ) => ( + GeneratedMmaResultType::F32, + 4, + 14, + "mma.sp.sync.aligned.m16n8k16.row.col.f32.tf32.tf32.f32 {$0, $1, $2, $3}, {$8, $9, $10, $11}, {$12, $13, $14, $15}, {$4, $5, $6, $7}, $16, $17;", + "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,r,r,r,r,n", + ), + ( + Some(&SparseMmaShapeAttr::M16n8k32), + Some(&SparseMmaAccumulatorAttr::F16), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroOrOne), + ) => ( + GeneratedMmaResultType::I32, + 2, + 12, + "mma.sp.sync.aligned.m16n8k32.row.col.f16.f16.f16.f16 {$0, $1}, {$4, $5, $6, $7}, {$8, $9, $10, $11}, {$2, $3}, $12, $13;", + "=r,=r,r,r,r,r,r,r,r,r,r,r,r,n", + ), + ( + Some(&SparseMmaShapeAttr::M16n8k32), + Some(&SparseMmaAccumulatorAttr::F32), + Some(&SparseMmaElementAttr::Bf16), + Some(&SparseMmaElementAttr::Bf16), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroOrOne), + ) => ( + GeneratedMmaResultType::F32, + 4, + 14, + "mma.sp.sync.aligned.m16n8k32.row.col.f32.bf16.bf16.f32 {$0, $1, $2, $3}, {$8, $9, $10, $11}, {$12, $13, $14, $15}, {$4, $5, $6, $7}, $16, $17;", + "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,r,r,r,r,n", + ), + ( + Some(&SparseMmaShapeAttr::M16n8k32), + Some(&SparseMmaAccumulatorAttr::F32), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaElementAttr::F16), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroOrOne), + ) => ( + GeneratedMmaResultType::F32, + 4, + 14, + "mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32 {$0, $1, $2, $3}, {$8, $9, $10, $11}, {$12, $13, $14, $15}, {$4, $5, $6, $7}, $16, $17;", + "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,r,r,r,r,n", + ), ( Some(&SparseMmaShapeAttr::M16n8k32), Some(&SparseMmaAccumulatorAttr::S32), @@ -654,6 +773,23 @@ impl MirToLlvmConversion for SparseMmaOp { "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.u8.u8.s32 {$0, $1, $2, $3}, {$8, $9, $10, $11}, {$12, $13, $14, $15}, {$4, $5, $6, $7}, $16, $17;", "=r,=r,=r,=r,r,r,r,r,r,r,r,r,r,r,r,r,r,n", ), + ( + Some(&SparseMmaShapeAttr::M16n8k8), + Some(&SparseMmaAccumulatorAttr::F32), + Some(&SparseMmaElementAttr::Tf32), + Some(&SparseMmaElementAttr::Tf32), + Some(&SparseMmaLayoutAttr::Row), + Some(&SparseMmaLayoutAttr::Col), + Some(&SparseMmaOverflowAttr::NotApplicable), + Some(&SparseMmaMetadataAttr::Standard), + Some(&SparseMmaSelectorAttr::ImmediateZeroThroughThree), + ) => ( + GeneratedMmaResultType::F32, + 4, + 10, + "mma.sp.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", + "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n", + ), ( Some(&SparseMmaShapeAttr::M16n8k128), Some(&SparseMmaAccumulatorAttr::S32), diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sreg.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sreg.rs index 07548cf648..949755b9bd 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sreg.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `sreg` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/stmatrix.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/stmatrix.rs index b28daeaad8..d51e4d4415 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/stmatrix.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `stmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sync.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sync.rs index 1f213168c2..539040ffa6 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sync.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sync.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `sync` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tcgen05.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tcgen05.rs index 4960b066f9..8b531edde4 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tcgen05.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tcgen05.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `tcgen05` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tma.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tma.rs index 50f31b2099..8866014bc7 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tma.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `tma` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/vote.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/vote.rs index af0c94c463..075333fb13 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/vote.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/vote.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `vote` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_barrier.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_barrier.rs index 8d693df970..b7b518b6b6 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_barrier.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `warp_barrier` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_match.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_match.rs index 6972ee7b7b..1a2cdb7119 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_match.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_match.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `warp_match` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_shuffle.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_shuffle.rs index ff65fb5c25..b7762325dc 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_shuffle.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_shuffle.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `warp_shuffle` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/wgmma_control.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/wgmma_control.rs index 7dcfa3d705..c39cd18de3 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/wgmma_control.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. 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--- /dev/null +++ b/cuda-oxide/crates/rustc-codegen-cuda/examples/sparse_mma_standard_float/Cargo.toml @@ -0,0 +1,16 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +[package] +name = "sparse_mma_standard_float" +version = "0.1.0" +edition = "2024" +authors = ["NVIDIA Corporation"] +license = "Apache-2.0" + +[workspace] + +[dependencies] +cuda-device = { path = "../../../cuda-device" } +cuda-host = { path = "../../../cuda-host" } +cuda-core = { path = "../../../../../cuda-core" } diff --git a/cuda-oxide/crates/rustc-codegen-cuda/examples/sparse_mma_standard_float/src/main.rs b/cuda-oxide/crates/rustc-codegen-cuda/examples/sparse_mma_standard_float/src/main.rs new file mode 100644 index 0000000000..e4e821a76e --- /dev/null +++ b/cuda-oxide/crates/rustc-codegen-cuda/examples/sparse_mma_standard_float/src/main.rs @@ -0,0 +1,448 @@ +/* SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: Apache-2.0 */ +//! GPU oracle for all eight standard-metadata sparse floating MMA forms. +//! +//! Why the inputs look the way they do: +//! - the first cut of the ordered oracle used val(x,y) = 1 + ((x+y) & 1); that +//! parity pattern made the A and B fragments bitwise IDENTICAL in every +//! lane, so an a<->b swap in the lowering still passed: +//! +//! ```text +//! old: A[r][q] = f(r+q) B[k][c] = f(k+c) -> same lane bytes +//! new: A[r][j] = 1+(3r+5j)%7, B[k][c] = 1+(2k+3c)%8 -> distinct +//! ``` +//! +//! - 16-bit metadata cycles the seven supported codes +//! (0x4 0x6 0x8 0x9 0xc 0xd 0xe) by (row+chunk). Decode stays +//! `i0 = code & 3`, `i1 = (code >> 2) & 3`, so 0x6 keeps indices (2, 1). +//! The decoy bump moves one slot forward in that same 7-code table; +//! - tf32 stays on 0x4 and 0xe only. 0x6 is not a tf32 code; +//! - every legal selector is a compile-time literal. The four 2-register +//! forms each run 0, 1, 2, and 3. The four 4-register forms each run 0 +//! and 1. That is 24 calls. Non-selected lanes carry the decoy pattern, +//! so a wrong selector reads a different metadata register and the sum +//! changes. The selected lane always carries the real (bump 0) pattern, +//! which is what the host GEMM checks; +//! - values stay small (A<=7, B<=8, C<=31, sums < 1024) so f16, bf16, and +//! tf32 all accumulate exactly and the host reference is integer math. +use cuda_core::simt::LaunchConfig; +use cuda_core::{CudaContext, DeviceBuffer}; +use cuda_device::{DisjointSlice, cuda_module, kernel, thread, wmma}; + +// Positionally distinct inputs: A over compressed (row, j), B over (k, col). +const fn a_val(r: u32, j: u32) -> u32 { + 1 + ((3 * r + 5 * j) % 7) +} +const fn b_val(k: u32, c: u32) -> u32 { + 1 + ((2 * k + 3 * c) % 8) +} +const fn c_val(r: u32, c: u32) -> u32 { + (5 * r + 7 * c) % 32 +} + +// Standard metadata code for (row, chunk); bump=1 yields the decoy pattern +// (next code in the table) handed to non-selected lanes. +// tf=0: f16/bf16 7-code table; tf=1: tf32 2-code table (0x4 and 0xe only). +// The tf32 index mixes r/8 and g/3 so no wrong (lane, nibble) -> (row, chunk) +// reading can reproduce the true pattern by periodicity (rows 8 apart and +// chunks 4 apart would otherwise alias under a plain (r+g) parity). +const fn meta_code(r: u32, g: u32, bump: u32, tf: u32) -> u32 { + if tf == 1 { + if (r + r / 8 + g + g / 3 + bump) & 1 == 0 { + 0x4 + } else { + 0xe + } + } else { + match (r + g + bump) % 7 { + 0 => 0x4, + 1 => 0x6, + 2 => 0x8, + 3 => 0x9, + 4 => 0xc, + 5 => 0xd, + _ => 0xe, + } + } +} + +// Exact bit patterns for small integers (all values here fit losslessly). +const fn f32_bits(x: u32) -> u32 { + if x == 0 { + return 0; + } + let mut e = 0; + while (x >> e) > 1 { + e += 1; + } + ((127 + e) << 23) | ((x << (23 - e)) & 0x007f_ffff) +} +const fn f16_bits(x: u32) -> u32 { + if x == 0 { + return 0; + } + let mut e = 0; + while (x >> e) > 1 { + e += 1; + } + ((15 + e) << 10) | ((x << (10 - e)) & 0x03ff) +} +const fn bf16_bits(x: u32) -> u32 { + f32_bits(x) >> 16 +} +const fn pack(lo: u32, hi: u32) -> u32 { + lo | (hi << 16) +} + +// 2-reg forms x selectors 0..=3, then 4-reg forms x selectors 0..=1. +const PACKED_RESULTS: usize = 6; +const F32_RESULTS: usize = 18; +const PACKED_STRIDE: usize = PACKED_RESULTS * 2; +const F32_STRIDE: usize = F32_RESULTS * 4; + +#[cuda_module] +mod kernels { + use super::*; + + // f16/bf16 A fragment register n: row l/4 (+8 for odd n), + // compressed cols (l%4)*2 + 8*(n/2) and +1, packed lo/hi. + fn af(l: u32, n: u32, bf: u32) -> u32 { + let r = l / 4 + 8 * (n & 1); + let j = (l & 3) * 2 + 8 * (n / 2); + if bf == 1 { + pack(bf16_bits(a_val(r, j)), bf16_bits(a_val(r, j + 1))) + } else { + pack(f16_bits(a_val(r, j)), f16_bits(a_val(r, j + 1))) + } + } + // f16/bf16 B fragment register n: col l/4, rows (l%4)*2 + 8n and +1. + fn bf(l: u32, n: u32, b16: u32) -> u32 { + let c = l / 4; + let k = (l & 3) * 2 + 8 * n; + if b16 == 1 { + pack(bf16_bits(b_val(k, c)), bf16_bits(b_val(k + 1, c))) + } else { + pack(f16_bits(b_val(k, c)), f16_bits(b_val(k + 1, c))) + } + } + // tf32 A fragment register n: row l/4 (+8 odd n), compressed col (l%4)+4*(n/2). + fn at(l: u32, n: u32) -> u32 { + f32_bits(a_val(l / 4 + 8 * (n & 1), (l & 3) + 4 * (n / 2))) + } + // tf32 B fragment register n: row (l%4)+4n, col l/4. + fn bt(l: u32, n: u32) -> u32 { + f32_bits(b_val((l & 3) + 4 * n, l / 4)) + } + // f32 accumulator quad: rows l/4, l/4+8; cols (l%4)*2, +1. + fn cf(l: u32) -> [f32; 4] { + let r = l / 4; + let c = (l & 3) * 2; + [ + c_val(r, c) as f32, + c_val(r, c + 1) as f32, + c_val(r + 8, c) as f32, + c_val(r + 8, c + 1) as f32, + ] + } + // packed f16 accumulator register n: row l/4+8n, cols (l%4)*2, +1. + fn cp(l: u32, n: u32) -> u32 { + let r = l / 4 + 8 * n; + let c = (l & 3) * 2; + pack(f16_bits(c_val(r, c)), f16_bits(c_val(r, c + 1))) + } + // One metadata thread per quad (k16 f16/bf16, k8 tf32; 4 chunks/row): + // bits [15:0] row g, bits [31:16] row g+8, nibble j = chunk j. + // Only lane l%4 == sel carries the real pattern; the rest carry the decoy. + fn meta_one(l: u32, sel: u32, tf: u32) -> u32 { + let g = l / 4; + let bump = if l % 4 == sel { 0 } else { 1 }; + let mut m = 0; + let mut j = 0; + while j < 4 { + m |= meta_code(g, j, bump, tf) << (4 * j); + m |= meta_code(g + 8, j, bump, tf) << (16 + 4 * j); + j += 1; + } + m + } + // Metadata thread pair per quad (k32 f16/bf16, k16 tf32; 8 chunks/row): + // selector s picks lanes {2s, 2s+1} of the quad, and the pair splits + // the K dimension, keeping the one-thread [row g | row g+8] register + // split (verified against sm_120 hardware; a row-per-thread split + // fails the oracle): + // + // lane 2s+t: bits [15:0] row g chunks 4t..4t+3 + // bits [31:16] row g+8 chunks 4t..4t+3 + fn meta_pair(l: u32, sel: u32, tf: u32) -> u32 { + let g = l / 4; + let t = (l & 3) % 2; + let bump = if (l & 3) / 2 == sel { 0 } else { 1 }; + let mut m = 0; + let mut j = 0; + while j < 4 { + m |= meta_code(g, 4 * t + j, bump, tf) << (4 * j); + m |= meta_code(g + 8, 4 * t + j, bump, tf) << (16 + 4 * j); + j += 1; + } + m + } + + // The selector argument is an ImmArg. Each invocation passes a literal. + macro_rules! store_packed { + ($po:ident, $l:ident, $slot:literal, $value:expr) => {{ + let base = $l as usize * PACKED_STRIDE + $slot * 2; + let value = $value; + unsafe { + *$po.get_unchecked_mut(base) = value[0]; + *$po.get_unchecked_mut(base + 1) = value[1]; + } + }}; + } + macro_rules! store_f32 { + ($fo:ident, $l:ident, $slot:literal, $value:expr) => {{ + let base = $l as usize * F32_STRIDE + $slot * 4; + let value = $value; + unsafe { + *$fo.get_unchecked_mut(base) = value[0]; + *$fo.get_unchecked_mut(base + 1) = value[1]; + *$fo.get_unchecked_mut(base + 2) = value[2]; + *$fo.get_unchecked_mut(base + 3) = value[3]; + } + }}; + } + macro_rules! call_f16_k16 { + ($po:ident, $l:ident, $slot:literal, $sel:literal) => { + store_packed!($po, $l, $slot, unsafe { + wmma::mma_sp_m16n8k16_f16_f16( + [cp($l, 0), cp($l, 1)], + [af($l, 0, 0), af($l, 1, 0)], + [bf($l, 0, 0), bf($l, 1, 0)], + meta_one($l, $sel, 0), + $sel, + ) + }); + }; + } + macro_rules! call_f16_k32 { + ($po:ident, $l:ident, $slot:literal, $sel:literal) => { + store_packed!($po, $l, $slot, unsafe { + wmma::mma_sp_m16n8k32_f16_f16( + [cp($l, 0), cp($l, 1)], + [af($l, 0, 0), af($l, 1, 0), af($l, 2, 0), af($l, 3, 0)], + [bf($l, 0, 0), bf($l, 1, 0), bf($l, 2, 0), bf($l, 3, 0)], + meta_pair($l, $sel, 0), + $sel, + ) + }); + }; + } + macro_rules! call_f32_f16_k16 { + ($fo:ident, $l:ident, $slot:literal, $sel:literal) => { + store_f32!($fo, $l, $slot, unsafe { + wmma::mma_sp_m16n8k16_f32_f16( + cf($l), + [af($l, 0, 0), af($l, 1, 0)], + [bf($l, 0, 0), bf($l, 1, 0)], + meta_one($l, $sel, 0), + $sel, + ) + }); + }; + } + macro_rules! call_f32_f16_k32 { + ($fo:ident, $l:ident, $slot:literal, $sel:literal) => { + store_f32!($fo, $l, $slot, unsafe { + wmma::mma_sp_m16n8k32_f32_f16( + cf($l), + [af($l, 0, 0), af($l, 1, 0), af($l, 2, 0), af($l, 3, 0)], + [bf($l, 0, 0), bf($l, 1, 0), bf($l, 2, 0), bf($l, 3, 0)], + meta_pair($l, $sel, 0), + $sel, + ) + }); + }; + } + macro_rules! call_bf16_k16 { + ($fo:ident, $l:ident, $slot:literal, $sel:literal) => { + store_f32!($fo, $l, $slot, unsafe { + wmma::mma_sp_m16n8k16_f32_bf16( + cf($l), + [af($l, 0, 1), af($l, 1, 1)], + [bf($l, 0, 1), bf($l, 1, 1)], + meta_one($l, $sel, 0), + $sel, + ) + }); + }; + } + macro_rules! call_bf16_k32 { + ($fo:ident, $l:ident, $slot:literal, $sel:literal) => { + store_f32!($fo, $l, $slot, unsafe { + wmma::mma_sp_m16n8k32_f32_bf16( + cf($l), + [af($l, 0, 1), af($l, 1, 1), af($l, 2, 1), af($l, 3, 1)], + [bf($l, 0, 1), bf($l, 1, 1), bf($l, 2, 1), bf($l, 3, 1)], + meta_pair($l, $sel, 0), + $sel, + ) + }); + }; + } + macro_rules! call_tf32_k8 { + ($fo:ident, $l:ident, $slot:literal, $sel:literal) => { + store_f32!($fo, $l, $slot, unsafe { + wmma::mma_sp_m16n8k8_f32_tf32( + cf($l), + [at($l, 0), at($l, 1)], + [bt($l, 0), bt($l, 1)], + meta_one($l, $sel, 1), + $sel, + ) + }); + }; + } + macro_rules! call_tf32_k16 { + ($fo:ident, $l:ident, $slot:literal, $sel:literal) => { + store_f32!($fo, $l, $slot, unsafe { + wmma::mma_sp_m16n8k16_f32_tf32( + cf($l), + [at($l, 0), at($l, 1), at($l, 2), at($l, 3)], + [bt($l, 0), bt($l, 1), bt($l, 2), bt($l, 3)], + meta_pair($l, $sel, 1), + $sel, + ) + }); + }; + } + + #[kernel] + pub fn oracle(mut po: DisjointSlice, mut fo: DisjointSlice) { + let l = thread::threadIdx_x(); + // 2-reg forms, selectors 0, 1, 2, 3. + call_f16_k16!(po, l, 0, 0); + call_f16_k16!(po, l, 1, 1); + call_f16_k16!(po, l, 2, 2); + call_f16_k16!(po, l, 3, 3); + call_f32_f16_k16!(fo, l, 0, 0); + call_f32_f16_k16!(fo, l, 1, 1); + call_f32_f16_k16!(fo, l, 2, 2); + call_f32_f16_k16!(fo, l, 3, 3); + call_bf16_k16!(fo, l, 4, 0); + call_bf16_k16!(fo, l, 5, 1); + call_bf16_k16!(fo, l, 6, 2); + call_bf16_k16!(fo, l, 7, 3); + call_tf32_k8!(fo, l, 8, 0); + call_tf32_k8!(fo, l, 9, 1); + call_tf32_k8!(fo, l, 10, 2); + call_tf32_k8!(fo, l, 11, 3); + // 4-reg forms, selectors 0 and 1. + call_f16_k32!(po, l, 4, 0); + call_f16_k32!(po, l, 5, 1); + call_f32_f16_k32!(fo, l, 12, 0); + call_f32_f16_k32!(fo, l, 13, 1); + call_bf16_k32!(fo, l, 14, 0); + call_bf16_k32!(fo, l, 15, 1); + call_tf32_k16!(fo, l, 16, 0); + call_tf32_k16!(fo, l, 17, 1); + } +} + +/// Register slot -> (row, col) for one lane's four logical accumulators. +fn rc(l: usize, r: usize) -> (usize, usize) { + (l / 4 + 8 * (r / 2), (l % 4) * 2 + r % 2) +} + +/// Host GEMM for the f16/bf16 forms: per 4-wide chunk g the standard code +/// (r,g) keeps columns 4g+i0 and 4g+i1 of logical A. 0x6 selects (2, 1). +fn expect_h(r: usize, c: usize, kdim: usize) -> u32 { + let (r, c) = (r as u32, c as u32); + let mut s = c_val(r, c); + for g in 0..(kdim as u32) / 4 { + let m = meta_code(r, g, 0, 0); + let (i0, i1) = (m & 3, (m >> 2) & 3); + s += a_val(r, 2 * g) * b_val(4 * g + i0, c); + s += a_val(r, 2 * g + 1) * b_val(4 * g + i1, c); + } + s +} + +/// Host GEMM for the tf32 forms: per 2-wide chunk g, 0x4 keeps column 2g +/// and 0xe keeps column 2g+1. +fn expect_t(r: usize, c: usize, kdim: usize) -> u32 { + let (r, c) = (r as u32, c as u32); + let mut s = c_val(r, c); + for g in 0..(kdim as u32) / 2 { + let e = if meta_code(r, g, 0, 1) == 0x4 { 0 } else { 1 }; + s += a_val(r, g) * b_val(2 * g + e, c); + } + s +} + +fn main() { + // 0x6 is in the 16-bit table and selects indices (2, 1). tf32 never uses it. + assert_eq!(meta_code(0, 1, 0, 0) & 3, 2); + assert_eq!((meta_code(0, 1, 0, 0) >> 2) & 3, 1); + assert_eq!(meta_code(0, 0, 0, 1), 0x4); + assert_eq!(meta_code(0, 0, 1, 1), 0xe); + + let ctx = CudaContext::new(0).expect("CUDA context"); + let (major, minor) = ctx.compute_capability().unwrap(); + if major < 8 { + println!("skipping: standard sparse MMA requires sm_80+, found sm_{major}{minor}"); + return; + } + let s = ctx.default_stream(); + let m = kernels::load(&ctx).expect("module"); + let mut pd = DeviceBuffer::::zeroed(&s, 32 * PACKED_STRIDE).unwrap(); + let mut fd = DeviceBuffer::::zeroed(&s, 32 * F32_STRIDE).unwrap(); + let cfg = LaunchConfig { + block_dim: (32, 1, 1), + grid_dim: (1, 1, 1), + shared_mem_bytes: 0, + }; + unsafe { m.oracle(&s, cfg, &mut pd, &mut fd) }.unwrap(); + let p = pd.to_host_vec(&s).unwrap(); + let f = fd.to_host_vec(&s).unwrap(); + let mut bad = 0; + // packed slots: k16 f16 selectors 0..=3, then k32 f16 selectors 0..=1. + let packed_k = [16u32, 16, 16, 16, 32, 32]; + // f32 slots: k16 f32.f16 x4, k16 bf16 x4, k8 tf32 x4, k32 f32.f16 x2, + // k32 bf16 x2, k16 tf32 x2. + let f32_kind = [0u32, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1]; + let f32_k = [ + 16u32, 16, 16, 16, 16, 16, 16, 16, 8, 8, 8, 8, 32, 32, 32, 32, 16, 16, + ]; + for l in 0..32 { + for (slot, kdim) in packed_k.iter().copied().enumerate() { + for r in 0..4 { + let w = p[l * PACKED_STRIDE + slot * 2 + r / 2]; + let got = if r % 2 == 0 { w & 0xffff } else { w >> 16 }; + let (x, y) = rc(l, r); + let want = f16_bits(expect_h(x, y, kdim as usize)); + if got != want { + eprintln!("f16 slot {slot} lane {l} reg {r}: {got:#x} != {want:#x}"); + bad += 1; + } + } + } + for slot in 0..F32_RESULTS { + for r in 0..4 { + let got = f[l * F32_STRIDE + slot * 4 + r]; + let (x, y) = rc(l, r); + let want = if f32_kind[slot] == 0 { + expect_h(x, y, f32_k[slot] as usize) + } else { + expect_t(x, y, f32_k[slot] as usize) + } as f32; + if got != want { + eprintln!("f32 slot {slot} lane {l} reg {r}: {got} != {want}"); + bad += 1; + } + } + } + } + assert_eq!(bad, 0, "accumulator mismatches"); + println!( + "SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM" + ); +} diff --git a/cuda-oxide/crates/rustc-codegen-cuda/src/generated_intrinsics.rs b/cuda-oxide/crates/rustc-codegen-cuda/src/generated_intrinsics.rs index 635436eee3..4993c40969 100644 --- a/cuda-oxide/crates/rustc-codegen-cuda/src/generated_intrinsics.rs +++ b/cuda-oxide/crates/rustc-codegen-cuda/src/generated_intrinsics.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated collector predicates for intrinsic placeholder functions. @@ -569,6 +569,13 @@ pub(crate) const GENERATED_INTRINSIC_CANONICAL_PATHS: &[&str] = &[ "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0222", "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0226", "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0225", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1042", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1041", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1043", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1040", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1045", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1044", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1046", "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0163", "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0167", "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0164", @@ -597,6 +604,7 @@ pub(crate) const GENERATED_INTRINSIC_CANONICAL_PATHS: &[&str] = &[ "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0190", "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0194", "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0193", + "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1039", "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0203", "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0207", "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0204", @@ -1610,6 +1618,13 @@ pub(crate) const GENERATED_INTRINSIC_PUBLIC_PATHS: &[&str] = &[ "cuda_intrinsics::matrix::mma_sp_m16n8k128_s32_u4_s4", "cuda_intrinsics::matrix::mma_sp_m16n8k128_s32_u4_s4_satfinite", "cuda_intrinsics::matrix::mma_sp_m16n8k128_s32_u4_satfinite", + "cuda_intrinsics::matrix::mma_sp_m16n8k16_f16_f16", + "cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_bf16", + "cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_f16", + "cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_tf32", + "cuda_intrinsics::matrix::mma_sp_m16n8k32_f16_f16", + "cuda_intrinsics::matrix::mma_sp_m16n8k32_f32_bf16", + "cuda_intrinsics::matrix::mma_sp_m16n8k32_f32_f16", "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8", "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8_satfinite", "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8_u8", @@ -1638,6 +1653,7 @@ pub(crate) const GENERATED_INTRINSIC_PUBLIC_PATHS: &[&str] = &[ "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8_s8", "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8_s8_satfinite", "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8_satfinite", + "cuda_intrinsics::matrix::mma_sp_m16n8k8_f32_tf32", "cuda_intrinsics::matrix::mma_sp_ordered_metadata_m16n8k128_s32_s4", "cuda_intrinsics::matrix::mma_sp_ordered_metadata_m16n8k128_s32_s4_satfinite", "cuda_intrinsics::matrix::mma_sp_ordered_metadata_m16n8k128_s32_s4_u4", @@ -2657,6 +2673,13 @@ pub(crate) fn is_generated_intrinsic_canonical_path(path: &str) -> bool { | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0222" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0226" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0225" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1042" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1041" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1043" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1040" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1045" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1044" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1046" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0163" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0167" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0164" @@ -2685,6 +2708,7 @@ pub(crate) fn is_generated_intrinsic_canonical_path(path: &str) -> bool { | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0190" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0194" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0193" + | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1039" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0203" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0207" | "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0204" @@ -3706,6 +3730,13 @@ pub(crate) fn is_generated_intrinsic_compatibility_path(path: &str) -> bool { | "cuda_device::wmma::mma_sp_m16n8k128_s32_u4_s4" | "cuda_device::wmma::mma_sp_m16n8k128_s32_u4_s4_satfinite" | "cuda_device::wmma::mma_sp_m16n8k128_s32_u4_satfinite" + | "cuda_device::wmma::mma_sp_m16n8k16_f16_f16" + | "cuda_device::wmma::mma_sp_m16n8k16_f32_bf16" + | "cuda_device::wmma::mma_sp_m16n8k16_f32_f16" + | "cuda_device::wmma::mma_sp_m16n8k16_f32_tf32" + | "cuda_device::wmma::mma_sp_m16n8k32_f16_f16" + | "cuda_device::wmma::mma_sp_m16n8k32_f32_bf16" + | "cuda_device::wmma::mma_sp_m16n8k32_f32_f16" | "cuda_device::wmma::mma_sp_m16n8k32_s32_s8" | "cuda_device::wmma::mma_sp_m16n8k32_s32_s8_satfinite" | "cuda_device::wmma::mma_sp_m16n8k32_s32_s8_u8" @@ -3734,6 +3765,7 @@ pub(crate) fn is_generated_intrinsic_compatibility_path(path: &str) -> bool { | "cuda_device::wmma::mma_sp_m16n8k64_s32_u8_s8" | "cuda_device::wmma::mma_sp_m16n8k64_s32_u8_s8_satfinite" | "cuda_device::wmma::mma_sp_m16n8k64_s32_u8_satfinite" + | "cuda_device::wmma::mma_sp_m16n8k8_f32_tf32" | "cuda_device::wmma::mma_sp_ordered_metadata_m16n8k128_s32_s4" | "cuda_device::wmma::mma_sp_ordered_metadata_m16n8k128_s32_s4_satfinite" | "cuda_device::wmma::mma_sp_ordered_metadata_m16n8k128_s32_s4_u4" diff --git a/cuda-oxide/cuda-oxide-book/compiler/mlir-dialects.md b/cuda-oxide/cuda-oxide-book/compiler/mlir-dialects.md index 19986fe39e..aa614bd978 100644 --- a/cuda-oxide/cuda-oxide-book/compiler/mlir-dialects.md +++ b/cuda-oxide/cuda-oxide-book/compiler/mlir-dialects.md @@ -303,11 +303,11 @@ they become `call` instructions to `@llvm.nvvm.*` intrinsics. ### Architecture Coverage -At catalog SHA-256 `3f56e2a1` (the stamp in every `ops/generated/` file +At catalog SHA-256 `accf6a7c` (the stamp in every `ops/generated/` file header), the dialect holds 585 operations across 42 modules, and they come from two different places. The split is the first thing to know about it, because it decides where -- and whether -- you would add one. If the header -stamp no longer starts with `3f56e2a1`, the counts on this page predate the +stamp no longer starts with `accf6a7c`, the counts on this page predate the catalog you are reading. **Hand-written**, directly under `cuda-oxide/crates/dialect-nvvm/src/ops/`. These are the @@ -327,7 +327,7 @@ describe. There are seven modules and 26 operations: **Generated**, under `ops/generated/`, from `intrinsics/catalog.json` by `cuda-intrinsics-gen`. Every file there opens with `// @generated ... DO NOT EDIT.`, and editing one by hand is undone by the next generator run. This is -the large majority -- 35 modules and 559 operations, resolved from 1038 catalog +the large majority -- 35 modules and 559 operations, resolved from 1046 catalog entries, since several intrinsics can share one structural op: | Area | Modules | Ops | diff --git a/cuda-oxide/intrinsics/abi-v1.toml b/cuda-oxide/intrinsics/abi-v1.toml index 052304523d..e08bfe111f 100644 --- a/cuda-oxide/intrinsics/abi-v1.toml +++ b/cuda-oxide/intrinsics/abi-v1.toml @@ -7236,3 +7236,59 @@ status = "active" catalog_id = "cp_async_bulk_tensor_5d_g2s_cta" operation_key = "memory.copy.async.bulk.tensor.g2s.cta.tile.5d" raw_rust_signature = { safe = false, arguments = ["*mut u8", "*const u8", "i32", "i32", "i32", "i32", "i32", "*mut u64"], result = "()" } + +[[entry]] +abi_id = "i1039" +status = "active" +catalog_id = "mma_sp_m16n8k8_f32_tf32" +operation_key = "matrix.mma.sp.m16n8k8.row.col.f32.tf32.tf32.f32.not_applicable.standard_metadata" +raw_rust_signature = { safe = false, arguments = ["[f32; 4]", "[u32; 2]", "[u32; 2]", "u32", "u32"], result = "[f32; 4]" } + +[[entry]] +abi_id = "i1040" +status = "active" +catalog_id = "mma_sp_m16n8k16_f32_tf32" +operation_key = "matrix.mma.sp.m16n8k16.row.col.f32.tf32.tf32.f32.not_applicable.standard_metadata" +raw_rust_signature = { safe = false, arguments = ["[f32; 4]", "[u32; 4]", "[u32; 4]", "u32", "u32"], result = "[f32; 4]" } + +[[entry]] +abi_id = "i1041" +status = "active" +catalog_id = "mma_sp_m16n8k16_f32_bf16" +operation_key = "matrix.mma.sp.m16n8k16.row.col.f32.bf16.bf16.f32.not_applicable.standard_metadata" +raw_rust_signature = { safe = false, arguments = ["[f32; 4]", "[u32; 2]", "[u32; 2]", "u32", "u32"], result = "[f32; 4]" } + +[[entry]] +abi_id = "i1042" +status = "active" +catalog_id = "mma_sp_m16n8k16_f16_f16" +operation_key = "matrix.mma.sp.m16n8k16.row.col.f16.f16.f16.f16.not_applicable.standard_metadata" +raw_rust_signature = { safe = false, arguments = ["[u32; 2]", "[u32; 2]", "[u32; 2]", "u32", "u32"], result = "[u32; 2]" } + +[[entry]] +abi_id = "i1043" +status = "active" +catalog_id = "mma_sp_m16n8k16_f32_f16" +operation_key = "matrix.mma.sp.m16n8k16.row.col.f32.f16.f16.f32.not_applicable.standard_metadata" +raw_rust_signature = { safe = false, arguments = ["[f32; 4]", "[u32; 2]", "[u32; 2]", "u32", "u32"], result = "[f32; 4]" } + +[[entry]] +abi_id = "i1044" +status = "active" +catalog_id = "mma_sp_m16n8k32_f32_bf16" +operation_key = "matrix.mma.sp.m16n8k32.row.col.f32.bf16.bf16.f32.not_applicable.standard_metadata" +raw_rust_signature = { safe = false, arguments = ["[f32; 4]", "[u32; 4]", "[u32; 4]", "u32", "u32"], result = "[f32; 4]" } + +[[entry]] +abi_id = "i1045" +status = "active" +catalog_id = "mma_sp_m16n8k32_f16_f16" +operation_key = "matrix.mma.sp.m16n8k32.row.col.f16.f16.f16.f16.not_applicable.standard_metadata" +raw_rust_signature = { safe = false, arguments = ["[u32; 2]", "[u32; 4]", "[u32; 4]", "u32", "u32"], result = "[u32; 2]" } + +[[entry]] +abi_id = "i1046" +status = "active" +catalog_id = "mma_sp_m16n8k32_f32_f16" +operation_key = "matrix.mma.sp.m16n8k32.row.col.f32.f16.f16.f32.not_applicable.standard_metadata" +raw_rust_signature = { safe = false, arguments = ["[f32; 4]", "[u32; 4]", "[u32; 4]", "u32", "u32"], result = "[f32; 4]" } diff --git a/cuda-oxide/intrinsics/catalog.json b/cuda-oxide/intrinsics/catalog.json index d054b5bb65..6927e7cdcc 100644 --- a/cuda-oxide/intrinsics/catalog.json +++ b/cuda-oxide/intrinsics/catalog.json @@ -11,8 +11,8 @@ }, "inputs": { "imported_sha256": "54d47b8e281dd953dc95fe16f834ff38164d9809171c9a1af097231b0bc45cab", - "overlay_sha256": "bdfaca84cf4ed51ee06ef7caf5ce1acc979849117f7fd7afcd65b8b8397bdb37", - "abi_ledger_sha256": "f4cf9e3a7cf9f40725d1e5a2645796167e9615c3c47d2998c67ab1c3952fb210", + "overlay_sha256": "077d201c85c0694e67f3a7e35d9371f785907043d15d8cc85755de79c1d42d35", + "abi_ledger_sha256": "144a34d3b93d387b05f98c8b5df213612bcf112c8010ea327d5202d890900073", "evidence_sha256": [ "cuda-12.0-libnvvm-12.0.140-ex2-f16.json:7102ea7d567ff2d2eb75a0384148d2e5eb6e605c26a5b98c71371fa3c46adef6", "cuda-12.9-libnvvm-12.9.86-f32x2.json:bc5bb505677989affa9ac1044da772b4eb349700dc65e16f09fffffa1f5c493e", @@ -44,6 +44,7 @@ "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic.json:ac4ab5a239da0433d9e35f82ec1efbf81e28f3d05e2dcb49ad1eb92964408467", "cuda-13.3-libnvvm-13.3.33-scalar-conversion.json:33f4342cf5a356fd94eabd446db52bd1f309ac2c489440e93a1a42d680692824", "cuda-13.3-libnvvm-13.3.33-scalar-math.json:38afa3f8bf6588dfc1eafe90df3eee1c1bb953a5d4e58ca68a3b62df44289f0b", + "cuda-13.3-libnvvm-13.3.33-sparse-mma-ampere-float.json:e375e3e74b8d857bcb71d5478b5593fd5ef29ae7c06777996ea4bda24a850ac6", "cuda-13.3-libnvvm-13.3.33-sparse-mma-int8-m16n8k64.json:74b5dec9a9db352ea7eb1ee0b1470ba5a56f84f0ed55bf034a60fc29790b6d95", "cuda-13.3-libnvvm-13.3.33-sparse-mma-int8.json:ff0fd4a21e609d10993df1ce96a20e959dfbf2c9da0d397579957b18d2ad8a3f", "cuda-13.3-libnvvm-13.3.33-sparse-mma-ordered-ampere-float.json:94d97593838d9c435ebdc0e0742c9267e72693c92fbcdae35504223cbb3c1515", @@ -109,6 +110,7 @@ "rust-llvm-23.1.3-aab11ee0-scalar-arithmetic.json:2b75b6fabd4baec416c2836d54d0ec9f2d2f0381f6a22e0b6b923703c729419f", "rust-llvm-23.1.3-aab11ee0-scalar-conversion.json:fc454571fa8ee04649455963022b7a3ab4eaecbdffa561522b00f495c8153d78", "rust-llvm-23.1.3-aab11ee0-scalar-math.json:f1d1d54c5cb53cbef1fc0cbd447c18b9a9c9909405174d8f23576e0e4db1bdbf", + "rust-llvm-23.1.3-aab11ee0-sparse-mma-ampere-float.json:bbd55a24f9c611b3c26c40ead04c5b28ed8df072b8b5112f3f04eca8df35a045", "rust-llvm-23.1.3-aab11ee0-sparse-mma-fp8.json:f21f3182c4d55d51ca4e775ecf7b68abb577d31592ebaa53c11de6afdf8e173e", "rust-llvm-23.1.3-aab11ee0-sparse-mma-int8-m16n8k64.json:dc80ab1a5f91024c3926ee08a18292b468a5134166bef96d65084e50e98c023a", "rust-llvm-23.1.3-aab11ee0-sparse-mma-int8.json:261b4e8a235c5b1d684e03cde8fc60b7976ce2e0b480fc9eb326ae1f1529afa9", @@ -183072,17 +183074,17 @@ "summary": "Multiplies warp-distributed sparse unsigned A and unsigned B INT4 fragments and adds a saturating s32 accumulator." }, { - "id": "mma_sp_m16n8k32_s32_s8", - "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.s8.s8.s32.wrapping.standard_metadata", + "id": "mma_sp_m16n8k16_f16_f16", + "operation_key": "matrix.mma.sp.m16n8k16.row.col.f16.f16.f16.f16.not_applicable.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_s8" + "source_record": "int_nvvm_mma_sp_m16n8k16_row_col_f16_f16" }, "selections": [ { - "source_record": "anonymous_19434", - "asm": "mma.sp.sync.aligned.m16n8k32.row.col.s32.s8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19344", + "asm": "mma.sp.sync.aligned.m16n8k16.row.col.f16.f16.f16.f16\n\t\t{{$rd0, $rd1}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -183090,32 +183092,30 @@ } ], "rust": { - "abi_id": "i0163", + "abi_id": "i1042", "module": "matrix", - "name": "mma_sp_m16n8k32_s32_s8", + "name": "mma_sp_m16n8k16_f16_f16", "arguments": [ - "[i32; 4]", + "[u32; 2]", "[u32; 2]", "[u32; 2]", "u32", "u32" ], - "result": "[i32; 4]", + "result": "[u32; 2]", "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0163", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1042", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k16_f16_f16", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k32_s32_s8" + "cuda_device::wmma::mma_sp_m16n8k16_f16_f16" ] }, "dialect": { "op_type": "SparseMmaOp", "op_name": "nvvm.sparse_mma", "operands": [ - "i32", - "i32", "i32", "i32", "u32", @@ -183126,37 +183126,31 @@ "u32" ], "results": [ - "i32", - "i32", "i32", "i32" ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.s8", + "symbol": "llvm.nvvm.mma.sp.m16n8k16.row.col.f16.f16", "arguments": [ - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", "i32", "i32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "v2f16", + "v2f16" ], "properties": [ - "ImmArg", + "ImmArg", "IntrNoCallback", "IntrNoMem", - "Range" + "Range" ], "result_facts": { "no_undef": false, @@ -183180,7 +183174,7 @@ } ] }, - "ptx_result": "[i32; 4]", + "ptx_result": "[u32; 2]", "targets": "all", "ptx_isa_version": "9.3", "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", @@ -183223,11 +183217,11 @@ "sm_80", "ptx71" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "eight standard-metadata sparse floating inline PTX forms lowered for sm_80 at PTX ISA 7.1", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 6117422b739d9c39ae85c36a064b6ba0cfe6242cbd6c19fffe7ff68365e00a79.", + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -183238,15 +183232,15 @@ "sm_80", "ptx71" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "PTX for the eight standard-metadata sparse floating MMA forms assembled for sm_80", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 a84718234f047484ec8d86c72e2a333a2982ea25b4266f109070266baa49c715.", - "artifact_kind": null, + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", + "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" } ] }, @@ -183270,18 +183264,18 @@ "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", "build_id_prefix": "2330c0", - "status": "validated", + "status": "executed", "stages": [ { "targets": [ "compute_80", "ptx93" ], - "representation": "convergent sparse m16n8k32 signed INT8 inline PTX with selector immediates 0 and 1", + "representation": "eight convergent side-effecting standard-metadata sparse floating inline PTX calls", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -183292,34 +183286,64 @@ "sm_80", "ptx93" ], - "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "representation": "PTX containing all eight standard sparse floating MMA forms", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "libNVVM output for all eight standard sparse floating MMA forms linked to one sm_80 cubin", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", "tool_version": "V13.3.33", "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + }, + { + "targets": [ + "sm_120", + "ptx93" + ], + "representation": "all eight standard sparse floating MMA APIs, every legal selector, checked on all 32 lanes against a host GEMM", + "stage": "runtime", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null } ] } ], "sparse_mma": { - "shape": "m16n8k32", - "accumulator": "s32", - "a_element": "s8", - "b_element": "s8", + "shape": "m16n8k16", + "accumulator": "f16", + "a_element": "f16", + "b_element": "f16", "a_layout": "row", "b_layout": "col", - "overflow": "wrapping", + "overflow": "not_applicable", "metadata": "standard", - "selector": "immediate_zero_or_one", + "selector": "immediate_zero_through_three", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", - "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", - "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "adapter": "c2_u32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d2_u32", + "llvm_adapter": "a2_v2_f16_b2_v2_f16_c2_v2_f16_metadata_i32_selector_i32_to_d2_v2_f16", "compatibility_source": "generated_stub", - "runtime_validation": "unexecuted" + "runtime_validation": "executed" }, "lowering": "generated_sparse_mma", "expected_ptx": { @@ -183328,18 +183352,18 @@ "sp", "sync", "aligned", - "m16n8k32", + "m16n8k16", "row", "col", - "s32", - "s8", - "s8", - "s32" + "f16", + "f16", + "f16", + "f16" ], "operands": [ { "kind": "register_list", - "length": 4 + "length": 2 }, { "kind": "register_list", @@ -183351,7 +183375,7 @@ }, { "kind": "register_list", - "length": 4 + "length": 2 }, { "kind": "register" @@ -183361,20 +183385,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse signed A and signed B INT8 fragments and adds a wrapping s32 accumulator." + "summary": "Multiplies warp-distributed sparse f16 A and B fragments and adds a packed f16 accumulator." }, { - "id": "mma_sp_m16n8k32_s32_s8_satfinite", - "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.s8.s8.s32.satfinite.standard_metadata", + "id": "mma_sp_m16n8k16_f32_bf16", + "operation_key": "matrix.mma.sp.m16n8k16.row.col.f32.bf16.bf16.f32.not_applicable.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_satfinite_s8" + "source_record": "int_nvvm_mma_sp_m16n8k16_row_col_bf16" }, "selections": [ { - "source_record": "anonymous_19495", - "asm": "mma.sp.sync.aligned.m16n8k32.row.col.satfinite.s32.s8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19308", + "asm": "mma.sp.sync.aligned.m16n8k16.row.col.f32.bf16.bf16.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -183382,34 +183406,34 @@ } ], "rust": { - "abi_id": "i0167", + "abi_id": "i1041", "module": "matrix", - "name": "mma_sp_m16n8k32_s32_s8_satfinite", + "name": "mma_sp_m16n8k16_f32_bf16", "arguments": [ - "[i32; 4]", + "[f32; 4]", "[u32; 2]", "[u32; 2]", "u32", "u32" ], - "result": "[i32; 4]", + "result": "[f32; 4]", "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0167", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8_satfinite", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1041", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_bf16", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k32_s32_s8_satfinite" + "cuda_device::wmma::mma_sp_m16n8k16_f32_bf16" ] }, "dialect": { "op_type": "SparseMmaOp", "op_name": "nvvm.sparse_mma", "operands": [ - "i32", - "i32", - "i32", - "i32", + "f32", + "f32", + "f32", + "f32", "u32", "u32", "u32", @@ -183418,37 +183442,37 @@ "u32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.satfinite.s8", + "symbol": "llvm.nvvm.mma.sp.m16n8k16.row.col.bf16", "arguments": [ "i32", "i32", "i32", "i32", - "i32", - "i32", - "i32", - "i32", + "f32", + "f32", + "f32", + "f32", "i32", "i32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ], "properties": [ "ImmArg", "IntrNoCallback", "IntrNoMem", - "Range" + "Range" ], "result_facts": { "no_undef": false, @@ -183472,7 +183496,7 @@ } ] }, - "ptx_result": "[i32; 4]", + "ptx_result": "[f32; 4]", "targets": "all", "ptx_isa_version": "9.3", "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", @@ -183515,11 +183539,11 @@ "sm_80", "ptx71" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "eight standard-metadata sparse floating inline PTX forms lowered for sm_80 at PTX ISA 7.1", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3c5d9bb6256f7009234918046b2dfb11507265c220722e1a42aa20653a409aec.", + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -183530,15 +183554,15 @@ "sm_80", "ptx71" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "PTX for the eight standard-metadata sparse floating MMA forms assembled for sm_80", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9c0a5d19a7e1637ff335da9a214e99e06463d5160df778e1bad3dfcfc6874890.", - "artifact_kind": null, + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", + "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" } ] }, @@ -183562,18 +183586,18 @@ "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", "build_id_prefix": "2330c0", - "status": "validated", + "status": "executed", "stages": [ { "targets": [ "compute_80", "ptx93" ], - "representation": "convergent sparse m16n8k32 signed saturating INT8 inline PTX with selector immediates 0 and 1", + "representation": "eight convergent side-effecting standard-metadata sparse floating inline PTX calls", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -183584,34 +183608,64 @@ "sm_80", "ptx93" ], - "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "representation": "PTX containing all eight standard sparse floating MMA forms", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "libNVVM output for all eight standard sparse floating MMA forms linked to one sm_80 cubin", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", "tool_version": "V13.3.33", "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + }, + { + "targets": [ + "sm_120", + "ptx93" + ], + "representation": "all eight standard sparse floating MMA APIs, every legal selector, checked on all 32 lanes against a host GEMM", + "stage": "runtime", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null } ] } ], "sparse_mma": { - "shape": "m16n8k32", - "accumulator": "s32", - "a_element": "s8", - "b_element": "s8", + "shape": "m16n8k16", + "accumulator": "f32", + "a_element": "bf16", + "b_element": "bf16", "a_layout": "row", "b_layout": "col", - "overflow": "satfinite", + "overflow": "not_applicable", "metadata": "standard", - "selector": "immediate_zero_or_one", + "selector": "immediate_zero_through_three", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", - "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", - "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "adapter": "c4_f32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_f32", + "llvm_adapter": "a2_i32_b2_i32_c4_f32_metadata_i32_selector_i32_to_d4_f32", "compatibility_source": "generated_stub", - "runtime_validation": "unexecuted" + "runtime_validation": "executed" }, "lowering": "generated_sparse_mma", "expected_ptx": { @@ -183620,14 +183674,13 @@ "sp", "sync", "aligned", - "m16n8k32", + "m16n8k16", "row", "col", - "satfinite", - "s32", - "s8", - "s8", - "s32" + "f32", + "bf16", + "bf16", + "f32" ], "operands": [ { @@ -183654,20 +183707,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse signed A and signed B INT8 fragments and adds a saturating s32 accumulator." + "summary": "Multiplies warp-distributed sparse bf16 A and B fragments and adds a f32 accumulator." }, { - "id": "mma_sp_m16n8k32_s32_s8_u8", - "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.s8.u8.s32.wrapping.standard_metadata", + "id": "mma_sp_m16n8k16_f32_f16", + "operation_key": "matrix.mma.sp.m16n8k16.row.col.f32.f16.f16.f32.not_applicable.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_s8_u8" + "source_record": "int_nvvm_mma_sp_m16n8k16_row_col_f32_f32" }, "selections": [ { - "source_record": "anonymous_19439", - "asm": "mma.sp.sync.aligned.m16n8k32.row.col.s32.s8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19348", + "asm": "mma.sp.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -183675,34 +183728,34 @@ } ], "rust": { - "abi_id": "i0164", + "abi_id": "i1043", "module": "matrix", - "name": "mma_sp_m16n8k32_s32_s8_u8", + "name": "mma_sp_m16n8k16_f32_f16", "arguments": [ - "[i32; 4]", + "[f32; 4]", "[u32; 2]", "[u32; 2]", "u32", "u32" ], - "result": "[i32; 4]", + "result": "[f32; 4]", "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0164", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8_u8", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1043", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_f16", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k32_s32_s8_u8" + "cuda_device::wmma::mma_sp_m16n8k16_f32_f16" ] }, "dialect": { "op_type": "SparseMmaOp", "op_name": "nvvm.sparse_mma", "operands": [ - "i32", - "i32", - "i32", - "i32", + "f32", + "f32", + "f32", + "f32", "u32", "u32", "u32", @@ -183711,37 +183764,37 @@ "u32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.s8.u8", + "symbol": "llvm.nvvm.mma.sp.m16n8k16.row.col.f32.f32", "arguments": [ - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "f32", + "f32", + "f32", + "f32", "i32", "i32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ], "properties": [ "ImmArg", "IntrNoCallback", "IntrNoMem", - "Range" + "Range" ], "result_facts": { "no_undef": false, @@ -183765,7 +183818,7 @@ } ] }, - "ptx_result": "[i32; 4]", + "ptx_result": "[f32; 4]", "targets": "all", "ptx_isa_version": "9.3", "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", @@ -183808,11 +183861,11 @@ "sm_80", "ptx71" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "eight standard-metadata sparse floating inline PTX forms lowered for sm_80 at PTX ISA 7.1", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 32f1c01ee1a43ca81812d076ee8db48b8928aa441daf3f71dfc025f6b50a516a.", + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -183823,15 +183876,15 @@ "sm_80", "ptx71" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "PTX for the eight standard-metadata sparse floating MMA forms assembled for sm_80", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 875de648ec423e0f311608024d48bd81ae45ae442c9741a8f08c01502f863e9b.", - "artifact_kind": null, + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", + "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" } ] }, @@ -183855,18 +183908,18 @@ "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", "build_id_prefix": "2330c0", - "status": "validated", + "status": "executed", "stages": [ { "targets": [ "compute_80", "ptx93" ], - "representation": "convergent sparse m16n8k32 mixed-sign INT8 inline PTX with selector immediates 0 and 1", + "representation": "eight convergent side-effecting standard-metadata sparse floating inline PTX calls", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -183877,34 +183930,64 @@ "sm_80", "ptx93" ], - "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "representation": "PTX containing all eight standard sparse floating MMA forms", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "libNVVM output for all eight standard sparse floating MMA forms linked to one sm_80 cubin", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", "tool_version": "V13.3.33", "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + }, + { + "targets": [ + "sm_120", + "ptx93" + ], + "representation": "all eight standard sparse floating MMA APIs, every legal selector, checked on all 32 lanes against a host GEMM", + "stage": "runtime", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null } ] } ], "sparse_mma": { - "shape": "m16n8k32", - "accumulator": "s32", - "a_element": "s8", - "b_element": "u8", + "shape": "m16n8k16", + "accumulator": "f32", + "a_element": "f16", + "b_element": "f16", "a_layout": "row", "b_layout": "col", - "overflow": "wrapping", + "overflow": "not_applicable", "metadata": "standard", - "selector": "immediate_zero_or_one", + "selector": "immediate_zero_through_three", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", - "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", - "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "adapter": "c4_f32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_f32", + "llvm_adapter": "a2_v2_f16_b2_v2_f16_c4_f32_metadata_i32_selector_i32_to_d4_f32", "compatibility_source": "generated_stub", - "runtime_validation": "unexecuted" + "runtime_validation": "executed" }, "lowering": "generated_sparse_mma", "expected_ptx": { @@ -183913,13 +183996,13 @@ "sp", "sync", "aligned", - "m16n8k32", + "m16n8k16", "row", "col", - "s32", - "s8", - "u8", - "s32" + "f32", + "f16", + "f16", + "f32" ], "operands": [ { @@ -183946,20 +184029,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse signed A and unsigned B INT8 fragments and adds a wrapping s32 accumulator." + "summary": "Multiplies warp-distributed sparse f16 A and B fragments and adds a f32 accumulator." }, { - "id": "mma_sp_m16n8k32_s32_s8_u8_satfinite", - "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.s8.u8.s32.satfinite.standard_metadata", + "id": "mma_sp_m16n8k16_f32_tf32", + "operation_key": "matrix.mma.sp.m16n8k16.row.col.f32.tf32.tf32.f32.not_applicable.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_satfinite_s8_u8" + "source_record": "int_nvvm_mma_sp_m16n8k16_row_col_tf32" }, "selections": [ { - "source_record": "anonymous_19498", - "asm": "mma.sp.sync.aligned.m16n8k32.row.col.satfinite.s32.s8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19336", + "asm": "mma.sp.sync.aligned.m16n8k16.row.col.f32.tf32.tf32.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -183967,34 +184050,38 @@ } ], "rust": { - "abi_id": "i0168", + "abi_id": "i1040", "module": "matrix", - "name": "mma_sp_m16n8k32_s32_s8_u8_satfinite", + "name": "mma_sp_m16n8k16_f32_tf32", "arguments": [ - "[i32; 4]", - "[u32; 2]", - "[u32; 2]", + "[f32; 4]", + "[u32; 4]", + "[u32; 4]", "u32", "u32" ], - "result": "[i32; 4]", + "result": "[f32; 4]", "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0168", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8_u8_satfinite", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1040", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_tf32", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k32_s32_s8_u8_satfinite" + "cuda_device::wmma::mma_sp_m16n8k16_f32_tf32" ] }, "dialect": { "op_type": "SparseMmaOp", "op_name": "nvvm.sparse_mma", "operands": [ - "i32", - "i32", - "i32", - "i32", + "f32", + "f32", + "f32", + "f32", + "u32", + "u32", + "u32", + "u32", "u32", "u32", "u32", @@ -184003,14 +184090,14 @@ "u32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.satfinite.s8.u8", + "symbol": "llvm.nvvm.mma.sp.m16n8k16.row.col.tf32", "arguments": [ "i32", "i32", @@ -184020,20 +184107,24 @@ "i32", "i32", "i32", + "f32", + "f32", + "f32", + "f32", "i32", "i32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ], "properties": [ - "ImmArg", + "ImmArg", "IntrNoCallback", "IntrNoMem", - "Range" + "Range" ], "result_facts": { "no_undef": false, @@ -184057,7 +184148,7 @@ } ] }, - "ptx_result": "[i32; 4]", + "ptx_result": "[f32; 4]", "targets": "all", "ptx_isa_version": "9.3", "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", @@ -184100,11 +184191,11 @@ "sm_80", "ptx71" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "eight standard-metadata sparse floating inline PTX forms lowered for sm_80 at PTX ISA 7.1", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 b79bb4f92abfb0ce7a3b13baed56134e8043e73d4552d305d42f8f2d97661bfd.", + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -184115,15 +184206,15 @@ "sm_80", "ptx71" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "PTX for the eight standard-metadata sparse floating MMA forms assembled for sm_80", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 adbd36486601138ffe021f493473ae535351c523380e780a11678e1a4da0e4e7.", - "artifact_kind": null, + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", + "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" } ] }, @@ -184147,18 +184238,18 @@ "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", "build_id_prefix": "2330c0", - "status": "validated", + "status": "executed", "stages": [ { "targets": [ "compute_80", "ptx93" ], - "representation": "convergent sparse m16n8k32 mixed-sign saturating INT8 inline PTX with selector immediates 0 and 1", + "representation": "eight convergent side-effecting standard-metadata sparse floating inline PTX calls", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -184169,34 +184260,64 @@ "sm_80", "ptx93" ], - "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "representation": "PTX containing all eight standard sparse floating MMA forms", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "libNVVM output for all eight standard sparse floating MMA forms linked to one sm_80 cubin", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", "tool_version": "V13.3.33", "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + }, + { + "targets": [ + "sm_120", + "ptx93" + ], + "representation": "all eight standard sparse floating MMA APIs, every legal selector, checked on all 32 lanes against a host GEMM", + "stage": "runtime", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null } ] } ], "sparse_mma": { - "shape": "m16n8k32", - "accumulator": "s32", - "a_element": "s8", - "b_element": "u8", + "shape": "m16n8k16", + "accumulator": "f32", + "a_element": "tf32", + "b_element": "tf32", "a_layout": "row", "b_layout": "col", - "overflow": "satfinite", + "overflow": "not_applicable", "metadata": "standard", "selector": "immediate_zero_or_one", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", - "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", - "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "adapter": "c4_f32_a4_u32_b4_u32_metadata_u32_selector_u32_to_d4_f32", + "llvm_adapter": "a4_i32_b4_i32_c4_f32_metadata_i32_selector_i32_to_d4_f32", "compatibility_source": "generated_stub", - "runtime_validation": "unexecuted" + "runtime_validation": "executed" }, "lowering": "generated_sparse_mma", "expected_ptx": { @@ -184205,14 +184326,13 @@ "sp", "sync", "aligned", - "m16n8k32", + "m16n8k16", "row", "col", - "satfinite", - "s32", - "s8", - "u8", - "s32" + "f32", + "tf32", + "tf32", + "f32" ], "operands": [ { @@ -184221,11 +184341,11 @@ }, { "kind": "register_list", - "length": 2 + "length": 4 }, { "kind": "register_list", - "length": 2 + "length": 4 }, { "kind": "register_list", @@ -184239,20 +184359,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse signed A and unsigned B INT8 fragments and adds a saturating s32 accumulator." + "summary": "Multiplies warp-distributed sparse tf32 A and B fragments and adds a f32 accumulator." }, { - "id": "mma_sp_m16n8k32_s32_u8", - "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.u8.u8.s32.wrapping.standard_metadata", + "id": "mma_sp_m16n8k32_f16_f16", + "operation_key": "matrix.mma.sp.m16n8k32.row.col.f16.f16.f16.f16.not_applicable.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_u8" + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_f16_f16" }, "selections": [ { - "source_record": "anonymous_19448", - "asm": "mma.sp.sync.aligned.m16n8k32.row.col.s32.u8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19356", + "asm": "mma.sp.sync.aligned.m16n8k32.row.col.f16.f16.f16.f16\n\t\t{{$rd0, $rd1}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -184260,24 +184380,24 @@ } ], "rust": { - "abi_id": "i0165", + "abi_id": "i1045", "module": "matrix", - "name": "mma_sp_m16n8k32_s32_u8", + "name": "mma_sp_m16n8k32_f16_f16", "arguments": [ - "[i32; 4]", - "[u32; 2]", "[u32; 2]", + "[u32; 4]", + "[u32; 4]", "u32", "u32" ], - "result": "[i32; 4]", + "result": "[u32; 2]", "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0165", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_u8", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1045", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_f16_f16", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k32_s32_u8" + "cuda_device::wmma::mma_sp_m16n8k32_f16_f16" ] }, "dialect": { @@ -184286,8 +184406,10 @@ "operands": [ "i32", "i32", - "i32", - "i32", + "u32", + "u32", + "u32", + "u32", "u32", "u32", "u32", @@ -184296,37 +184418,35 @@ "u32" ], "results": [ - "i32", - "i32", "i32", "i32" ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.u8", + "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.f16.f16", "arguments": [ - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", "i32", "i32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "v2f16", + "v2f16" ], "properties": [ - "ImmArg", + "ImmArg", "IntrNoCallback", "IntrNoMem", - "Range" + "Range" ], "result_facts": { "no_undef": false, @@ -184350,7 +184470,7 @@ } ] }, - "ptx_result": "[i32; 4]", + "ptx_result": "[u32; 2]", "targets": "all", "ptx_isa_version": "9.3", "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", @@ -184393,11 +184513,11 @@ "sm_80", "ptx71" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "eight standard-metadata sparse floating inline PTX forms lowered for sm_80 at PTX ISA 7.1", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 34822f024cc535508a1d7ae0c22eb25c61a337e07e674e4c5d0821c85d2e44e0.", + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -184408,15 +184528,15 @@ "sm_80", "ptx71" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "PTX for the eight standard-metadata sparse floating MMA forms assembled for sm_80", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 c0cad4768d71256792c04fdf7e962f3630275a62a909d6ecd15a67a1aacb7765.", - "artifact_kind": null, + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", + "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" } ] }, @@ -184440,18 +184560,18 @@ "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", "build_id_prefix": "2330c0", - "status": "validated", + "status": "executed", "stages": [ { "targets": [ "compute_80", "ptx93" ], - "representation": "convergent sparse m16n8k32 unsigned INT8 inline PTX with selector immediates 0 and 1", + "representation": "eight convergent side-effecting standard-metadata sparse floating inline PTX calls", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -184462,34 +184582,64 @@ "sm_80", "ptx93" ], - "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "representation": "PTX containing all eight standard sparse floating MMA forms", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "libNVVM output for all eight standard sparse floating MMA forms linked to one sm_80 cubin", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", "tool_version": "V13.3.33", "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + }, + { + "targets": [ + "sm_120", + "ptx93" + ], + "representation": "all eight standard sparse floating MMA APIs, every legal selector, checked on all 32 lanes against a host GEMM", + "stage": "runtime", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null } ] } ], "sparse_mma": { "shape": "m16n8k32", - "accumulator": "s32", - "a_element": "u8", - "b_element": "u8", + "accumulator": "f16", + "a_element": "f16", + "b_element": "f16", "a_layout": "row", "b_layout": "col", - "overflow": "wrapping", + "overflow": "not_applicable", "metadata": "standard", "selector": "immediate_zero_or_one", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", - "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", - "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "adapter": "c2_u32_a4_u32_b4_u32_metadata_u32_selector_u32_to_d2_u32", + "llvm_adapter": "a4_v2_f16_b4_v2_f16_c2_v2_f16_metadata_i32_selector_i32_to_d2_v2_f16", "compatibility_source": "generated_stub", - "runtime_validation": "unexecuted" + "runtime_validation": "executed" }, "lowering": "generated_sparse_mma", "expected_ptx": { @@ -184501,27 +184651,27 @@ "m16n8k32", "row", "col", - "s32", - "u8", - "u8", - "s32" + "f16", + "f16", + "f16", + "f16" ], "operands": [ { "kind": "register_list", - "length": 4 + "length": 2 }, { "kind": "register_list", - "length": 2 + "length": 4 }, { "kind": "register_list", - "length": 2 + "length": 4 }, { "kind": "register_list", - "length": 4 + "length": 2 }, { "kind": "register" @@ -184531,20 +184681,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse unsigned A and unsigned B INT8 fragments and adds a wrapping s32 accumulator." + "summary": "Multiplies warp-distributed sparse f16 A and B fragments and adds a packed f16 accumulator." }, { - "id": "mma_sp_m16n8k32_s32_u8_s8", - "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.u8.s8.s32.wrapping.standard_metadata", + "id": "mma_sp_m16n8k32_f32_bf16", + "operation_key": "matrix.mma.sp.m16n8k32.row.col.f32.bf16.bf16.f32.not_applicable.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_u8_s8" + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_bf16" }, "selections": [ { - "source_record": "anonymous_19444", - "asm": "mma.sp.sync.aligned.m16n8k32.row.col.s32.u8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19322", + "asm": "mma.sp.sync.aligned.m16n8k32.row.col.f32.bf16.bf16.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -184552,34 +184702,38 @@ } ], "rust": { - "abi_id": "i0166", + "abi_id": "i1044", "module": "matrix", - "name": "mma_sp_m16n8k32_s32_u8_s8", + "name": "mma_sp_m16n8k32_f32_bf16", "arguments": [ - "[i32; 4]", - "[u32; 2]", - "[u32; 2]", + "[f32; 4]", + "[u32; 4]", + "[u32; 4]", "u32", "u32" ], - "result": "[i32; 4]", + "result": "[f32; 4]", "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0166", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_u8_s8", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1044", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_f32_bf16", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k32_s32_u8_s8" + "cuda_device::wmma::mma_sp_m16n8k32_f32_bf16" ] }, "dialect": { "op_type": "SparseMmaOp", "op_name": "nvvm.sparse_mma", "operands": [ - "i32", - "i32", - "i32", - "i32", + "f32", + "f32", + "f32", + "f32", + "u32", + "u32", + "u32", + "u32", "u32", "u32", "u32", @@ -184588,14 +184742,14 @@ "u32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.u8.s8", + "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.bf16", "arguments": [ "i32", "i32", @@ -184605,20 +184759,24 @@ "i32", "i32", "i32", + "f32", + "f32", + "f32", + "f32", "i32", "i32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ], "properties": [ - "ImmArg", + "ImmArg", "IntrNoCallback", "IntrNoMem", - "Range" + "Range" ], "result_facts": { "no_undef": false, @@ -184642,7 +184800,7 @@ } ] }, - "ptx_result": "[i32; 4]", + "ptx_result": "[f32; 4]", "targets": "all", "ptx_isa_version": "9.3", "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", @@ -184685,11 +184843,11 @@ "sm_80", "ptx71" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "eight standard-metadata sparse floating inline PTX forms lowered for sm_80 at PTX ISA 7.1", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 1dc739b2f8f0bc7f5d2a744a638f9f9e93a9c9763584bdc4ef239e3b740a7900.", + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -184700,15 +184858,15 @@ "sm_80", "ptx71" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "PTX for the eight standard-metadata sparse floating MMA forms assembled for sm_80", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 11793a16a1edc4a91afc40987b925e8829ac10289034931cf23a5dd19c54ff17.", - "artifact_kind": null, + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", + "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" } ] }, @@ -184732,18 +184890,18 @@ "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", "build_id_prefix": "2330c0", - "status": "validated", + "status": "executed", "stages": [ { "targets": [ "compute_80", "ptx93" ], - "representation": "convergent sparse m16n8k32 mixed-sign INT8 inline PTX with selector immediates 0 and 1", + "representation": "eight convergent side-effecting standard-metadata sparse floating inline PTX calls", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -184754,34 +184912,64 @@ "sm_80", "ptx93" ], - "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "representation": "PTX containing all eight standard sparse floating MMA forms", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "libNVVM output for all eight standard sparse floating MMA forms linked to one sm_80 cubin", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", "tool_version": "V13.3.33", "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + }, + { + "targets": [ + "sm_120", + "ptx93" + ], + "representation": "all eight standard sparse floating MMA APIs, every legal selector, checked on all 32 lanes against a host GEMM", + "stage": "runtime", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null } ] } ], "sparse_mma": { "shape": "m16n8k32", - "accumulator": "s32", - "a_element": "u8", - "b_element": "s8", + "accumulator": "f32", + "a_element": "bf16", + "b_element": "bf16", "a_layout": "row", "b_layout": "col", - "overflow": "wrapping", + "overflow": "not_applicable", "metadata": "standard", "selector": "immediate_zero_or_one", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", - "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", - "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "adapter": "c4_f32_a4_u32_b4_u32_metadata_u32_selector_u32_to_d4_f32", + "llvm_adapter": "a4_i32_b4_i32_c4_f32_metadata_i32_selector_i32_to_d4_f32", "compatibility_source": "generated_stub", - "runtime_validation": "unexecuted" + "runtime_validation": "executed" }, "lowering": "generated_sparse_mma", "expected_ptx": { @@ -184793,10 +184981,10 @@ "m16n8k32", "row", "col", - "s32", - "u8", - "s8", - "s32" + "f32", + "bf16", + "bf16", + "f32" ], "operands": [ { @@ -184805,11 +184993,11 @@ }, { "kind": "register_list", - "length": 2 + "length": 4 }, { "kind": "register_list", - "length": 2 + "length": 4 }, { "kind": "register_list", @@ -184823,20 +185011,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse unsigned A and signed B INT8 fragments and adds a wrapping s32 accumulator." + "summary": "Multiplies warp-distributed sparse bf16 A and B fragments and adds a f32 accumulator." }, { - "id": "mma_sp_m16n8k32_s32_u8_s8_satfinite", - "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.u8.s8.s32.satfinite.standard_metadata", + "id": "mma_sp_m16n8k32_f32_f16", + "operation_key": "matrix.mma.sp.m16n8k32.row.col.f32.f16.f16.f32.not_applicable.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_satfinite_u8_s8" + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_f32_f32" }, "selections": [ { - "source_record": "anonymous_19501", - "asm": "mma.sp.sync.aligned.m16n8k32.row.col.satfinite.s32.u8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19360", + "asm": "mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -184844,34 +185032,38 @@ } ], "rust": { - "abi_id": "i0170", + "abi_id": "i1046", "module": "matrix", - "name": "mma_sp_m16n8k32_s32_u8_s8_satfinite", + "name": "mma_sp_m16n8k32_f32_f16", "arguments": [ - "[i32; 4]", - "[u32; 2]", - "[u32; 2]", + "[f32; 4]", + "[u32; 4]", + "[u32; 4]", "u32", "u32" ], - "result": "[i32; 4]", + "result": "[f32; 4]", "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0170", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_u8_s8_satfinite", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1046", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_f32_f16", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k32_s32_u8_s8_satfinite" + "cuda_device::wmma::mma_sp_m16n8k32_f32_f16" ] }, "dialect": { "op_type": "SparseMmaOp", "op_name": "nvvm.sparse_mma", "operands": [ - "i32", - "i32", - "i32", - "i32", + "f32", + "f32", + "f32", + "f32", + "u32", + "u32", + "u32", + "u32", "u32", "u32", "u32", @@ -184880,37 +185072,2117 @@ "u32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.satfinite.u8.s8", + "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.f32.f32", "arguments": [ - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "f32", + "f32", + "f32", + "f32", "i32", "i32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ], "properties": [ - "ImmArg", + "ImmArg", "IntrNoCallback", "IntrNoMem", - "Range" + "Range" + ], + "result_facts": { + "no_undef": false, + "range": null + } + }, + "semantics": { + "pure": false, + "memory": "none", + "convergent": true, + "execution_scope": "warp" + }, + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + }, + "ptx_result": "[f32; 4]", + "targets": "all", + "ptx_isa_version": "9.3", + "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", + "ptx_isa_url": "https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp" + }, + "backend": { + "profile": "rust-llvm-23.1.3-aab11ee0", + "version": "LLVM version 23.1.3-rust-1.101.0-nightly", + "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", + "status": "validated", + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_80", + "ptx_feature": "+ptx71" + }, + "backend_lowerings": [ + { + "backend": "llvm_nvptx", + "mechanism": "inline_ptx", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + } + }, + "version": "LLVM version 23.1.3-rust-1.101.0-nightly", + "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", + "artifact_path": null, + "build_id_prefix": null, + "status": "validated", + "stages": [ + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "eight standard-metadata sparse floating inline PTX forms lowered for sm_80 at PTX ISA 7.1", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "PTX for the eight standard-metadata sparse floating MMA forms assembled for sm_80", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + } + ] + }, + { + "backend": "lib_nvvm", + "mechanism": "inline_ptx", + "evidence_profile": "cuda-13.3-libnvvm-13.3.33", + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + } + }, + "version": "CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33", + "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", + "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", + "build_id_prefix": "2330c0", + "status": "executed", + "stages": [ + { + "targets": [ + "compute_80", + "ptx93" + ], + "representation": "eight convergent side-effecting standard-metadata sparse floating inline PTX calls", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "PTX containing all eight standard sparse floating MMA forms", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "libNVVM output for all eight standard sparse floating MMA forms linked to one sm_80 cubin", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", + "tool_version": "V13.3.33", + "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + }, + { + "targets": [ + "sm_120", + "ptx93" + ], + "representation": "all eight standard sparse floating MMA APIs, every legal selector, checked on all 32 lanes against a host GEMM", + "stage": "runtime", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + } + ] + } + ], + "sparse_mma": { + "shape": "m16n8k32", + "accumulator": "f32", + "a_element": "f16", + "b_element": "f16", + "a_layout": "row", + "b_layout": "col", + "overflow": "not_applicable", + "metadata": "standard", + "selector": "immediate_zero_or_one", + "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", + "adapter": "c4_f32_a4_u32_b4_u32_metadata_u32_selector_u32_to_d4_f32", + "llvm_adapter": "a4_v2_f16_b4_v2_f16_c4_f32_metadata_i32_selector_i32_to_d4_f32", + "compatibility_source": "generated_stub", + "runtime_validation": "executed" + }, + "lowering": "generated_sparse_mma", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "f32", + "f16", + "f16", + "f32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "summary": "Multiplies warp-distributed sparse f16 A and B fragments and adds a f32 accumulator." + }, + { + "id": "mma_sp_m16n8k32_s32_s8", + "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.s8.s8.s32.wrapping.standard_metadata", + "family": "sparse_mma", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_s8" + }, + "selections": [ + { + "source_record": "anonymous_19434", + "asm": "mma.sp.sync.aligned.m16n8k32.row.col.s32.s8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "predicates": [ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ] + } + ], + "rust": { + "abi_id": "i0163", + "module": "matrix", + "name": "mma_sp_m16n8k32_s32_s8", + "arguments": [ + "[i32; 4]", + "[u32; 2]", + "[u32; 2]", + "u32", + "u32" + ], + "result": "[i32; 4]", + "safe": false, + "must_use": true, + "safe_allowlist_reason": null, + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0163", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8", + "compatibility_paths": [ + "cuda_device::wmma::mma_sp_m16n8k32_s32_s8" + ] + }, + "dialect": { + "op_type": "SparseMmaOp", + "op_name": "nvvm.sparse_mma", + "operands": [ + "i32", + "i32", + "i32", + "i32", + "u32", + "u32", + "u32", + "u32", + "u32", + "u32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ] + }, + "llvm": { + "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.s8", + "arguments": [ + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ], + "properties": [ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ], + "result_facts": { + "no_undef": false, + "range": null + } + }, + "semantics": { + "pure": false, + "memory": "none", + "convergent": true, + "execution_scope": "warp" + }, + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + }, + "ptx_result": "[i32; 4]", + "targets": "all", + "ptx_isa_version": "9.3", + "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", + "ptx_isa_url": "https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp" + }, + "backend": { + "profile": "rust-llvm-23.1.3-aab11ee0", + "version": "LLVM version 23.1.3-rust-1.101.0-nightly", + "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", + "status": "validated", + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_80", + "ptx_feature": "+ptx71" + }, + "backend_lowerings": [ + { + "backend": "llvm_nvptx", + "mechanism": "inline_ptx", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + } + }, + "version": "LLVM version 23.1.3-rust-1.101.0-nightly", + "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", + "artifact_path": null, + "build_id_prefix": null, + "status": "validated", + "stages": [ + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "separate probes for the recorded lowering mechanism", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 6117422b739d9c39ae85c36a064b6ba0cfe6242cbd6c19fffe7ff68365e00a79.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "separate PTX outputs assembled for the recorded target", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 a84718234f047484ec8d86c72e2a333a2982ea25b4266f109070266baa49c715.", + "artifact_kind": null, + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", + "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + } + ] + }, + { + "backend": "lib_nvvm", + "mechanism": "inline_ptx", + "evidence_profile": "cuda-13.3-libnvvm-13.3.33", + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + } + }, + "version": "CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33", + "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", + "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", + "build_id_prefix": "2330c0", + "status": "validated", + "stages": [ + { + "targets": [ + "compute_80", + "ptx93" + ], + "representation": "convergent sparse m16n8k32 signed INT8 inline PTX with selector immediates 0 and 1", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", + "tool_version": "V13.3.33", + "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + } + ] + } + ], + "sparse_mma": { + "shape": "m16n8k32", + "accumulator": "s32", + "a_element": "s8", + "b_element": "s8", + "a_layout": "row", + "b_layout": "col", + "overflow": "wrapping", + "metadata": "standard", + "selector": "immediate_zero_or_one", + "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", + "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", + "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "compatibility_source": "generated_stub", + "runtime_validation": "unexecuted" + }, + "lowering": "generated_sparse_mma", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "s32", + "s8", + "s8", + "s32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "summary": "Multiplies warp-distributed sparse signed A and signed B INT8 fragments and adds a wrapping s32 accumulator." + }, + { + "id": "mma_sp_m16n8k32_s32_s8_satfinite", + "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.s8.s8.s32.satfinite.standard_metadata", + "family": "sparse_mma", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_satfinite_s8" + }, + "selections": [ + { + "source_record": "anonymous_19495", + "asm": "mma.sp.sync.aligned.m16n8k32.row.col.satfinite.s32.s8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "predicates": [ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ] + } + ], + "rust": { + "abi_id": "i0167", + "module": "matrix", + "name": "mma_sp_m16n8k32_s32_s8_satfinite", + "arguments": [ + "[i32; 4]", + "[u32; 2]", + "[u32; 2]", + "u32", + "u32" + ], + "result": "[i32; 4]", + "safe": false, + "must_use": true, + "safe_allowlist_reason": null, + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0167", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8_satfinite", + "compatibility_paths": [ + "cuda_device::wmma::mma_sp_m16n8k32_s32_s8_satfinite" + ] + }, + "dialect": { + "op_type": "SparseMmaOp", + "op_name": "nvvm.sparse_mma", + "operands": [ + "i32", + "i32", + "i32", + "i32", + "u32", + "u32", + "u32", + "u32", + "u32", + "u32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ] + }, + "llvm": { + "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.satfinite.s8", + "arguments": [ + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ], + "properties": [ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ], + "result_facts": { + "no_undef": false, + "range": null + } + }, + "semantics": { + "pure": false, + "memory": "none", + "convergent": true, + "execution_scope": "warp" + }, + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + }, + "ptx_result": "[i32; 4]", + "targets": "all", + "ptx_isa_version": "9.3", + "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", + "ptx_isa_url": "https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp" + }, + "backend": { + "profile": "rust-llvm-23.1.3-aab11ee0", + "version": "LLVM version 23.1.3-rust-1.101.0-nightly", + "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", + "status": "validated", + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_80", + "ptx_feature": "+ptx71" + }, + "backend_lowerings": [ + { + "backend": "llvm_nvptx", + "mechanism": "inline_ptx", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + } + }, + "version": "LLVM version 23.1.3-rust-1.101.0-nightly", + "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", + "artifact_path": null, + "build_id_prefix": null, + "status": "validated", + "stages": [ + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "separate probes for the recorded lowering mechanism", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3c5d9bb6256f7009234918046b2dfb11507265c220722e1a42aa20653a409aec.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "separate PTX outputs assembled for the recorded target", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9c0a5d19a7e1637ff335da9a214e99e06463d5160df778e1bad3dfcfc6874890.", + "artifact_kind": null, + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", + "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + } + ] + }, + { + "backend": "lib_nvvm", + "mechanism": "inline_ptx", + "evidence_profile": "cuda-13.3-libnvvm-13.3.33", + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + } + }, + "version": "CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33", + "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", + "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", + "build_id_prefix": "2330c0", + "status": "validated", + "stages": [ + { + "targets": [ + "compute_80", + "ptx93" + ], + "representation": "convergent sparse m16n8k32 signed saturating INT8 inline PTX with selector immediates 0 and 1", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", + "tool_version": "V13.3.33", + "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + } + ] + } + ], + "sparse_mma": { + "shape": "m16n8k32", + "accumulator": "s32", + "a_element": "s8", + "b_element": "s8", + "a_layout": "row", + "b_layout": "col", + "overflow": "satfinite", + "metadata": "standard", + "selector": "immediate_zero_or_one", + "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", + "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", + "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "compatibility_source": "generated_stub", + "runtime_validation": "unexecuted" + }, + "lowering": "generated_sparse_mma", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "satfinite", + "s32", + "s8", + "s8", + "s32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "summary": "Multiplies warp-distributed sparse signed A and signed B INT8 fragments and adds a saturating s32 accumulator." + }, + { + "id": "mma_sp_m16n8k32_s32_s8_u8", + "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.s8.u8.s32.wrapping.standard_metadata", + "family": "sparse_mma", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_s8_u8" + }, + "selections": [ + { + "source_record": "anonymous_19439", + "asm": "mma.sp.sync.aligned.m16n8k32.row.col.s32.s8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "predicates": [ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ] + } + ], + "rust": { + "abi_id": "i0164", + "module": "matrix", + "name": "mma_sp_m16n8k32_s32_s8_u8", + "arguments": [ + "[i32; 4]", + "[u32; 2]", + "[u32; 2]", + "u32", + "u32" + ], + "result": "[i32; 4]", + "safe": false, + "must_use": true, + "safe_allowlist_reason": null, + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0164", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8_u8", + "compatibility_paths": [ + "cuda_device::wmma::mma_sp_m16n8k32_s32_s8_u8" + ] + }, + "dialect": { + "op_type": "SparseMmaOp", + "op_name": "nvvm.sparse_mma", + "operands": [ + "i32", + "i32", + "i32", + "i32", + "u32", + "u32", + "u32", + "u32", + "u32", + "u32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ] + }, + "llvm": { + "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.s8.u8", + "arguments": [ + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ], + "properties": [ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ], + "result_facts": { + "no_undef": false, + "range": null + } + }, + "semantics": { + "pure": false, + "memory": "none", + "convergent": true, + "execution_scope": "warp" + }, + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + }, + "ptx_result": "[i32; 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LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 32f1c01ee1a43ca81812d076ee8db48b8928aa441daf3f71dfc025f6b50a516a.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "separate PTX outputs assembled for the recorded target", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 875de648ec423e0f311608024d48bd81ae45ae442c9741a8f08c01502f863e9b.", + "artifact_kind": null, + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", + "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + } + ] + }, + { + "backend": "lib_nvvm", + "mechanism": "inline_ptx", + "evidence_profile": "cuda-13.3-libnvvm-13.3.33", + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + } + }, + "version": "CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33", + "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", + "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", + "build_id_prefix": "2330c0", + "status": "validated", + "stages": [ + { + "targets": [ + "compute_80", + "ptx93" + ], + "representation": "convergent sparse m16n8k32 mixed-sign INT8 inline PTX with selector immediates 0 and 1", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", + "tool_version": "V13.3.33", + "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + } + ] + } + ], + "sparse_mma": { + "shape": "m16n8k32", + "accumulator": "s32", + "a_element": "s8", + "b_element": "u8", + "a_layout": "row", + "b_layout": "col", + "overflow": "wrapping", + "metadata": "standard", + "selector": "immediate_zero_or_one", + "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", + "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", + "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "compatibility_source": "generated_stub", + "runtime_validation": "unexecuted" + }, + "lowering": "generated_sparse_mma", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "s32", + "s8", + "u8", + "s32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "summary": "Multiplies warp-distributed sparse signed A and unsigned B INT8 fragments and adds a wrapping s32 accumulator." + }, + { + "id": "mma_sp_m16n8k32_s32_s8_u8_satfinite", + "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.s8.u8.s32.satfinite.standard_metadata", + "family": "sparse_mma", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_satfinite_s8_u8" + }, + "selections": [ + { + "source_record": "anonymous_19498", + "asm": "mma.sp.sync.aligned.m16n8k32.row.col.satfinite.s32.s8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "predicates": [ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ] + } + ], + "rust": { + "abi_id": "i0168", + "module": "matrix", + "name": "mma_sp_m16n8k32_s32_s8_u8_satfinite", + "arguments": [ + "[i32; 4]", + "[u32; 2]", + "[u32; 2]", + "u32", + "u32" + ], + "result": "[i32; 4]", + "safe": false, + "must_use": true, + "safe_allowlist_reason": null, + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0168", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8_u8_satfinite", + "compatibility_paths": [ + "cuda_device::wmma::mma_sp_m16n8k32_s32_s8_u8_satfinite" + ] + }, + "dialect": { + "op_type": "SparseMmaOp", + "op_name": "nvvm.sparse_mma", + "operands": [ + "i32", + "i32", + "i32", + "i32", + "u32", + "u32", + "u32", + "u32", + "u32", + "u32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ] + }, + "llvm": { + "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.satfinite.s8.u8", + "arguments": [ + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ], + "properties": [ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ], + "result_facts": { + "no_undef": false, + "range": null + } + }, + "semantics": { + "pure": false, + "memory": "none", + "convergent": true, + "execution_scope": "warp" + }, + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + }, + "ptx_result": "[i32; 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LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 b79bb4f92abfb0ce7a3b13baed56134e8043e73d4552d305d42f8f2d97661bfd.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "separate PTX outputs assembled for the recorded target", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 adbd36486601138ffe021f493473ae535351c523380e780a11678e1a4da0e4e7.", + "artifact_kind": null, + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", + "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + } + ] + }, + { + "backend": "lib_nvvm", + "mechanism": "inline_ptx", + "evidence_profile": "cuda-13.3-libnvvm-13.3.33", + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + } + }, + "version": "CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33", + "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", + "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", + "build_id_prefix": "2330c0", + "status": "validated", + "stages": [ + { + "targets": [ + "compute_80", + "ptx93" + ], + "representation": "convergent sparse m16n8k32 mixed-sign saturating INT8 inline PTX with selector immediates 0 and 1", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", + "tool_version": "V13.3.33", + "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + } + ] + } + ], + "sparse_mma": { + "shape": "m16n8k32", + "accumulator": "s32", + "a_element": "s8", + "b_element": "u8", + "a_layout": "row", + "b_layout": "col", + "overflow": "satfinite", + "metadata": "standard", + "selector": "immediate_zero_or_one", + "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", + "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", + "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "compatibility_source": "generated_stub", + "runtime_validation": "unexecuted" + }, + "lowering": "generated_sparse_mma", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "satfinite", + "s32", + "s8", + "u8", + "s32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "summary": "Multiplies warp-distributed sparse signed A and unsigned B INT8 fragments and adds a saturating s32 accumulator." + }, + { + "id": "mma_sp_m16n8k32_s32_u8", + "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.u8.u8.s32.wrapping.standard_metadata", + "family": "sparse_mma", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_u8" + }, + "selections": [ + { + "source_record": "anonymous_19448", + "asm": "mma.sp.sync.aligned.m16n8k32.row.col.s32.u8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "predicates": [ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ] + } + ], + "rust": { + "abi_id": "i0165", + "module": "matrix", + "name": "mma_sp_m16n8k32_s32_u8", + "arguments": [ + "[i32; 4]", + "[u32; 2]", + "[u32; 2]", + "u32", + "u32" + ], + "result": "[i32; 4]", + "safe": false, + "must_use": true, + "safe_allowlist_reason": null, + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0165", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_u8", + "compatibility_paths": [ + "cuda_device::wmma::mma_sp_m16n8k32_s32_u8" + ] + }, + "dialect": { + "op_type": "SparseMmaOp", + "op_name": "nvvm.sparse_mma", + "operands": [ + "i32", + "i32", + "i32", + "i32", + "u32", + "u32", + "u32", + "u32", + "u32", + "u32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ] + }, + "llvm": { + "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.u8", + "arguments": [ + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ], + "properties": [ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ], + "result_facts": { + "no_undef": false, + "range": null + } + }, + "semantics": { + "pure": false, + "memory": "none", + "convergent": true, + "execution_scope": "warp" + }, + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + }, + "ptx_result": "[i32; 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LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 34822f024cc535508a1d7ae0c22eb25c61a337e07e674e4c5d0821c85d2e44e0.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "separate PTX outputs assembled for the recorded target", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 c0cad4768d71256792c04fdf7e962f3630275a62a909d6ecd15a67a1aacb7765.", + "artifact_kind": null, + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", + "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + } + ] + }, + { + "backend": "lib_nvvm", + "mechanism": "inline_ptx", + "evidence_profile": "cuda-13.3-libnvvm-13.3.33", + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + } + }, + "version": "CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33", + "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", + "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", + "build_id_prefix": "2330c0", + "status": "validated", + "stages": [ + { + "targets": [ + "compute_80", + "ptx93" + ], + "representation": "convergent sparse m16n8k32 unsigned INT8 inline PTX with selector immediates 0 and 1", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", + "tool_version": "V13.3.33", + "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + } + ] + } + ], + "sparse_mma": { + "shape": "m16n8k32", + "accumulator": "s32", + "a_element": "u8", + "b_element": "u8", + "a_layout": "row", + "b_layout": "col", + "overflow": "wrapping", + "metadata": "standard", + "selector": "immediate_zero_or_one", + "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", + "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", + "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "compatibility_source": "generated_stub", + "runtime_validation": "unexecuted" + }, + "lowering": "generated_sparse_mma", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "s32", + "u8", + "u8", + "s32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "summary": "Multiplies warp-distributed sparse unsigned A and unsigned B INT8 fragments and adds a wrapping s32 accumulator." + }, + { + "id": "mma_sp_m16n8k32_s32_u8_s8", + "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.u8.s8.s32.wrapping.standard_metadata", + "family": "sparse_mma", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_u8_s8" + }, + "selections": [ + { + "source_record": "anonymous_19444", + "asm": "mma.sp.sync.aligned.m16n8k32.row.col.s32.u8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "predicates": [ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ] + } + ], + "rust": { + "abi_id": "i0166", + "module": "matrix", + "name": "mma_sp_m16n8k32_s32_u8_s8", + "arguments": [ + "[i32; 4]", + "[u32; 2]", + "[u32; 2]", + "u32", + "u32" + ], + "result": "[i32; 4]", + "safe": false, + "must_use": true, + "safe_allowlist_reason": null, + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0166", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_u8_s8", + "compatibility_paths": [ + "cuda_device::wmma::mma_sp_m16n8k32_s32_u8_s8" + ] + }, + "dialect": { + "op_type": "SparseMmaOp", + "op_name": "nvvm.sparse_mma", + "operands": [ + "i32", + "i32", + "i32", + "i32", + "u32", + "u32", + "u32", + "u32", + "u32", + "u32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ] + }, + "llvm": { + "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.u8.s8", + "arguments": [ + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ], + "properties": [ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ], + "result_facts": { + "no_undef": false, + "range": null + } + }, + "semantics": { + "pure": false, + "memory": "none", + "convergent": true, + "execution_scope": "warp" + }, + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + }, + "ptx_result": "[i32; 4]", + "targets": "all", + "ptx_isa_version": "9.3", + "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", + "ptx_isa_url": "https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp" + }, + "backend": { + "profile": "rust-llvm-23.1.3-aab11ee0", + "version": "LLVM version 23.1.3-rust-1.101.0-nightly", + "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", + "status": "validated", + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_80", + "ptx_feature": "+ptx71" + }, + "backend_lowerings": [ + { + "backend": "llvm_nvptx", + "mechanism": "inline_ptx", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + } + }, + "version": "LLVM version 23.1.3-rust-1.101.0-nightly", + "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", + "artifact_path": null, + "build_id_prefix": null, + "status": "validated", + "stages": [ + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "separate probes for the recorded lowering mechanism", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 1dc739b2f8f0bc7f5d2a744a638f9f9e93a9c9763584bdc4ef239e3b740a7900.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "separate PTX outputs assembled for the recorded target", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 11793a16a1edc4a91afc40987b925e8829ac10289034931cf23a5dd19c54ff17.", + "artifact_kind": null, + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", + "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + } + ] + }, + { + "backend": "lib_nvvm", + "mechanism": "inline_ptx", + "evidence_profile": "cuda-13.3-libnvvm-13.3.33", + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + } + }, + "version": "CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33", + "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", + "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", + "build_id_prefix": "2330c0", + "status": "validated", + "stages": [ + { + "targets": [ + "compute_80", + "ptx93" + ], + "representation": "convergent sparse m16n8k32 mixed-sign INT8 inline PTX with selector immediates 0 and 1", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", + "tool_version": "V13.3.33", + "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + } + ] + } + ], + "sparse_mma": { + "shape": "m16n8k32", + "accumulator": "s32", + "a_element": "u8", + "b_element": "s8", + "a_layout": "row", + "b_layout": "col", + "overflow": "wrapping", + "metadata": "standard", + "selector": "immediate_zero_or_one", + "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", + "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", + "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "compatibility_source": "generated_stub", + "runtime_validation": "unexecuted" + }, + "lowering": "generated_sparse_mma", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "s32", + "u8", + "s8", + "s32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "summary": "Multiplies warp-distributed sparse unsigned A and signed B INT8 fragments and adds a wrapping s32 accumulator." + }, + { + "id": "mma_sp_m16n8k32_s32_u8_s8_satfinite", + "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.u8.s8.s32.satfinite.standard_metadata", + "family": "sparse_mma", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_satfinite_u8_s8" + }, + "selections": [ + { + "source_record": "anonymous_19501", + "asm": "mma.sp.sync.aligned.m16n8k32.row.col.satfinite.s32.u8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "predicates": [ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ] + } + ], + "rust": { + "abi_id": "i0170", + "module": "matrix", + "name": "mma_sp_m16n8k32_s32_u8_s8_satfinite", + "arguments": [ + "[i32; 4]", + "[u32; 2]", + "[u32; 2]", + "u32", + "u32" + ], + "result": "[i32; 4]", + "safe": false, + "must_use": true, + "safe_allowlist_reason": null, + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0170", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_u8_s8_satfinite", + "compatibility_paths": [ + "cuda_device::wmma::mma_sp_m16n8k32_s32_u8_s8_satfinite" + ] + }, + "dialect": { + "op_type": "SparseMmaOp", + "op_name": "nvvm.sparse_mma", + "operands": [ + "i32", + "i32", + "i32", + "i32", + "u32", + "u32", + "u32", + "u32", + "u32", + "u32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ] + }, + "llvm": { + "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.satfinite.u8.s8", + "arguments": [ + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ], + "properties": [ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" ], "result_facts": { "no_undef": false, @@ -185116,55 +187388,354 @@ } ] }, - "summary": "Multiplies warp-distributed sparse unsigned A and signed B INT8 fragments and adds a saturating s32 accumulator." + "summary": "Multiplies warp-distributed sparse unsigned A and signed B INT8 fragments and adds a saturating s32 accumulator." + }, + { + "id": "mma_sp_m16n8k32_s32_u8_satfinite", + "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.u8.u8.s32.satfinite.standard_metadata", + "family": "sparse_mma", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_satfinite_u8" + }, + "selections": [ + { + "source_record": "anonymous_19504", + "asm": "mma.sp.sync.aligned.m16n8k32.row.col.satfinite.s32.u8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "predicates": [ + "Subtarget->getSmVersion() >= 80", + "Subtarget->getPTXVersion() >= 71" + ] + } + ], + "rust": { + "abi_id": "i0169", + "module": "matrix", + "name": "mma_sp_m16n8k32_s32_u8_satfinite", + "arguments": [ + "[i32; 4]", + "[u32; 2]", + "[u32; 2]", + "u32", + "u32" + ], + "result": "[i32; 4]", + "safe": false, + "must_use": true, + "safe_allowlist_reason": null, + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0169", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_u8_satfinite", + "compatibility_paths": [ + "cuda_device::wmma::mma_sp_m16n8k32_s32_u8_satfinite" + ] + }, + "dialect": { + "op_type": "SparseMmaOp", + "op_name": "nvvm.sparse_mma", + "operands": [ + "i32", + "i32", + "i32", + "i32", + "u32", + "u32", + "u32", + "u32", + "u32", + "u32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ] + }, + "llvm": { + "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.satfinite.u8", + "arguments": [ + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32" + ], + "results": [ + "i32", + "i32", + "i32", + "i32" + ], + "properties": [ + "ImmArg", + "IntrNoCallback", + "IntrNoMem", + "Range" + ], + "result_facts": { + "no_undef": false, + "range": null + } + }, + "semantics": { + "pure": false, + "memory": "none", + "convergent": true, + "execution_scope": "warp" + }, + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + }, + "ptx_result": "[i32; 4]", + "targets": "all", + "ptx_isa_version": "9.3", + "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", + "ptx_isa_url": "https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp" + }, + "backend": { + "profile": "rust-llvm-23.1.3-aab11ee0", + "version": "LLVM version 23.1.3-rust-1.101.0-nightly", + "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", + "status": "validated", + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_80", + "ptx_feature": "+ptx71" + }, + "backend_lowerings": [ + { + "backend": "llvm_nvptx", + "mechanism": "inline_ptx", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + } + }, + "version": "LLVM version 23.1.3-rust-1.101.0-nightly", + "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", + "artifact_path": null, + "build_id_prefix": null, + "status": "validated", + "stages": [ + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "separate probes for the recorded lowering mechanism", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 d8c7f3a382ee9d1ea29abdb323d012394df4bf6bce1fa24e8594c78e8bfa65f7.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "separate PTX outputs assembled for the recorded target", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 46586ec2c81c1e15a80b74485e9e14cad94c67af27deead4a2ce433787a814af.", + "artifact_kind": null, + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", + "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + } + ] + }, + { + "backend": "lib_nvvm", + "mechanism": "inline_ptx", + "evidence_profile": "cuda-13.3-libnvvm-13.3.33", + "target": { + "minimum_ptx": "7.1", + "hardware": { + "kind": "any_of", + "alternatives": [ + { + "kind": "minimum_sm", + "sm": 80 + } + ] + } + }, + "version": "CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33", + "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", + "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", + "build_id_prefix": "2330c0", + "status": "validated", + "stages": [ + { + "targets": [ + "compute_80", + "ptx93" + ], + "representation": "convergent sparse m16n8k32 unsigned saturating INT8 inline PTX with selector immediates 0 and 1", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", + "tool_version": "V13.3.33", + "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + } + ] + } + ], + "sparse_mma": { + "shape": "m16n8k32", + "accumulator": "s32", + "a_element": "u8", + "b_element": "u8", + "a_layout": "row", + "b_layout": "col", + "overflow": "satfinite", + "metadata": "standard", + "selector": "immediate_zero_or_one", + "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", + "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", + "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "compatibility_source": "generated_stub", + "runtime_validation": "unexecuted" + }, + "lowering": "generated_sparse_mma", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "satfinite", + "s32", + "u8", + "u8", + "s32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "summary": "Multiplies warp-distributed sparse unsigned A and unsigned B INT8 fragments and adds a saturating s32 accumulator." }, { - "id": "mma_sp_m16n8k32_s32_u8_satfinite", - "operation_key": "matrix.mma.sp.m16n8k32.row.col.s32.u8.u8.s32.satfinite.standard_metadata", + "id": "mma_sp_m16n8k64_f32_e4m3_e4m3_f32", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.f32.e4m3.e4m3.f32.not_applicable.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_satfinite_u8" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_f32_e4m3_e4m3_f32" }, "selections": [ { - "source_record": "anonymous_19504", - "asm": "mma.sp.sync.aligned.m16n8k32.row.col.satfinite.s32.u8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19368", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.f32.e4m3.e4m3.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", - "Subtarget->getPTXVersion() >= 71" + "Subtarget->getPTXVersion() >= 71", + "Subtarget->getSmVersion() >= 89", + "Subtarget->getPTXVersion() >= 84" ] } ], "rust": { - "abi_id": "i0169", + "abi_id": "i1026", "module": "matrix", - "name": "mma_sp_m16n8k32_s32_u8_satfinite", + "name": "mma_sp_m16n8k64_f32_e4m3_e4m3_f32", "arguments": [ - "[i32; 4]", - "[u32; 2]", - "[u32; 2]", + "[f32; 4]", + "[u32; 4]", + "[u32; 4]", "u32", "u32" ], - "result": "[i32; 4]", + "result": "[f32; 4]", "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0169", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_u8_satfinite", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1026", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_f32_e4m3_e4m3_f32", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k32_s32_u8_satfinite" + "cuda_device::wmma::mma_sp_m16n8k64_f32_e4m3_e4m3_f32" ] }, "dialect": { "op_type": "SparseMmaOp", "op_name": "nvvm.sparse_mma", "operands": [ - "i32", - "i32", - "i32", - "i32", + "f32", + "f32", + "f32", + "f32", + "u32", + "u32", + "u32", + "u32", "u32", "u32", "u32", @@ -185173,14 +187744,14 @@ "u32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.satfinite.u8", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.f32.e4m3.e4m3.f32", "arguments": [ "i32", "i32", @@ -185190,20 +187761,24 @@ "i32", "i32", "i32", + "f32", + "f32", + "f32", + "f32", "i32", "i32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ], "properties": [ - "ImmArg", + "ImmArg", "IntrNoCallback", "IntrNoMem", - "Range" + "Range" ], "result_facts": { "no_undef": false, @@ -185217,17 +187792,17 @@ "execution_scope": "warp" }, "target": { - "minimum_ptx": "7.1", + "minimum_ptx": "8.4", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 89 } ] }, - "ptx_result": "[i32; 4]", + "ptx_result": "[f32; 4]", "targets": "all", "ptx_isa_version": "9.3", "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", @@ -185239,8 +187814,8 @@ "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", "status": "validated", "target_triple": "nvptx64-nvidia-cuda", - "gpu_target": "sm_80", - "ptx_feature": "+ptx71" + "gpu_target": "sm_89", + "ptx_feature": "+ptx84" }, "backend_lowerings": [ { @@ -185248,13 +187823,13 @@ "mechanism": "inline_ptx", "evidence_profile": "rust-llvm-23.1.3-aab11ee0", "target": { - "minimum_ptx": "7.1", + "minimum_ptx": "8.4", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 89 } ] } @@ -185267,14 +187842,14 @@ "stages": [ { "targets": [ - "sm_80", - "ptx71" + "sm_89", + "ptx84" ], "representation": "separate probes for the recorded lowering mechanism", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 d8c7f3a382ee9d1ea29abdb323d012394df4bf6bce1fa24e8594c78e8bfa65f7.", + "detail": "Revalidated 4 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 b4291dcecc12bc81abeb0be6aeaced6d49643bef41540dbf09a3351dd88cd047.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -185282,15 +187857,15 @@ }, { "targets": [ - "sm_80", - "ptx71" + "sm_89", + "ptx84" ], "representation": "separate PTX outputs assembled for the recorded target", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 46586ec2c81c1e15a80b74485e9e14cad94c67af27deead4a2ce433787a814af.", - "artifact_kind": null, + "detail": "Revalidated 4 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9112d0e3f69969f98e685af0f6770243c98fd74ebfe159b84dbccb33abff93b4.", + "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" @@ -185300,35 +187875,35 @@ { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33", + "evidence_profile": "cuda-13.3-libnvvm-13.3.73", "target": { - "minimum_ptx": "7.1", + "minimum_ptx": "8.4", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 89 } ] } }, - "version": "CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA toolkit 13.3; nvcc/libNVVM release V13.3.73", + "sha256": "e55af1135e987372355d19d66cb74e1a1e99c32ac98ffad14fb567eef16e4f77", + "artifact_path": "/home/kxqandccx/pr-e2e-20260918/tk/lib/python3.10/site-packages/nvidia/cu13/lib/libnvvm.so.4", + "build_id_prefix": "88b802", "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_89", "ptx93" ], - "representation": "convergent sparse m16n8k32 unsigned saturating INT8 inline PTX with selector immediates 0 and 1", + "representation": "convergent plain-sparsity sparse FP8 F32 inline PTX in public D, A, B, C, metadata, selector order", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The production generated_intrinsics route produced 189,884-byte compute_80 NVVM IR with SHA-256 c09e93484e59f6e1b76a62db146f66164234f6f2fb73842cbad12a14d6cac76c and 54,308-byte LTOIR with SHA-256 d8b822ccfe9e6918437f8fdc6b2bcfe5c1326100cfb135306d1d4df4dd5b01e6.", + "detail": "CUDA 13.3 libNVVM compiled a 4-function NVVM IR module (SHA-256 42a84360a8efa402dae317b5fcb41c95cd857eac174eadf3fc01458b1c513504, requiring the !nvvmir.version 2.0 metadata and an explicit NVPTX data layout) with -arch=compute_89 to 7,193 bytes of PTX (SHA-256 28b1418b52d7911cc7122424e57c4fa0814b51bde354a69d7fa9f1dad3693dac, .version 9.3, .target sm_89) retaining all four requested instructions verbatim, and with -gen-lto to 3,092 bytes of LTOIR (SHA-256 846592e970ecc3f8a8ede212a9c4b5f87586e3629c0ee2b151dab6f62114ab1f). The libNVVM route for compute_89 is accepted: no capability error was raised for any of the four forms.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -185336,35 +187911,50 @@ }, { "targets": [ - "sm_80", + "sm_89", "ptx93" ], - "representation": "isolated base sparse m16n8k32 INT8 MMA floor kernel", + "representation": "libNVVM-emitted plain-sparsity sparse FP8 F32 PTX", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "CUDA 13.3 ptxas assembled the libNVVM PTX at sm_89 into a 1,464-byte cubin (SHA-256 b1f806ccaa8a73aa80b76862b643265a508494c53028348b0f4e730d7a86847a), byte-identical to the cubin the pinned-LLVM route produced from the same four forms.", + "artifact_kind": "cubin", + "tool_path": "/home/kxqandccx/pr-e2e-20260918/cuda-13.3/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + }, + { + "targets": [ + "sm_89", + "ptx93" + ], + "representation": "libNVVM LTOIR retaining the plain-sparsity sparse FP8 F32 matrix", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "nvJitLink produced a 21,480-byte cubin with SHA-256 ba48413405086ccf4aa28fba90fb7e40c0dc6df25af437a981ef80e89a44d3bd; cuobjdump contained all eight raw sparse variants plus both representative compatibility-path calls as IMMA.SP.16832 instructions.", + "detail": "nvJitLink produced a 1,464-byte cubin (SHA-256 18651b809387f94d6074dbdb66590859fac9169a6aab7650569ebd287e8e53b1) from the 3,092-byte LTOIR. The device-link step required the explicit -lto option; without it nvJitLink rejects LTO-IR input with rc=18 \"LTO-IR input cannot be used without LTO enabled (-lto)\".", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", - "tool_version": "V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "/home/kxqandccx/pr-e2e-20260918/tk/lib/python3.10/site-packages/nvidia/cu13/lib/libnvJitLink.so.13", + "tool_version": "Cuda compilation tools, release 13.4, V13.4.92", + "tool_sha256": "3afdb9677477dd584d3712a9bf2978d085729f0ed6e6432027e925d1e312e3c9" } ] } ], "sparse_mma": { - "shape": "m16n8k32", - "accumulator": "s32", - "a_element": "u8", - "b_element": "u8", + "shape": "m16n8k64", + "accumulator": "f32", + "a_element": "e4m3", + "b_element": "e4m3", "a_layout": "row", "b_layout": "col", - "overflow": "satfinite", + "overflow": "not_applicable", "metadata": "standard", - "selector": "immediate_zero_or_one", + "selector": "immediate_zero", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", - "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", - "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "adapter": "c4_f32_a4_u32_b4_u32_metadata_u32_selector_u32_to_d4_f32", + "llvm_adapter": "a4_i32_b4_i32_c4_f32_metadata_i32_selector_i32_to_d4_f32", "compatibility_source": "generated_stub", "runtime_validation": "unexecuted" }, @@ -185375,14 +187965,13 @@ "sp", "sync", "aligned", - "m16n8k32", + "m16n8k64", "row", "col", - "satfinite", - "s32", - "u8", - "u8", - "s32" + "f32", + "e4m3", + "e4m3", + "f32" ], "operands": [ { @@ -185391,11 +187980,11 @@ }, { "kind": "register_list", - "length": 2 + "length": 4 }, { "kind": "register_list", - "length": 2 + "length": 4 }, { "kind": "register_list", @@ -185409,20 +187998,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse unsigned A and unsigned B INT8 fragments and adds a saturating s32 accumulator." + "summary": "Multiplies warp-distributed sparse e4m3 A and e4m3 B fragments and adds an f32 accumulator." }, { - "id": "mma_sp_m16n8k64_f32_e4m3_e4m3_f32", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.f32.e4m3.e4m3.f32.not_applicable.standard_metadata", + "id": "mma_sp_m16n8k64_f32_e4m3_e5m2_f32", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.f32.e4m3.e5m2.f32.not_applicable.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_f32_e4m3_e4m3_f32" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_f32_e4m3_e5m2_f32" }, "selections": [ { - "source_record": "anonymous_19368", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.f32.e4m3.e4m3.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19373", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.f32.e4m3.e5m2.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71", @@ -185432,9 +188021,9 @@ } ], "rust": { - "abi_id": "i1026", + "abi_id": "i1027", "module": "matrix", - "name": "mma_sp_m16n8k64_f32_e4m3_e4m3_f32", + "name": "mma_sp_m16n8k64_f32_e4m3_e5m2_f32", "arguments": [ "[f32; 4]", "[u32; 4]", @@ -185446,10 +188035,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1026", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_f32_e4m3_e4m3_f32", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1027", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_f32_e4m3_e5m2_f32", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_f32_e4m3_e4m3_f32" + "cuda_device::wmma::mma_sp_m16n8k64_f32_e4m3_e5m2_f32" ] }, "dialect": { @@ -185479,7 +188068,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.f32.e4m3.e4m3.f32", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.f32.e4m3.e5m2.f32", "arguments": [ "i32", "i32", @@ -185674,7 +188263,7 @@ "shape": "m16n8k64", "accumulator": "f32", "a_element": "e4m3", - "b_element": "e4m3", + "b_element": "e5m2", "a_layout": "row", "b_layout": "col", "overflow": "not_applicable", @@ -185698,7 +188287,7 @@ "col", "f32", "e4m3", - "e4m3", + "e5m2", "f32" ], "operands": [ @@ -185726,20 +188315,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse e4m3 A and e4m3 B fragments and adds an f32 accumulator." + "summary": "Multiplies warp-distributed sparse e4m3 A and e5m2 B fragments and adds an f32 accumulator." }, { - "id": "mma_sp_m16n8k64_f32_e4m3_e5m2_f32", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.f32.e4m3.e5m2.f32.not_applicable.standard_metadata", + "id": "mma_sp_m16n8k64_f32_e5m2_e4m3_f32", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.f32.e5m2.e4m3.f32.not_applicable.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_f32_e4m3_e5m2_f32" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_f32_e5m2_e4m3_f32" }, "selections": [ { - "source_record": "anonymous_19373", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.f32.e4m3.e5m2.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19378", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.f32.e5m2.e4m3.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71", @@ -185749,9 +188338,9 @@ } ], "rust": { - "abi_id": "i1027", + "abi_id": "i1028", "module": "matrix", - "name": "mma_sp_m16n8k64_f32_e4m3_e5m2_f32", + "name": "mma_sp_m16n8k64_f32_e5m2_e4m3_f32", "arguments": [ "[f32; 4]", "[u32; 4]", @@ -185763,10 +188352,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1027", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_f32_e4m3_e5m2_f32", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1028", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_f32_e5m2_e4m3_f32", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_f32_e4m3_e5m2_f32" + "cuda_device::wmma::mma_sp_m16n8k64_f32_e5m2_e4m3_f32" ] }, "dialect": { @@ -185796,7 +188385,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.f32.e4m3.e5m2.f32", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.f32.e5m2.e4m3.f32", "arguments": [ "i32", "i32", @@ -185990,8 +188579,8 @@ "sparse_mma": { "shape": "m16n8k64", "accumulator": "f32", - "a_element": "e4m3", - "b_element": "e5m2", + "a_element": "e5m2", + "b_element": "e4m3", "a_layout": "row", "b_layout": "col", "overflow": "not_applicable", @@ -186014,8 +188603,8 @@ "row", "col", "f32", - "e4m3", "e5m2", + "e4m3", "f32" ], "operands": [ @@ -186043,20 +188632,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse e4m3 A and e5m2 B fragments and adds an f32 accumulator." + "summary": "Multiplies warp-distributed sparse e5m2 A and e4m3 B fragments and adds an f32 accumulator." }, { - "id": "mma_sp_m16n8k64_f32_e5m2_e4m3_f32", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.f32.e5m2.e4m3.f32.not_applicable.standard_metadata", + "id": "mma_sp_m16n8k64_f32_e5m2_e5m2_f32", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.f32.e5m2.e5m2.f32.not_applicable.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_f32_e5m2_e4m3_f32" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_f32_e5m2_e5m2_f32" }, "selections": [ { - "source_record": "anonymous_19378", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.f32.e5m2.e4m3.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19382", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.f32.e5m2.e5m2.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71", @@ -186066,9 +188655,9 @@ } ], "rust": { - "abi_id": "i1028", + "abi_id": "i1029", "module": "matrix", - "name": "mma_sp_m16n8k64_f32_e5m2_e4m3_f32", + "name": "mma_sp_m16n8k64_f32_e5m2_e5m2_f32", "arguments": [ "[f32; 4]", "[u32; 4]", @@ -186080,10 +188669,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1028", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_f32_e5m2_e4m3_f32", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1029", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_f32_e5m2_e5m2_f32", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_f32_e5m2_e4m3_f32" + "cuda_device::wmma::mma_sp_m16n8k64_f32_e5m2_e5m2_f32" ] }, "dialect": { @@ -186113,7 +188702,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.f32.e5m2.e4m3.f32", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.f32.e5m2.e5m2.f32", "arguments": [ "i32", "i32", @@ -186308,7 +188897,7 @@ "shape": "m16n8k64", "accumulator": "f32", "a_element": "e5m2", - "b_element": "e4m3", + "b_element": "e5m2", "a_layout": "row", "b_layout": "col", "overflow": "not_applicable", @@ -186332,7 +188921,7 @@ "col", "f32", "e5m2", - "e4m3", + "e5m2", "f32" ], "operands": [ @@ -186360,61 +188949,55 @@ } ] }, - "summary": "Multiplies warp-distributed sparse e5m2 A and e4m3 B fragments and adds an f32 accumulator." + "summary": "Multiplies warp-distributed sparse e5m2 A and e5m2 B fragments and adds an f32 accumulator." }, { - "id": "mma_sp_m16n8k64_f32_e5m2_e5m2_f32", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.f32.e5m2.e5m2.f32.not_applicable.standard_metadata", + "id": "mma_sp_m16n8k64_s32_s4", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s4.s4.s32.wrapping.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_f32_e5m2_e5m2_f32" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_s4" }, "selections": [ { - "source_record": "anonymous_19382", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.f32.e5m2.e5m2.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19390", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.s4.s4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", - "Subtarget->getPTXVersion() >= 71", - "Subtarget->getSmVersion() >= 89", - "Subtarget->getPTXVersion() >= 84" + "Subtarget->getPTXVersion() >= 71" ] } ], "rust": { - "abi_id": "i1029", + "abi_id": "i0211", "module": "matrix", - "name": "mma_sp_m16n8k64_f32_e5m2_e5m2_f32", + "name": "mma_sp_m16n8k64_s32_s4", "arguments": [ - "[f32; 4]", - "[u32; 4]", - "[u32; 4]", + "[i32; 4]", + "[u32; 2]", + "[u32; 2]", "u32", "u32" ], - "result": "[f32; 4]", + "result": "[i32; 4]", "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1029", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_f32_e5m2_e5m2_f32", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0211", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s4", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_f32_e5m2_e5m2_f32" + "cuda_device::wmma::mma_sp_m16n8k64_s32_s4" ] }, "dialect": { "op_type": "SparseMmaOp", "op_name": "nvvm.sparse_mma", "operands": [ - "f32", - "f32", - "f32", - "f32", - "u32", - "u32", - "u32", - "u32", + "i32", + "i32", + "i32", + "i32", "u32", "u32", "u32", @@ -186423,14 +189006,14 @@ "u32" ], "results": [ - "f32", - "f32", - "f32", - "f32" + "i32", + "i32", + "i32", + "i32" ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.f32.e5m2.e5m2.f32", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.s4", "arguments": [ "i32", "i32", @@ -186440,24 +189023,20 @@ "i32", "i32", "i32", - "f32", - "f32", - "f32", - "f32", "i32", "i32" ], "results": [ - "f32", - "f32", - "f32", - "f32" + "i32", + "i32", + "i32", + "i32" ], "properties": [ - "ImmArg", + "ImmArg", "IntrNoCallback", "IntrNoMem", - "Range" + "Range" ], "result_facts": { "no_undef": false, @@ -186471,17 +189050,17 @@ "execution_scope": "warp" }, "target": { - "minimum_ptx": "8.4", + "minimum_ptx": "7.1", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 89 + "sm": 80 } ] }, - "ptx_result": "[f32; 4]", + "ptx_result": "[i32; 4]", "targets": "all", "ptx_isa_version": "9.3", "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", @@ -186493,8 +189072,8 @@ "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", "status": "validated", "target_triple": "nvptx64-nvidia-cuda", - "gpu_target": "sm_89", - "ptx_feature": "+ptx84" + "gpu_target": "sm_80", + "ptx_feature": "+ptx71" }, "backend_lowerings": [ { @@ -186502,13 +189081,13 @@ "mechanism": "inline_ptx", "evidence_profile": "rust-llvm-23.1.3-aab11ee0", "target": { - "minimum_ptx": "8.4", + "minimum_ptx": "7.1", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 89 + "sm": 80 } ] } @@ -186521,14 +189100,14 @@ "stages": [ { "targets": [ - "sm_89", - "ptx84" + "sm_80", + "ptx71" ], "representation": "separate probes for the recorded lowering mechanism", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 4 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 b4291dcecc12bc81abeb0be6aeaced6d49643bef41540dbf09a3351dd88cd047.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 ae995db003010942ebdf8a541fb71e7a209b14d2035dc9b39ceebb44a20a8b22.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -186536,14 +189115,14 @@ }, { "targets": [ - "sm_89", - "ptx84" + "sm_80", + "ptx71" ], "representation": "separate PTX outputs assembled for the recorded target", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 4 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9112d0e3f69969f98e685af0f6770243c98fd74ebfe159b84dbccb33abff93b4.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 d3e0072eed343ab18506217d990ecc273e425433b2c7866bbf1cb84c84c48651.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", @@ -186554,35 +189133,35 @@ { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.73", + "evidence_profile": "cuda-13.3-libnvvm-13.3.33", "target": { - "minimum_ptx": "8.4", + "minimum_ptx": "7.1", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 89 + "sm": 80 } ] } }, - "version": "CUDA toolkit 13.3; nvcc/libNVVM release V13.3.73", - "sha256": "e55af1135e987372355d19d66cb74e1a1e99c32ac98ffad14fb567eef16e4f77", - "artifact_path": "/home/kxqandccx/pr-e2e-20260918/tk/lib/python3.10/site-packages/nvidia/cu13/lib/libnvvm.so.4", - "build_id_prefix": "88b802", + "version": "CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33", + "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", + "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", + "build_id_prefix": "2330c0", "status": "validated", "stages": [ { "targets": [ - "compute_89", + "compute_80", "ptx93" ], - "representation": "convergent plain-sparsity sparse FP8 F32 inline PTX in public D, A, B, C, metadata, selector order", + "representation": "convergent standard sparse m16n8k64 wrapping s4-by-s4 INT4 inline PTX through CUDA 13.3 libNVVM", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled a 4-function NVVM IR module (SHA-256 42a84360a8efa402dae317b5fcb41c95cd857eac174eadf3fc01458b1c513504, requiring the !nvvmir.version 2.0 metadata and an explicit NVPTX data layout) with -arch=compute_89 to 7,193 bytes of PTX (SHA-256 28b1418b52d7911cc7122424e57c4fa0814b51bde354a69d7fa9f1dad3693dac, .version 9.3, .target sm_89) retaining all four requested instructions verbatim, and with -gen-lto to 3,092 bytes of LTOIR (SHA-256 846592e970ecc3f8a8ede212a9c4b5f87586e3629c0ee2b151dab6f62114ab1f). The libNVVM route for compute_89 is accepted: no capability error was raised for any of the four forms.", + "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact wrapping s4-by-s4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -186590,50 +189169,50 @@ }, { "targets": [ - "sm_89", + "sm_80", "ptx93" ], - "representation": "libNVVM-emitted plain-sparsity sparse FP8 F32 PTX", + "representation": "CUDA 13.3 emitted standard sparse m16n8k64 INT4 PTX", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the libNVVM PTX at sm_89 into a 1,464-byte cubin (SHA-256 b1f806ccaa8a73aa80b76862b643265a508494c53028348b0f4e730d7a86847a), byte-identical to the cubin the pinned-LLVM route produced from the same four forms.", + "detail": "After removing libNVVM's single trailing NUL, CUDA 13.3 ptxas accepted the 4,978-byte PTX (SHA-256 7b24a91e649c24cd57c20d6923a0940730b9465107178b227921b8d5f0a478d2), issued only the ordered-metadata performance advisory, and produced a 4,008-byte cubin (SHA-256 109d906a6082234019e136181d47d7306c65edbedf5c47e3c46ef56635fa6ca6) with exactly 16 IMMA.SP.16864 instructions. The PTX 7.0, sm_75, selector 2, and dynamic-selector negatives are recorded by the paired pinned-LLVM evidence.", "artifact_kind": "cubin", - "tool_path": "/home/kxqandccx/pr-e2e-20260918/cuda-13.3/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "CUDA 13.3 V13.3.33 build cuda_13.3.r13.3/compiler.37862127_0", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" }, { "targets": [ - "sm_89", + "sm_80", "ptx93" ], - "representation": "libNVVM LTOIR retaining the plain-sparsity sparse FP8 F32 matrix", + "representation": "CUDA 13.3 libNVVM and nvJitLink standard sparse m16n8k64 INT4 fixture", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "nvJitLink produced a 1,464-byte cubin (SHA-256 18651b809387f94d6074dbdb66590859fac9169a6aab7650569ebd287e8e53b1) from the 3,092-byte LTOIR. The device-link step required the explicit -lto option; without it nvJitLink rejects LTO-IR input with rc=18 \"LTO-IR input cannot be used without LTO enabled (-lto)\".", + "detail": "The direct CUDA 13.3 libNVVM-to-nvJitLink route produced a 4,008-byte cubin with SHA-256 3cc463ee7fdde107bbd51039c7a2259f62196923d049c78703e3662cccc378f5 retaining exactly 16 IMMA.SP.16864 instructions. Production linking of that LTOIR through the repository nvJitLink helper produced a 30,952-byte sm_80 cubin (SHA-256 9c9f270e43b9732e814f899d9aeba2dc6f20aef85769bc83eaae8e345cb82ae6). Independent 92,603-byte nvdisasm (SHA-256 dd862d50b376cc5ae8cd083b71d5da500a751b44c4016ab5d6b3c838960cbc7e) and 349,080-byte cuobjdump (SHA-256 44f234c740a4c6f1b3dd917b979a9f495e7e838343130185febc9c604a3e84ca) views each retained exactly 80 IMMA.SP instructions: 20 m16n8k32, 40 m16n8k64, and 20 m16n8k128. The 16 raw and four compatibility calls added by this batch account for 20 instructions. The coverage kernel is unlaunched, so runtime validation remains unexecuted.", "artifact_kind": "cubin", - "tool_path": "/home/kxqandccx/pr-e2e-20260918/tk/lib/python3.10/site-packages/nvidia/cu13/lib/libnvJitLink.so.13", - "tool_version": "Cuda compilation tools, release 13.4, V13.4.92", - "tool_sha256": "3afdb9677477dd584d3712a9bf2978d085729f0ed6e6432027e925d1e312e3c9" + "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", + "tool_version": "V13.3.33", + "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" } ] } ], "sparse_mma": { "shape": "m16n8k64", - "accumulator": "f32", - "a_element": "e5m2", - "b_element": "e5m2", + "accumulator": "s32", + "a_element": "s4", + "b_element": "s4", "a_layout": "row", "b_layout": "col", - "overflow": "not_applicable", + "overflow": "wrapping", "metadata": "standard", - "selector": "immediate_zero", + "selector": "immediate_zero_or_one", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", - "adapter": "c4_f32_a4_u32_b4_u32_metadata_u32_selector_u32_to_d4_f32", - "llvm_adapter": "a4_i32_b4_i32_c4_f32_metadata_i32_selector_i32_to_d4_f32", + "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", + "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", "compatibility_source": "generated_stub", "runtime_validation": "unexecuted" }, @@ -186647,10 +189226,10 @@ "m16n8k64", "row", "col", - "f32", - "e5m2", - "e5m2", - "f32" + "s32", + "s4", + "s4", + "s32" ], "operands": [ { @@ -186659,11 +189238,11 @@ }, { "kind": "register_list", - "length": 4 + "length": 2 }, { "kind": "register_list", - "length": 4 + "length": 2 }, { "kind": "register_list", @@ -186677,20 +189256,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse e5m2 A and e5m2 B fragments and adds an f32 accumulator." + "summary": "Multiplies warp-distributed sparse signed A and signed B INT4 fragments and adds a wrapping s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_s4", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s4.s4.s32.wrapping.standard_metadata", + "id": "mma_sp_m16n8k64_s32_s4_satfinite", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s4.s4.s32.satfinite.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_s4" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_s4" }, "selections": [ { - "source_record": "anonymous_19390", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.s4.s4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19471", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.s4.s4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -186698,9 +189277,9 @@ } ], "rust": { - "abi_id": "i0211", + "abi_id": "i0215", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_s4", + "name": "mma_sp_m16n8k64_s32_s4_satfinite", "arguments": [ "[i32; 4]", "[u32; 2]", @@ -186712,10 +189291,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0211", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s4", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0215", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s4_satfinite", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_s4" + "cuda_device::wmma::mma_sp_m16n8k64_s32_s4_satfinite" ] }, "dialect": { @@ -186741,7 +189320,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.s4", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.s4", "arguments": [ "i32", "i32", @@ -186835,7 +189414,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 ae995db003010942ebdf8a541fb71e7a209b14d2035dc9b39ceebb44a20a8b22.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0d1ce7e2d45fa78ac932971fa7ccc0f46e00d454de87b3e1ea926b0b22636b9b.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -186850,7 +189429,7 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 d3e0072eed343ab18506217d990ecc273e425433b2c7866bbf1cb84c84c48651.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f8e6cb0ffef1b7c51d3caa4e5f589992e341d54ef3c6b0f0d1e8ac2581ae5db2.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", @@ -186885,11 +189464,11 @@ "compute_80", "ptx93" ], - "representation": "convergent standard sparse m16n8k64 wrapping s4-by-s4 INT4 inline PTX through CUDA 13.3 libNVVM", + "representation": "convergent standard sparse m16n8k64 saturating s4-by-s4 INT4 inline PTX through CUDA 13.3 libNVVM", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact wrapping s4-by-s4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", + "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact saturating s4-by-s4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -186935,7 +189514,7 @@ "b_element": "s4", "a_layout": "row", "b_layout": "col", - "overflow": "wrapping", + "overflow": "satfinite", "metadata": "standard", "selector": "immediate_zero_or_one", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", @@ -186954,6 +189533,7 @@ "m16n8k64", "row", "col", + "satfinite", "s32", "s4", "s4", @@ -186984,20 +189564,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse signed A and signed B INT4 fragments and adds a wrapping s32 accumulator." + "summary": "Multiplies warp-distributed sparse signed A and signed B INT4 fragments and adds a saturating s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_s4_satfinite", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s4.s4.s32.satfinite.standard_metadata", + "id": "mma_sp_m16n8k64_s32_s4_u4", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s4.u4.s32.wrapping.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_s4" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_s4_u4" }, "selections": [ { - "source_record": "anonymous_19471", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.s4.s4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19395", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.s4.u4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -187005,9 +189585,9 @@ } ], "rust": { - "abi_id": "i0215", + "abi_id": "i0212", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_s4_satfinite", + "name": "mma_sp_m16n8k64_s32_s4_u4", "arguments": [ "[i32; 4]", "[u32; 2]", @@ -187019,10 +189599,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0215", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s4_satfinite", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0212", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s4_u4", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_s4_satfinite" + "cuda_device::wmma::mma_sp_m16n8k64_s32_s4_u4" ] }, "dialect": { @@ -187048,7 +189628,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.s4", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.s4.u4", "arguments": [ "i32", "i32", @@ -187142,7 +189722,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0d1ce7e2d45fa78ac932971fa7ccc0f46e00d454de87b3e1ea926b0b22636b9b.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 512623d519f30b4de0fca57417959c5a3e4f6208ac12e3691744f3fbec21cefa.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -187157,7 +189737,7 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f8e6cb0ffef1b7c51d3caa4e5f589992e341d54ef3c6b0f0d1e8ac2581ae5db2.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0e549ea726768ab22519dacc89c24c3546e6cfcf709f8b53b5a8e86030aa8deb.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", @@ -187192,11 +189772,11 @@ "compute_80", "ptx93" ], - "representation": "convergent standard sparse m16n8k64 saturating s4-by-s4 INT4 inline PTX through CUDA 13.3 libNVVM", + "representation": "convergent standard sparse m16n8k64 wrapping s4-by-u4 INT4 inline PTX through CUDA 13.3 libNVVM", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact saturating s4-by-s4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", + "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact wrapping s4-by-u4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -187239,10 +189819,10 @@ "shape": "m16n8k64", "accumulator": "s32", "a_element": "s4", - "b_element": "s4", + "b_element": "u4", "a_layout": "row", "b_layout": "col", - "overflow": "satfinite", + "overflow": "wrapping", "metadata": "standard", "selector": "immediate_zero_or_one", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", @@ -187261,10 +189841,9 @@ "m16n8k64", "row", "col", - "satfinite", "s32", "s4", - "s4", + "u4", "s32" ], "operands": [ @@ -187292,20 +189871,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse signed A and signed B INT4 fragments and adds a saturating s32 accumulator." + "summary": "Multiplies warp-distributed sparse signed A and unsigned B INT4 fragments and adds a wrapping s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_s4_u4", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s4.u4.s32.wrapping.standard_metadata", + "id": "mma_sp_m16n8k64_s32_s4_u4_satfinite", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s4.u4.s32.satfinite.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_s4_u4" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_s4_u4" }, "selections": [ { - "source_record": "anonymous_19395", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.s4.u4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19474", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.s4.u4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -187313,9 +189892,9 @@ } ], "rust": { - "abi_id": "i0212", + "abi_id": "i0216", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_s4_u4", + "name": "mma_sp_m16n8k64_s32_s4_u4_satfinite", "arguments": [ "[i32; 4]", "[u32; 2]", @@ -187327,10 +189906,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0212", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s4_u4", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0216", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s4_u4_satfinite", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_s4_u4" + "cuda_device::wmma::mma_sp_m16n8k64_s32_s4_u4_satfinite" ] }, "dialect": { @@ -187356,7 +189935,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.s4.u4", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.s4.u4", "arguments": [ "i32", "i32", @@ -187450,7 +190029,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 512623d519f30b4de0fca57417959c5a3e4f6208ac12e3691744f3fbec21cefa.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 402335a93decd5671794a0c5ec5e6f09ffd69ed6b26754fac45e7f294b3aac25.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -187465,7 +190044,7 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0e549ea726768ab22519dacc89c24c3546e6cfcf709f8b53b5a8e86030aa8deb.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 11e848685fa3b253ee0b3abb5fee26cf6fb7b3e7f567351483da94bd54ed1afc.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", @@ -187500,11 +190079,11 @@ "compute_80", "ptx93" ], - "representation": "convergent standard sparse m16n8k64 wrapping s4-by-u4 INT4 inline PTX through CUDA 13.3 libNVVM", + "representation": "convergent standard sparse m16n8k64 saturating s4-by-u4 INT4 inline PTX through CUDA 13.3 libNVVM", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact wrapping s4-by-u4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", + "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact saturating s4-by-u4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -187550,7 +190129,7 @@ "b_element": "u4", "a_layout": "row", "b_layout": "col", - "overflow": "wrapping", + "overflow": "satfinite", "metadata": "standard", "selector": "immediate_zero_or_one", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", @@ -187569,6 +190148,7 @@ "m16n8k64", "row", "col", + "satfinite", "s32", "s4", "u4", @@ -187599,20 +190179,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse signed A and unsigned B INT4 fragments and adds a wrapping s32 accumulator." + "summary": "Multiplies warp-distributed sparse signed A and unsigned B INT4 fragments and adds a saturating s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_s4_u4_satfinite", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s4.u4.s32.satfinite.standard_metadata", + "id": "mma_sp_m16n8k64_s32_s8", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s8.s8.s32.wrapping.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_s4_u4" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_s8" }, "selections": [ { - "source_record": "anonymous_19474", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.s4.u4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19454", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.s8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -187620,13 +190200,13 @@ } ], "rust": { - "abi_id": "i0216", + "abi_id": "i0187", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_s4_u4_satfinite", + "name": "mma_sp_m16n8k64_s32_s8", "arguments": [ "[i32; 4]", - "[u32; 2]", - "[u32; 2]", + "[u32; 4]", + "[u32; 4]", "u32", "u32" ], @@ -187634,10 +190214,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0216", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s4_u4_satfinite", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0187", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s8", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_s4_u4_satfinite" + "cuda_device::wmma::mma_sp_m16n8k64_s32_s8" ] }, "dialect": { @@ -187653,6 +190233,10 @@ "u32", "u32", "u32", + "u32", + "u32", + "u32", + "u32", "u32" ], "results": [ @@ -187663,7 +190247,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.s4.u4", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.s8", "arguments": [ "i32", "i32", @@ -187674,6 +190258,10 @@ "i32", "i32", "i32", + "i32", + "i32", + "i32", + "i32", "i32" ], "results": [ @@ -187683,10 +190271,10 @@ "i32" ], "properties": [ - "ImmArg", + "ImmArg", "IntrNoCallback", "IntrNoMem", - "Range" + "Range" ], "result_facts": { "no_undef": false, @@ -187757,7 +190345,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 402335a93decd5671794a0c5ec5e6f09ffd69ed6b26754fac45e7f294b3aac25.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 fcd1b6080f311a524c25afacc87c7db3e52597ff2da06494ecc63a319740ff3a.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -187772,8 +190360,8 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 11e848685fa3b253ee0b3abb5fee26cf6fb7b3e7f567351483da94bd54ed1afc.", - "artifact_kind": "cubin", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e7c617c1291bbecb8b6aa72f56558797c56ea20bb7a78fd5769aae5d0f12b720.", + "artifact_kind": null, "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" @@ -187807,11 +190395,11 @@ "compute_80", "ptx93" ], - "representation": "convergent standard sparse m16n8k64 saturating s4-by-u4 INT4 inline PTX through CUDA 13.3 libNVVM", + "representation": "convergent base sparse m16n8k64 signed INT8 inline PTX in the combined coverage kernel", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact saturating s4-by-u4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", + "detail": "The production generated_intrinsics route produced 269,916-byte compute_80 NVVM IR with SHA-256 976d4c2cb32144fc4c6c9923096685fbe1f34306bdcfd2b9b706764508183b78 and 75,912-byte LTOIR with SHA-256 bf01957e2400a1ba5a82246a85b584c1964536bf529a581b64ef4192e2b8a157. All eight raw variants and two compatibility-path calls use compile-time selector 0.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -187822,26 +190410,11 @@ "sm_80", "ptx93" ], - "representation": "CUDA 13.3 emitted standard sparse m16n8k64 INT4 PTX", - "stage": "ptx_assembly", - "mechanism": "inline_ptx", - "outcome": "succeeded", - "detail": "After removing libNVVM's single trailing NUL, CUDA 13.3 ptxas accepted the 4,978-byte PTX (SHA-256 7b24a91e649c24cd57c20d6923a0940730b9465107178b227921b8d5f0a478d2), issued only the ordered-metadata performance advisory, and produced a 4,008-byte cubin (SHA-256 109d906a6082234019e136181d47d7306c65edbedf5c47e3c46ef56635fa6ca6) with exactly 16 IMMA.SP.16864 instructions. The PTX 7.0, sm_75, selector 2, and dynamic-selector negatives are recorded by the paired pinned-LLVM evidence.", - "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "CUDA 13.3 V13.3.33 build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" - }, - { - "targets": [ - "sm_80", - "ptx93" - ], - "representation": "CUDA 13.3 libNVVM and nvJitLink standard sparse m16n8k64 INT4 fixture", + "representation": "combined sparse INT8 coverage kernel with standard m16n8k64 calls", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The direct CUDA 13.3 libNVVM-to-nvJitLink route produced a 4,008-byte cubin with SHA-256 3cc463ee7fdde107bbd51039c7a2259f62196923d049c78703e3662cccc378f5 retaining exactly 16 IMMA.SP.16864 instructions. Production linking of that LTOIR through the repository nvJitLink helper produced a 30,952-byte sm_80 cubin (SHA-256 9c9f270e43b9732e814f899d9aeba2dc6f20aef85769bc83eaae8e345cb82ae6). Independent 92,603-byte nvdisasm (SHA-256 dd862d50b376cc5ae8cd083b71d5da500a751b44c4016ab5d6b3c838960cbc7e) and 349,080-byte cuobjdump (SHA-256 44f234c740a4c6f1b3dd917b979a9f495e7e838343130185febc9c604a3e84ca) views each retained exactly 80 IMMA.SP instructions: 20 m16n8k32, 40 m16n8k64, and 20 m16n8k128. The 16 raw and four compatibility calls added by this batch account for 20 instructions. The coverage kernel is unlaunched, so runtime validation remains unexecuted.", + "detail": "nvJitLink produced a 25,192-byte cubin with SHA-256 c1f9df611c9a113b3830ee6f837232382b95f104c4928668af27a181162afebb. Disassembly contained 40 IMMA.SP instructions: exactly 20 IMMA.SP.16864 instructions (10 new standard calls plus 10 existing ordered calls) and 20 IMMA.SP.16832 instructions.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", "tool_version": "V13.3.33", @@ -187853,16 +190426,16 @@ "sparse_mma": { "shape": "m16n8k64", "accumulator": "s32", - "a_element": "s4", - "b_element": "u4", + "a_element": "s8", + "b_element": "s8", "a_layout": "row", "b_layout": "col", - "overflow": "satfinite", + "overflow": "wrapping", "metadata": "standard", - "selector": "immediate_zero_or_one", + "selector": "immediate_zero", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", - "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", - "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "adapter": "c4_i32_a4_u32_b4_u32_metadata_u32_selector_u32_to_d4_i32", + "llvm_adapter": "a4_i32_b4_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", "compatibility_source": "generated_stub", "runtime_validation": "unexecuted" }, @@ -187876,10 +190449,9 @@ "m16n8k64", "row", "col", - "satfinite", "s32", - "s4", - "u4", + "s8", + "s8", "s32" ], "operands": [ @@ -187889,11 +190461,11 @@ }, { "kind": "register_list", - "length": 2 + "length": 4 }, { "kind": "register_list", - "length": 2 + "length": 4 }, { "kind": "register_list", @@ -187907,20 +190479,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse signed A and unsigned B INT4 fragments and adds a saturating s32 accumulator." + "summary": "Multiplies warp-distributed sparse signed A and signed B INT8 fragments and adds a wrapping s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_s8", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s8.s8.s32.wrapping.standard_metadata", + "id": "mma_sp_m16n8k64_s32_s8_satfinite", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s8.s8.s32.satfinite.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_s8" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_s8" }, "selections": [ { - "source_record": "anonymous_19454", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.s8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19507", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.s8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -187928,9 +190500,9 @@ } ], "rust": { - "abi_id": "i0187", + "abi_id": "i0191", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_s8", + "name": "mma_sp_m16n8k64_s32_s8_satfinite", "arguments": [ "[i32; 4]", "[u32; 4]", @@ -187942,10 +190514,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0187", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s8", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0191", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s8_satfinite", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_s8" + "cuda_device::wmma::mma_sp_m16n8k64_s32_s8_satfinite" ] }, "dialect": { @@ -187975,7 +190547,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.s8", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.s8", "arguments": [ "i32", "i32", @@ -188073,7 +190645,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 fcd1b6080f311a524c25afacc87c7db3e52597ff2da06494ecc63a319740ff3a.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f1627fbb5b81a5df542173347c1dabb3e3493c579f2d1ec962fbfb8bf88936a7.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -188088,7 +190660,7 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e7c617c1291bbecb8b6aa72f56558797c56ea20bb7a78fd5769aae5d0f12b720.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 207e717b6d247cfb221fdbcec7a626708ce5b740bdb21f409d1dbbb439941c5e.", "artifact_kind": null, "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", @@ -188123,7 +190695,7 @@ "compute_80", "ptx93" ], - "representation": "convergent base sparse m16n8k64 signed INT8 inline PTX in the combined coverage kernel", + "representation": "convergent base sparse m16n8k64 signed saturating INT8 inline PTX in the combined coverage kernel", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", @@ -188158,7 +190730,7 @@ "b_element": "s8", "a_layout": "row", "b_layout": "col", - "overflow": "wrapping", + "overflow": "satfinite", "metadata": "standard", "selector": "immediate_zero", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", @@ -188177,6 +190749,7 @@ "m16n8k64", "row", "col", + "satfinite", "s32", "s8", "s8", @@ -188207,20 +190780,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse signed A and signed B INT8 fragments and adds a wrapping s32 accumulator." + "summary": "Multiplies warp-distributed sparse signed A and signed B INT8 fragments and adds a saturating s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_s8_satfinite", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s8.s8.s32.satfinite.standard_metadata", + "id": "mma_sp_m16n8k64_s32_s8_u8", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s8.u8.s32.wrapping.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_s8" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_s8_u8" }, "selections": [ { - "source_record": "anonymous_19507", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.s8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19459", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.s8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -188228,9 +190801,9 @@ } ], "rust": { - "abi_id": "i0191", + "abi_id": "i0188", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_s8_satfinite", + "name": "mma_sp_m16n8k64_s32_s8_u8", "arguments": [ "[i32; 4]", "[u32; 4]", @@ -188242,10 +190815,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0191", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s8_satfinite", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0188", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s8_u8", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_s8_satfinite" + "cuda_device::wmma::mma_sp_m16n8k64_s32_s8_u8" ] }, "dialect": { @@ -188275,7 +190848,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.s8", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.s8.u8", "arguments": [ "i32", "i32", @@ -188373,7 +190946,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f1627fbb5b81a5df542173347c1dabb3e3493c579f2d1ec962fbfb8bf88936a7.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f9dcb133309ca12ab7c5fabd0703c014103473203370652bf89f8b5c39de9898.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -188388,7 +190961,7 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 207e717b6d247cfb221fdbcec7a626708ce5b740bdb21f409d1dbbb439941c5e.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 b95b07cec0fa97e908c16d96d9ded6697b9173ef6debe699b291aa890a5d22ee.", "artifact_kind": null, "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", @@ -188423,7 +190996,7 @@ "compute_80", "ptx93" ], - "representation": "convergent base sparse m16n8k64 signed saturating INT8 inline PTX in the combined coverage kernel", + "representation": "convergent base sparse m16n8k64 mixed-sign INT8 inline PTX in the combined coverage kernel", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", @@ -188455,10 +191028,10 @@ "shape": "m16n8k64", "accumulator": "s32", "a_element": "s8", - "b_element": "s8", + "b_element": "u8", "a_layout": "row", "b_layout": "col", - "overflow": "satfinite", + "overflow": "wrapping", "metadata": "standard", "selector": "immediate_zero", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", @@ -188477,10 +191050,9 @@ "m16n8k64", "row", "col", - "satfinite", "s32", "s8", - "s8", + "u8", "s32" ], "operands": [ @@ -188508,20 +191080,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse signed A and signed B INT8 fragments and adds a saturating s32 accumulator." + "summary": "Multiplies warp-distributed sparse signed A and unsigned B INT8 fragments and adds a wrapping s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_s8_u8", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s8.u8.s32.wrapping.standard_metadata", + "id": "mma_sp_m16n8k64_s32_s8_u8_satfinite", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s8.u8.s32.satfinite.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_s8_u8" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_s8_u8" }, "selections": [ { - "source_record": "anonymous_19459", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.s8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19510", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.s8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -188529,9 +191101,9 @@ } ], "rust": { - "abi_id": "i0188", + "abi_id": "i0192", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_s8_u8", + "name": "mma_sp_m16n8k64_s32_s8_u8_satfinite", "arguments": [ "[i32; 4]", "[u32; 4]", @@ -188543,10 +191115,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0188", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s8_u8", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0192", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s8_u8_satfinite", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_s8_u8" + "cuda_device::wmma::mma_sp_m16n8k64_s32_s8_u8_satfinite" ] }, "dialect": { @@ -188576,7 +191148,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.s8.u8", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.s8.u8", "arguments": [ "i32", "i32", @@ -188674,7 +191246,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f9dcb133309ca12ab7c5fabd0703c014103473203370652bf89f8b5c39de9898.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 35ffdccb3d2495814cf57898071b7b916a6b6ca5627fa62e179523389496a18d.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -188689,7 +191261,7 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 b95b07cec0fa97e908c16d96d9ded6697b9173ef6debe699b291aa890a5d22ee.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 619c473b81d7936bbd80cd8b1195a5911b756c6209ce85beba9dc3b63c929df0.", "artifact_kind": null, "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", @@ -188724,7 +191296,7 @@ "compute_80", "ptx93" ], - "representation": "convergent base sparse m16n8k64 mixed-sign INT8 inline PTX in the combined coverage kernel", + "representation": "convergent base sparse m16n8k64 mixed-sign saturating INT8 inline PTX in the combined coverage kernel", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", @@ -188759,7 +191331,7 @@ "b_element": "u8", "a_layout": "row", "b_layout": "col", - "overflow": "wrapping", + "overflow": "satfinite", "metadata": "standard", "selector": "immediate_zero", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", @@ -188778,6 +191350,7 @@ "m16n8k64", "row", "col", + "satfinite", "s32", "s8", "u8", @@ -188808,20 +191381,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse signed A and unsigned B INT8 fragments and adds a wrapping s32 accumulator." + "summary": "Multiplies warp-distributed sparse signed A and unsigned B INT8 fragments and adds a saturating s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_s8_u8_satfinite", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.s8.u8.s32.satfinite.standard_metadata", + "id": "mma_sp_m16n8k64_s32_u4", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u4.u4.s32.wrapping.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_s8_u8" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_u4" }, "selections": [ { - "source_record": "anonymous_19510", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.s8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19404", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.u4.u4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -188829,13 +191402,13 @@ } ], "rust": { - "abi_id": "i0192", + "abi_id": "i0213", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_s8_u8_satfinite", + "name": "mma_sp_m16n8k64_s32_u4", "arguments": [ "[i32; 4]", - "[u32; 4]", - "[u32; 4]", + "[u32; 2]", + "[u32; 2]", "u32", "u32" ], @@ -188843,10 +191416,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0192", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_s8_u8_satfinite", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0213", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u4", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_s8_u8_satfinite" + "cuda_device::wmma::mma_sp_m16n8k64_s32_u4" ] }, "dialect": { @@ -188862,10 +191435,6 @@ "u32", "u32", "u32", - "u32", - "u32", - "u32", - "u32", "u32" ], "results": [ @@ -188876,7 +191445,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.s8.u8", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.u4", "arguments": [ "i32", "i32", @@ -188887,10 +191456,6 @@ "i32", "i32", "i32", - "i32", - "i32", - "i32", - "i32", "i32" ], "results": [ @@ -188900,10 +191465,10 @@ "i32" ], "properties": [ - "ImmArg", + "ImmArg", "IntrNoCallback", "IntrNoMem", - "Range" + "Range" ], "result_facts": { "no_undef": false, @@ -188974,7 +191539,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 35ffdccb3d2495814cf57898071b7b916a6b6ca5627fa62e179523389496a18d.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 48f8afefe6dcc736f9b1e6750a9aa96bcbe0f1406d48a768f5ec04527b9f8ff2.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -188989,8 +191554,8 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 619c473b81d7936bbd80cd8b1195a5911b756c6209ce85beba9dc3b63c929df0.", - "artifact_kind": null, + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e41e8f8421b3066da06e8b9f77e52d19c248e2833be81e57cbe83b1dc4e3b34a.", + "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" @@ -189024,11 +191589,11 @@ "compute_80", "ptx93" ], - "representation": "convergent base sparse m16n8k64 mixed-sign saturating INT8 inline PTX in the combined coverage kernel", + "representation": "convergent standard sparse m16n8k64 wrapping u4-by-u4 INT4 inline PTX through CUDA 13.3 libNVVM", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The production generated_intrinsics route produced 269,916-byte compute_80 NVVM IR with SHA-256 976d4c2cb32144fc4c6c9923096685fbe1f34306bdcfd2b9b706764508183b78 and 75,912-byte LTOIR with SHA-256 bf01957e2400a1ba5a82246a85b584c1964536bf529a581b64ef4192e2b8a157. All eight raw variants and two compatibility-path calls use compile-time selector 0.", + "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact wrapping u4-by-u4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -189039,11 +191604,26 @@ "sm_80", "ptx93" ], - "representation": "combined sparse INT8 coverage kernel with standard m16n8k64 calls", + "representation": "CUDA 13.3 emitted standard sparse m16n8k64 INT4 PTX", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "After removing libNVVM's single trailing NUL, CUDA 13.3 ptxas accepted the 4,978-byte PTX (SHA-256 7b24a91e649c24cd57c20d6923a0940730b9465107178b227921b8d5f0a478d2), issued only the ordered-metadata performance advisory, and produced a 4,008-byte cubin (SHA-256 109d906a6082234019e136181d47d7306c65edbedf5c47e3c46ef56635fa6ca6) with exactly 16 IMMA.SP.16864 instructions. The PTX 7.0, sm_75, selector 2, and dynamic-selector negatives are recorded by the paired pinned-LLVM evidence.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "CUDA 13.3 V13.3.33 build cuda_13.3.r13.3/compiler.37862127_0", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "CUDA 13.3 libNVVM and nvJitLink standard sparse m16n8k64 INT4 fixture", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "nvJitLink produced a 25,192-byte cubin with SHA-256 c1f9df611c9a113b3830ee6f837232382b95f104c4928668af27a181162afebb. Disassembly contained 40 IMMA.SP instructions: exactly 20 IMMA.SP.16864 instructions (10 new standard calls plus 10 existing ordered calls) and 20 IMMA.SP.16832 instructions.", + "detail": "The direct CUDA 13.3 libNVVM-to-nvJitLink route produced a 4,008-byte cubin with SHA-256 3cc463ee7fdde107bbd51039c7a2259f62196923d049c78703e3662cccc378f5 retaining exactly 16 IMMA.SP.16864 instructions. Production linking of that LTOIR through the repository nvJitLink helper produced a 30,952-byte sm_80 cubin (SHA-256 9c9f270e43b9732e814f899d9aeba2dc6f20aef85769bc83eaae8e345cb82ae6). Independent 92,603-byte nvdisasm (SHA-256 dd862d50b376cc5ae8cd083b71d5da500a751b44c4016ab5d6b3c838960cbc7e) and 349,080-byte cuobjdump (SHA-256 44f234c740a4c6f1b3dd917b979a9f495e7e838343130185febc9c604a3e84ca) views each retained exactly 80 IMMA.SP instructions: 20 m16n8k32, 40 m16n8k64, and 20 m16n8k128. The 16 raw and four compatibility calls added by this batch account for 20 instructions. The coverage kernel is unlaunched, so runtime validation remains unexecuted.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", "tool_version": "V13.3.33", @@ -189055,16 +191635,16 @@ "sparse_mma": { "shape": "m16n8k64", "accumulator": "s32", - "a_element": "s8", - "b_element": "u8", + "a_element": "u4", + "b_element": "u4", "a_layout": "row", "b_layout": "col", - "overflow": "satfinite", + "overflow": "wrapping", "metadata": "standard", - "selector": "immediate_zero", + "selector": "immediate_zero_or_one", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", - "adapter": "c4_i32_a4_u32_b4_u32_metadata_u32_selector_u32_to_d4_i32", - "llvm_adapter": "a4_i32_b4_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", + "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", "compatibility_source": "generated_stub", "runtime_validation": "unexecuted" }, @@ -189078,10 +191658,9 @@ "m16n8k64", "row", "col", - "satfinite", "s32", - "s8", - "u8", + "u4", + "u4", "s32" ], "operands": [ @@ -189091,11 +191670,11 @@ }, { "kind": "register_list", - "length": 4 + "length": 2 }, { "kind": "register_list", - "length": 4 + "length": 2 }, { "kind": "register_list", @@ -189109,20 +191688,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse signed A and unsigned B INT8 fragments and adds a saturating s32 accumulator." + "summary": "Multiplies warp-distributed sparse unsigned A and unsigned B INT4 fragments and adds a wrapping s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_u4", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u4.u4.s32.wrapping.standard_metadata", + "id": "mma_sp_m16n8k64_s32_u4_s4", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u4.s4.s32.wrapping.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_u4" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_u4_s4" }, "selections": [ { - "source_record": "anonymous_19404", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.u4.u4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19400", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.u4.s4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -189130,9 +191709,9 @@ } ], "rust": { - "abi_id": "i0213", + "abi_id": "i0214", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_u4", + "name": "mma_sp_m16n8k64_s32_u4_s4", "arguments": [ "[i32; 4]", "[u32; 2]", @@ -189144,10 +191723,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0213", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u4", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0214", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u4_s4", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_u4" + "cuda_device::wmma::mma_sp_m16n8k64_s32_u4_s4" ] }, "dialect": { @@ -189173,7 +191752,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.u4", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.u4.s4", "arguments": [ "i32", "i32", @@ -189267,7 +191846,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 48f8afefe6dcc736f9b1e6750a9aa96bcbe0f1406d48a768f5ec04527b9f8ff2.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 cfc39a65a680d1cbbc4c17da9f23149ff569b977c427d1b56d9e22ae71752d6d.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -189282,7 +191861,7 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e41e8f8421b3066da06e8b9f77e52d19c248e2833be81e57cbe83b1dc4e3b34a.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 ed9c523935c6e4d65c559d3b3246acf09a9515e0fade43ca29a79225e3009374.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", @@ -189317,11 +191896,11 @@ "compute_80", "ptx93" ], - "representation": "convergent standard sparse m16n8k64 wrapping u4-by-u4 INT4 inline PTX through CUDA 13.3 libNVVM", + "representation": "convergent standard sparse m16n8k64 wrapping u4-by-s4 INT4 inline PTX through CUDA 13.3 libNVVM", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact wrapping u4-by-u4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", + "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact wrapping u4-by-s4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -189364,7 +191943,7 @@ "shape": "m16n8k64", "accumulator": "s32", "a_element": "u4", - "b_element": "u4", + "b_element": "s4", "a_layout": "row", "b_layout": "col", "overflow": "wrapping", @@ -189388,7 +191967,7 @@ "col", "s32", "u4", - "u4", + "s4", "s32" ], "operands": [ @@ -189416,20 +191995,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse unsigned A and unsigned B INT4 fragments and adds a wrapping s32 accumulator." + "summary": "Multiplies warp-distributed sparse unsigned A and signed B INT4 fragments and adds a wrapping s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_u4_s4", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u4.s4.s32.wrapping.standard_metadata", + "id": "mma_sp_m16n8k64_s32_u4_s4_satfinite", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u4.s4.s32.satfinite.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_u4_s4" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_u4_s4" }, "selections": [ { - "source_record": "anonymous_19400", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.u4.s4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19477", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.u4.s4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -189437,9 +192016,9 @@ } ], "rust": { - "abi_id": "i0214", + "abi_id": "i0218", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_u4_s4", + "name": "mma_sp_m16n8k64_s32_u4_s4_satfinite", "arguments": [ "[i32; 4]", "[u32; 2]", @@ -189451,10 +192030,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0214", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u4_s4", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0218", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u4_s4_satfinite", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_u4_s4" + "cuda_device::wmma::mma_sp_m16n8k64_s32_u4_s4_satfinite" ] }, "dialect": { @@ -189480,7 +192059,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.u4.s4", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u4.s4", "arguments": [ "i32", "i32", @@ -189574,7 +192153,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 cfc39a65a680d1cbbc4c17da9f23149ff569b977c427d1b56d9e22ae71752d6d.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 c8888ee61f060e895057d138bf3de9ec113eb39bb2c874055eda73abac1316e9.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -189589,7 +192168,7 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 ed9c523935c6e4d65c559d3b3246acf09a9515e0fade43ca29a79225e3009374.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 770bae1810b48f7e160fb5a12fc8c49e4075d0c9cf30402bfa707c38346aa36a.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", @@ -189624,11 +192203,11 @@ "compute_80", "ptx93" ], - "representation": "convergent standard sparse m16n8k64 wrapping u4-by-s4 INT4 inline PTX through CUDA 13.3 libNVVM", + "representation": "convergent standard sparse m16n8k64 saturating u4-by-s4 INT4 inline PTX through CUDA 13.3 libNVVM", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact wrapping u4-by-s4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", + "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact saturating u4-by-s4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -189674,7 +192253,7 @@ "b_element": "s4", "a_layout": "row", "b_layout": "col", - "overflow": "wrapping", + "overflow": "satfinite", "metadata": "standard", "selector": "immediate_zero_or_one", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", @@ -189693,6 +192272,7 @@ "m16n8k64", "row", "col", + "satfinite", "s32", "u4", "s4", @@ -189723,20 +192303,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse unsigned A and signed B INT4 fragments and adds a wrapping s32 accumulator." + "summary": "Multiplies warp-distributed sparse unsigned A and signed B INT4 fragments and adds a saturating s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_u4_s4_satfinite", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u4.s4.s32.satfinite.standard_metadata", + "id": "mma_sp_m16n8k64_s32_u4_satfinite", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u4.u4.s32.satfinite.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_u4_s4" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_u4" }, "selections": [ { - "source_record": "anonymous_19477", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.u4.s4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19480", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.u4.u4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -189744,9 +192324,9 @@ } ], "rust": { - "abi_id": "i0218", + "abi_id": "i0217", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_u4_s4_satfinite", + "name": "mma_sp_m16n8k64_s32_u4_satfinite", "arguments": [ "[i32; 4]", "[u32; 2]", @@ -189758,10 +192338,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0218", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u4_s4_satfinite", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0217", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u4_satfinite", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_u4_s4_satfinite" + "cuda_device::wmma::mma_sp_m16n8k64_s32_u4_satfinite" ] }, "dialect": { @@ -189787,7 +192367,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u4.s4", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u4", "arguments": [ "i32", "i32", @@ -189881,7 +192461,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 c8888ee61f060e895057d138bf3de9ec113eb39bb2c874055eda73abac1316e9.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 7d2ab75eca2756a0c4d2c5544fe7837b92630aa42748c757bf68e0dcf6cc0c8f.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -189896,7 +192476,7 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 770bae1810b48f7e160fb5a12fc8c49e4075d0c9cf30402bfa707c38346aa36a.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 dea3c30a40b3bf4e28518ac19ce412aed32cb5f0394d48bb75ee09953527c0f4.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", @@ -189931,11 +192511,11 @@ "compute_80", "ptx93" ], - "representation": "convergent standard sparse m16n8k64 saturating u4-by-s4 INT4 inline PTX through CUDA 13.3 libNVVM", + "representation": "convergent standard sparse m16n8k64 saturating u4-by-u4 INT4 inline PTX through CUDA 13.3 libNVVM", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact saturating u4-by-s4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", + "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact saturating u4-by-u4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -189978,7 +192558,7 @@ "shape": "m16n8k64", "accumulator": "s32", "a_element": "u4", - "b_element": "s4", + "b_element": "u4", "a_layout": "row", "b_layout": "col", "overflow": "satfinite", @@ -190003,7 +192583,7 @@ "satfinite", "s32", "u4", - "s4", + "u4", "s32" ], "operands": [ @@ -190031,20 +192611,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse unsigned A and signed B INT4 fragments and adds a saturating s32 accumulator." + "summary": "Multiplies warp-distributed sparse unsigned A and unsigned B INT4 fragments and adds a saturating s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_u4_satfinite", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u4.u4.s32.satfinite.standard_metadata", + "id": "mma_sp_m16n8k64_s32_u8", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u8.u8.s32.wrapping.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_u4" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_u8" }, "selections": [ { - "source_record": "anonymous_19480", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.u4.u4.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19468", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.u8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -190052,13 +192632,13 @@ } ], "rust": { - "abi_id": "i0217", + "abi_id": "i0189", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_u4_satfinite", + "name": "mma_sp_m16n8k64_s32_u8", "arguments": [ "[i32; 4]", - "[u32; 2]", - "[u32; 2]", + "[u32; 4]", + "[u32; 4]", "u32", "u32" ], @@ -190066,10 +192646,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0217", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u4_satfinite", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0189", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_u4_satfinite" + "cuda_device::wmma::mma_sp_m16n8k64_s32_u8" ] }, "dialect": { @@ -190085,6 +192665,10 @@ "u32", "u32", "u32", + "u32", + "u32", + "u32", + "u32", "u32" ], "results": [ @@ -190095,7 +192679,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u4", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.u8", "arguments": [ "i32", "i32", @@ -190106,6 +192690,10 @@ "i32", "i32", "i32", + "i32", + "i32", + "i32", + "i32", "i32" ], "results": [ @@ -190115,10 +192703,10 @@ "i32" ], "properties": [ - "ImmArg", + "ImmArg", "IntrNoCallback", "IntrNoMem", - "Range" + "Range" ], "result_facts": { "no_undef": false, @@ -190189,7 +192777,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 7d2ab75eca2756a0c4d2c5544fe7837b92630aa42748c757bf68e0dcf6cc0c8f.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 73597b682d1b12c2fccfad62f40ece013c3c3fcd9024e59c32ef84a8732364e5.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -190204,8 +192792,8 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 dea3c30a40b3bf4e28518ac19ce412aed32cb5f0394d48bb75ee09953527c0f4.", - "artifact_kind": "cubin", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 ac63519d007e8dce250d4517871606b252765146f7f59abdd1602790cb331543.", + "artifact_kind": null, "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" @@ -190239,11 +192827,11 @@ "compute_80", "ptx93" ], - "representation": "convergent standard sparse m16n8k64 saturating u4-by-u4 INT4 inline PTX through CUDA 13.3 libNVVM", + "representation": "convergent base sparse m16n8k64 unsigned INT8 inline PTX in the combined coverage kernel", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The same 7,822-byte NVVM IR fixture (SHA-256 ea46feacc7fcd1c5ae768178ec7ad5cb97a85c892ca6317fbe4a13c72dafbc33) passed CUDA 13.3 libNVVM and produced 4,979-byte NUL-terminated PTX (SHA-256 abe6ae9238f6137de91c9c2214fc9d7aa78da2bdd6d60a75013f45866c60c38f) containing all eight variants with selectors 0 and 1. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact saturating u4-by-u4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs.", + "detail": "The production generated_intrinsics route produced 269,916-byte compute_80 NVVM IR with SHA-256 976d4c2cb32144fc4c6c9923096685fbe1f34306bdcfd2b9b706764508183b78 and 75,912-byte LTOIR with SHA-256 bf01957e2400a1ba5a82246a85b584c1964536bf529a581b64ef4192e2b8a157. All eight raw variants and two compatibility-path calls use compile-time selector 0.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -190254,26 +192842,11 @@ "sm_80", "ptx93" ], - "representation": "CUDA 13.3 emitted standard sparse m16n8k64 INT4 PTX", - "stage": "ptx_assembly", - "mechanism": "inline_ptx", - "outcome": "succeeded", - "detail": "After removing libNVVM's single trailing NUL, CUDA 13.3 ptxas accepted the 4,978-byte PTX (SHA-256 7b24a91e649c24cd57c20d6923a0940730b9465107178b227921b8d5f0a478d2), issued only the ordered-metadata performance advisory, and produced a 4,008-byte cubin (SHA-256 109d906a6082234019e136181d47d7306c65edbedf5c47e3c46ef56635fa6ca6) with exactly 16 IMMA.SP.16864 instructions. The PTX 7.0, sm_75, selector 2, and dynamic-selector negatives are recorded by the paired pinned-LLVM evidence.", - "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "CUDA 13.3 V13.3.33 build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" - }, - { - "targets": [ - "sm_80", - "ptx93" - ], - "representation": "CUDA 13.3 libNVVM and nvJitLink standard sparse m16n8k64 INT4 fixture", + "representation": "combined sparse INT8 coverage kernel with standard m16n8k64 calls", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The direct CUDA 13.3 libNVVM-to-nvJitLink route produced a 4,008-byte cubin with SHA-256 3cc463ee7fdde107bbd51039c7a2259f62196923d049c78703e3662cccc378f5 retaining exactly 16 IMMA.SP.16864 instructions. Production linking of that LTOIR through the repository nvJitLink helper produced a 30,952-byte sm_80 cubin (SHA-256 9c9f270e43b9732e814f899d9aeba2dc6f20aef85769bc83eaae8e345cb82ae6). Independent 92,603-byte nvdisasm (SHA-256 dd862d50b376cc5ae8cd083b71d5da500a751b44c4016ab5d6b3c838960cbc7e) and 349,080-byte cuobjdump (SHA-256 44f234c740a4c6f1b3dd917b979a9f495e7e838343130185febc9c604a3e84ca) views each retained exactly 80 IMMA.SP instructions: 20 m16n8k32, 40 m16n8k64, and 20 m16n8k128. The 16 raw and four compatibility calls added by this batch account for 20 instructions. The coverage kernel is unlaunched, so runtime validation remains unexecuted.", + "detail": "nvJitLink produced a 25,192-byte cubin with SHA-256 c1f9df611c9a113b3830ee6f837232382b95f104c4928668af27a181162afebb. Disassembly contained 40 IMMA.SP instructions: exactly 20 IMMA.SP.16864 instructions (10 new standard calls plus 10 existing ordered calls) and 20 IMMA.SP.16832 instructions.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", "tool_version": "V13.3.33", @@ -190285,16 +192858,16 @@ "sparse_mma": { "shape": "m16n8k64", "accumulator": "s32", - "a_element": "u4", - "b_element": "u4", + "a_element": "u8", + "b_element": "u8", "a_layout": "row", "b_layout": "col", - "overflow": "satfinite", + "overflow": "wrapping", "metadata": "standard", - "selector": "immediate_zero_or_one", + "selector": "immediate_zero", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", - "adapter": "c4_i32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_i32", - "llvm_adapter": "a2_i32_b2_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "adapter": "c4_i32_a4_u32_b4_u32_metadata_u32_selector_u32_to_d4_i32", + "llvm_adapter": "a4_i32_b4_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", "compatibility_source": "generated_stub", "runtime_validation": "unexecuted" }, @@ -190308,10 +192881,9 @@ "m16n8k64", "row", "col", - "satfinite", "s32", - "u4", - "u4", + "u8", + "u8", "s32" ], "operands": [ @@ -190321,11 +192893,11 @@ }, { "kind": "register_list", - "length": 2 + "length": 4 }, { "kind": "register_list", - "length": 2 + "length": 4 }, { "kind": "register_list", @@ -190339,20 +192911,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse unsigned A and unsigned B INT4 fragments and adds a saturating s32 accumulator." + "summary": "Multiplies warp-distributed sparse unsigned A and unsigned B INT8 fragments and adds a wrapping s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_u8", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u8.u8.s32.wrapping.standard_metadata", + "id": "mma_sp_m16n8k64_s32_u8_s8", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u8.s8.s32.wrapping.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_u8" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_u8_s8" }, "selections": [ { - "source_record": "anonymous_19468", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.u8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19464", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.u8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -190360,9 +192932,9 @@ } ], "rust": { - "abi_id": "i0189", + "abi_id": "i0190", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_u8", + "name": "mma_sp_m16n8k64_s32_u8_s8", "arguments": [ "[i32; 4]", "[u32; 4]", @@ -190374,10 +192946,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0189", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0190", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8_s8", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_u8" + "cuda_device::wmma::mma_sp_m16n8k64_s32_u8_s8" ] }, "dialect": { @@ -190407,7 +192979,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.u8", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.u8.s8", "arguments": [ "i32", "i32", @@ -190505,7 +193077,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 73597b682d1b12c2fccfad62f40ece013c3c3fcd9024e59c32ef84a8732364e5.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 c4d93f3a3ddbc1b78370fc6d41ef8514a6a7aabaa7ec338b788f32dd08f910ae.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -190520,7 +193092,7 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 ac63519d007e8dce250d4517871606b252765146f7f59abdd1602790cb331543.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 46b4764da009f8939b74a6235f29b9a6fed892e8b86f68ff56d576e2e5d11151.", "artifact_kind": null, "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", @@ -190555,7 +193127,7 @@ "compute_80", "ptx93" ], - "representation": "convergent base sparse m16n8k64 unsigned INT8 inline PTX in the combined coverage kernel", + "representation": "convergent base sparse m16n8k64 mixed-sign INT8 inline PTX in the combined coverage kernel", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", @@ -190587,7 +193159,7 @@ "shape": "m16n8k64", "accumulator": "s32", "a_element": "u8", - "b_element": "u8", + "b_element": "s8", "a_layout": "row", "b_layout": "col", "overflow": "wrapping", @@ -190611,7 +193183,7 @@ "col", "s32", "u8", - "u8", + "s8", "s32" ], "operands": [ @@ -190639,20 +193211,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse unsigned A and unsigned B INT8 fragments and adds a wrapping s32 accumulator." + "summary": "Multiplies warp-distributed sparse unsigned A and signed B INT8 fragments and adds a wrapping s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_u8_s8", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u8.s8.s32.wrapping.standard_metadata", + "id": "mma_sp_m16n8k64_s32_u8_s8_satfinite", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u8.s8.s32.satfinite.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_u8_s8" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_u8_s8" }, "selections": [ { - "source_record": "anonymous_19464", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.s32.u8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19513", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.u8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -190660,9 +193232,9 @@ } ], "rust": { - "abi_id": "i0190", + "abi_id": "i0194", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_u8_s8", + "name": "mma_sp_m16n8k64_s32_u8_s8_satfinite", "arguments": [ "[i32; 4]", "[u32; 4]", @@ -190674,10 +193246,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0190", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8_s8", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0194", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8_s8_satfinite", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_u8_s8" + "cuda_device::wmma::mma_sp_m16n8k64_s32_u8_s8_satfinite" ] }, "dialect": { @@ -190707,7 +193279,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.u8.s8", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u8.s8", "arguments": [ "i32", "i32", @@ -190805,7 +193377,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 c4d93f3a3ddbc1b78370fc6d41ef8514a6a7aabaa7ec338b788f32dd08f910ae.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 ee679b12117e5c9162717c0d88a751b96da7576d08049d06c19e3fb6c6300c73.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -190820,7 +193392,7 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 46b4764da009f8939b74a6235f29b9a6fed892e8b86f68ff56d576e2e5d11151.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 00174476515d29940f2a3bd1efce00363d2005a85306c962ce53c6a9bc84e43b.", "artifact_kind": null, "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", @@ -190855,7 +193427,7 @@ "compute_80", "ptx93" ], - "representation": "convergent base sparse m16n8k64 mixed-sign INT8 inline PTX in the combined coverage kernel", + "representation": "convergent base sparse m16n8k64 mixed-sign saturating INT8 inline PTX in the combined coverage kernel", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", @@ -190890,7 +193462,7 @@ "b_element": "s8", "a_layout": "row", "b_layout": "col", - "overflow": "wrapping", + "overflow": "satfinite", "metadata": "standard", "selector": "immediate_zero", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", @@ -190909,6 +193481,7 @@ "m16n8k64", "row", "col", + "satfinite", "s32", "u8", "s8", @@ -190939,20 +193512,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse unsigned A and signed B INT8 fragments and adds a wrapping s32 accumulator." + "summary": "Multiplies warp-distributed sparse unsigned A and signed B INT8 fragments and adds a saturating s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_u8_s8_satfinite", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u8.s8.s32.satfinite.standard_metadata", + "id": "mma_sp_m16n8k64_s32_u8_satfinite", + "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u8.u8.s32.satfinite.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_u8_s8" + "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_u8" }, "selections": [ { - "source_record": "anonymous_19513", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.u8.s8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19516", + "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.u8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -190960,9 +193533,9 @@ } ], "rust": { - "abi_id": "i0194", + "abi_id": "i0193", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_u8_s8_satfinite", + "name": "mma_sp_m16n8k64_s32_u8_satfinite", "arguments": [ "[i32; 4]", "[u32; 4]", @@ -190974,10 +193547,10 @@ "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0194", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8_s8_satfinite", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0193", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8_satfinite", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_u8_s8_satfinite" + "cuda_device::wmma::mma_sp_m16n8k64_s32_u8_satfinite" ] }, "dialect": { @@ -191007,7 +193580,7 @@ ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u8.s8", + "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u8", "arguments": [ "i32", "i32", @@ -191105,7 +193678,7 @@ "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 ee679b12117e5c9162717c0d88a751b96da7576d08049d06c19e3fb6c6300c73.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 a3f0063a7b3cacd62f63384b92d8719e8a4697c12df321ff9a1d5dece0e84d13.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -191120,7 +193693,7 @@ "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 00174476515d29940f2a3bd1efce00363d2005a85306c962ce53c6a9bc84e43b.", + "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 ff140019dd06530e11bd9507f0e371f07c5d88300c8dbbcd619681437d175825.", "artifact_kind": null, "tool_path": "/usr/local/cuda-13.3/bin/ptxas", "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", @@ -191155,7 +193728,7 @@ "compute_80", "ptx93" ], - "representation": "convergent base sparse m16n8k64 mixed-sign saturating INT8 inline PTX in the combined coverage kernel", + "representation": "convergent base sparse m16n8k64 unsigned saturating INT8 inline PTX in the combined coverage kernel", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", @@ -191187,7 +193760,7 @@ "shape": "m16n8k64", "accumulator": "s32", "a_element": "u8", - "b_element": "s8", + "b_element": "u8", "a_layout": "row", "b_layout": "col", "overflow": "satfinite", @@ -191212,7 +193785,7 @@ "satfinite", "s32", "u8", - "s8", + "u8", "s32" ], "operands": [ @@ -191240,20 +193813,20 @@ } ] }, - "summary": "Multiplies warp-distributed sparse unsigned A and signed B INT8 fragments and adds a saturating s32 accumulator." + "summary": "Multiplies warp-distributed sparse unsigned A and unsigned B INT8 fragments and adds a saturating s32 accumulator." }, { - "id": "mma_sp_m16n8k64_s32_u8_satfinite", - "operation_key": "matrix.mma.sp.m16n8k64.row.col.s32.u8.u8.s32.satfinite.standard_metadata", + "id": "mma_sp_m16n8k8_f32_tf32", + "operation_key": "matrix.mma.sp.m16n8k8.row.col.f32.tf32.tf32.f32.not_applicable.standard_metadata", "family": "sparse_mma", "source": { "kind": "llvm_imported", - "source_record": "int_nvvm_mma_sp_m16n8k64_row_col_satfinite_u8" + "source_record": "int_nvvm_mma_sp_m16n8k8_row_col_tf32" }, "selections": [ { - "source_record": "anonymous_19516", - "asm": "mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.u8.u8.s32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1, $ra2, $ra3}},\n\t\t{{$rb0, $rb1, $rb2, $rb3}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", + "source_record": "anonymous_19330", + "asm": "mma.sp.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32\n\t\t{{$rd0, $rd1, $rd2, $rd3}},\n\t\t{{$ra0, $ra1}},\n\t\t{{$rb0, $rb1}},\n\t\t{{$rc0, $rc1, $rc2, $rc3}},\n\t\t$metadata,\n\t\t$selector;", "predicates": [ "Subtarget->getSmVersion() >= 80", "Subtarget->getPTXVersion() >= 71" @@ -191261,38 +193834,34 @@ } ], "rust": { - "abi_id": "i0193", + "abi_id": "i1039", "module": "matrix", - "name": "mma_sp_m16n8k64_s32_u8_satfinite", + "name": "mma_sp_m16n8k8_f32_tf32", "arguments": [ - "[i32; 4]", - "[u32; 4]", - "[u32; 4]", + "[f32; 4]", + "[u32; 2]", + "[u32; 2]", "u32", "u32" ], - "result": "[i32; 4]", + "result": "[f32; 4]", "safe": false, "must_use": true, "safe_allowlist_reason": null, - "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0193", - "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8_satfinite", + "canonical_path": "cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1039", + "public_path": "cuda_intrinsics::matrix::mma_sp_m16n8k8_f32_tf32", "compatibility_paths": [ - "cuda_device::wmma::mma_sp_m16n8k64_s32_u8_satfinite" + "cuda_device::wmma::mma_sp_m16n8k8_f32_tf32" ] }, "dialect": { "op_type": "SparseMmaOp", "op_name": "nvvm.sparse_mma", "operands": [ - "i32", - "i32", - "i32", - "i32", - "u32", - "u32", - "u32", - "u32", + "f32", + "f32", + "f32", + "f32", "u32", "u32", "u32", @@ -191301,41 +193870,37 @@ "u32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ] }, "llvm": { - "symbol": "llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u8", + "symbol": "llvm.nvvm.mma.sp.m16n8k8.row.col.tf32", "arguments": [ "i32", "i32", "i32", "i32", - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", - "i32", + "f32", + "f32", + "f32", + "f32", "i32", "i32" ], "results": [ - "i32", - "i32", - "i32", - "i32" + "f32", + "f32", + "f32", + "f32" ], "properties": [ - "ImmArg", + "ImmArg", "IntrNoCallback", "IntrNoMem", - "Range" + "Range" ], "result_facts": { "no_undef": false, @@ -191359,7 +193924,7 @@ } ] }, - "ptx_result": "[i32; 4]", + "ptx_result": "[f32; 4]", "targets": "all", "ptx_isa_version": "9.3", "ptx_isa_section": "9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp", @@ -191402,11 +193967,11 @@ "sm_80", "ptx71" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "eight standard-metadata sparse floating inline PTX forms lowered for sm_80 at PTX ISA 7.1", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 a3f0063a7b3cacd62f63384b92d8719e8a4697c12df321ff9a1d5dece0e84d13.", + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -191417,15 +193982,15 @@ "sm_80", "ptx71" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "PTX for the eight standard-metadata sparse floating MMA forms assembled for sm_80", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 ff140019dd06530e11bd9507f0e371f07c5d88300c8dbbcd619681437d175825.", - "artifact_kind": null, + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", + "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" } ] }, @@ -191449,18 +194014,18 @@ "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", "build_id_prefix": "2330c0", - "status": "validated", + "status": "executed", "stages": [ { "targets": [ "compute_80", "ptx93" ], - "representation": "convergent base sparse m16n8k64 unsigned saturating INT8 inline PTX in the combined coverage kernel", + "representation": "eight convergent side-effecting standard-metadata sparse floating inline PTX calls", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "The production generated_intrinsics route produced 269,916-byte compute_80 NVVM IR with SHA-256 976d4c2cb32144fc4c6c9923096685fbe1f34306bdcfd2b9b706764508183b78 and 75,912-byte LTOIR with SHA-256 bf01957e2400a1ba5a82246a85b584c1964536bf529a581b64ef4192e2b8a157. All eight raw variants and two compatibility-path calls use compile-time selector 0.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -191471,34 +194036,64 @@ "sm_80", "ptx93" ], - "representation": "combined sparse INT8 coverage kernel with standard m16n8k64 calls", + "representation": "PTX containing all eight standard sparse floating MMA forms", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", + "artifact_kind": "cubin", + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "libNVVM output for all eight standard sparse floating MMA forms linked to one sm_80 cubin", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "nvJitLink produced a 25,192-byte cubin with SHA-256 c1f9df611c9a113b3830ee6f837232382b95f104c4928668af27a181162afebb. Disassembly contained 40 IMMA.SP instructions: exactly 20 IMMA.SP.16864 instructions (10 new standard calls plus 10 existing ordered calls) and 20 IMMA.SP.16832 instructions.", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", "artifact_kind": "cubin", "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", "tool_version": "V13.3.33", "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + }, + { + "targets": [ + "sm_120", + "ptx93" + ], + "representation": "all eight standard sparse floating MMA APIs, every legal selector, checked on all 32 lanes against a host GEMM", + "stage": "runtime", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms.", + "artifact_kind": null, + "tool_path": null, + "tool_version": null, + "tool_sha256": null } ] } ], "sparse_mma": { - "shape": "m16n8k64", - "accumulator": "s32", - "a_element": "u8", - "b_element": "u8", + "shape": "m16n8k8", + "accumulator": "f32", + "a_element": "tf32", + "b_element": "tf32", "a_layout": "row", "b_layout": "col", - "overflow": "satfinite", + "overflow": "not_applicable", "metadata": "standard", - "selector": "immediate_zero", + "selector": "immediate_zero_through_three", "participation": "all_warp_lanes_same_instruction_and_qualifiers_no_exited_lanes", - "adapter": "c4_i32_a4_u32_b4_u32_metadata_u32_selector_u32_to_d4_i32", - "llvm_adapter": "a4_i32_b4_i32_c4_i32_metadata_i32_selector_i32_to_d4_i32", + "adapter": "c4_f32_a2_u32_b2_u32_metadata_u32_selector_u32_to_d4_f32", + "llvm_adapter": "a2_i32_b2_i32_c4_f32_metadata_i32_selector_i32_to_d4_f32", "compatibility_source": "generated_stub", - "runtime_validation": "unexecuted" + "runtime_validation": "executed" }, "lowering": "generated_sparse_mma", "expected_ptx": { @@ -191507,14 +194102,13 @@ "sp", "sync", "aligned", - "m16n8k64", + "m16n8k8", "row", "col", - "satfinite", - "s32", - "u8", - "u8", - "s32" + "f32", + "tf32", + "tf32", + "f32" ], "operands": [ { @@ -191523,11 +194117,11 @@ }, { "kind": "register_list", - "length": 4 + "length": 2 }, { "kind": "register_list", - "length": 4 + "length": 2 }, { "kind": "register_list", @@ -191541,7 +194135,7 @@ } ] }, - "summary": "Multiplies warp-distributed sparse unsigned A and unsigned B INT8 fragments and adds a saturating s32 accumulator." + "summary": "Multiplies warp-distributed sparse tf32 A and B fragments and adds a f32 accumulator." }, { "id": "mma_sp_ordered_metadata_m16n8k128_s32_s4", diff --git a/cuda-oxide/intrinsics/evidence/cuda-13.3-libnvvm-13.3.33-sparse-mma-ampere-float.json b/cuda-oxide/intrinsics/evidence/cuda-13.3-libnvvm-13.3.33-sparse-mma-ampere-float.json new file mode 100644 index 0000000000..8ee7062bda --- /dev/null +++ b/cuda-oxide/intrinsics/evidence/cuda-13.3-libnvvm-13.3.33-sparse-mma-ampere-float.json @@ -0,0 +1,713 @@ +{ + "schema": 6, + "backend_profile": "cuda-13.3-libnvvm-13.3.33", + "backend_kind": "lib_nvvm", + "llvm_revision": "not-applicable-libnvvm-ir-2.0", + "backend_version": "CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33", + "backend_sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", + "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", + "build_id_prefix": "2330c0", + "nvvm_ir_version": "2.0", + "debug_ir_version": "3.2", + "defaults": { + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_80", + "ptx_feature": "PTX ISA 7.1 minimum; CUDA 13.3 emits PTX 9.3", + "status": "executed", + "runtime_validation": "executed" + }, + "fixtures": [ + { + "id": "ampere_float_all", + "coverage_count": 8, + "stages": [ + { + "targets": [ + "compute_80", + "ptx93" + ], + "representation": "eight convergent side-effecting standard-metadata sparse floating inline PTX calls", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33." + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "PTX containing all eight standard sparse floating MMA forms", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + }, + { + "targets": [ + "sm_80", + "ptx93" + ], + "representation": "libNVVM output for all eight standard sparse floating MMA forms linked to one sm_80 cubin", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33.", + "tool_path": "/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33", + "tool_version": "V13.3.33", + "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + }, + { + "targets": [ + "sm_120", + "ptx93" + ], + "representation": "all eight standard sparse floating MMA APIs, every legal selector, checked on all 32 lanes against a host GEMM", + "stage": "runtime", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms." + } + ] + } + ], + "matrices": [ + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k8_f32_tf32" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k8_row_col_tf32", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k8.row.col.tf32", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k8", + "row", + "col", + "f32", + "tf32", + "tf32", + "f32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "i32", + "i32", + "i32", + "i32", + "f32", + "f32", + "f32", + "f32", + "i32", + "i32" + ], + "llvm_results": [ + "f32", + "f32", + "f32", + "f32" + ] + } + } + }, + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k16_f32_tf32" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k16_row_col_tf32", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k16.row.col.tf32", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k16", + "row", + "col", + "f32", + "tf32", + "tf32", + "f32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "f32", + "f32", + "f32", + "f32", + "i32", + "i32" + ], + "llvm_results": [ + "f32", + "f32", + "f32", + "f32" + ] + } + } + }, + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k16_f32_bf16" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k16_row_col_bf16", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k16.row.col.bf16", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k16", + "row", + "col", + "f32", + "bf16", + "bf16", + "f32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "i32", + "i32", + "i32", + "i32", + "f32", + "f32", + "f32", + "f32", + "i32", + "i32" + ], + "llvm_results": [ + "f32", + "f32", + "f32", + "f32" + ] + } + } + }, + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k16_f16_f16" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k16_row_col_f16_f16", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k16.row.col.f16.f16", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k16", + "row", + "col", + "f16", + "f16", + "f16", + "f16" + ], + "operands": [ + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "i32", + "i32" + ], + "llvm_results": [ + "v2f16", + "v2f16" + ] + } + } + }, + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k16_f32_f16" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k16_row_col_f32_f32", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k16.row.col.f32.f32", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k16", + "row", + "col", + "f32", + "f16", + "f16", + "f32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "f32", + "f32", + "f32", + "f32", + "i32", + "i32" + ], + "llvm_results": [ + "f32", + "f32", + "f32", + "f32" + ] + } + } + }, + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k32_f32_bf16" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_bf16", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.bf16", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "f32", + "bf16", + "bf16", + "f32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "f32", + "f32", + "f32", + "f32", + "i32", + "i32" + ], + "llvm_results": [ + "f32", + "f32", + "f32", + "f32" + ] + } + } + }, + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k32_f16_f16" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_f16_f16", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.f16.f16", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "f16", + "f16", + "f16", + "f16" + ], + "operands": [ + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "i32", + "i32" + ], + "llvm_results": [ + "v2f16", + "v2f16" + ] + } + } + }, + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k32_f32_f16" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_f32_f32", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.f32.f32", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "f32", + "f16", + "f16", + "f32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "f32", + "f32", + "f32", + "f32", + "i32", + "i32" + ], + "llvm_results": [ + "f32", + "f32", + "f32", + "f32" + ] + } + } + } + ] +} diff --git a/cuda-oxide/intrinsics/evidence/rust-llvm-23.1.3-aab11ee0-sparse-mma-ampere-float.json b/cuda-oxide/intrinsics/evidence/rust-llvm-23.1.3-aab11ee0-sparse-mma-ampere-float.json new file mode 100644 index 0000000000..b6dd733f3d --- /dev/null +++ b/cuda-oxide/intrinsics/evidence/rust-llvm-23.1.3-aab11ee0-sparse-mma-ampere-float.json @@ -0,0 +1,683 @@ +{ + "schema": 6, + "backend_profile": "rust-llvm-23.1.3-aab11ee0", + "backend_kind": "llvm_nvptx", + "llvm_revision": "aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019", + "backend_version": "LLVM version 23.1.3-rust-1.101.0-nightly", + "backend_sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", + "defaults": { + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_80", + "ptx_feature": "+ptx71", + "status": "validated", + "runtime_validation": "unexecuted" + }, + "fixtures": [ + { + "id": "ampere_float_all", + "coverage_count": 8, + "stages": [ + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "eight standard-metadata sparse floating inline PTX forms lowered for sm_80 at PTX ISA 7.1", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds." + }, + { + "targets": [ + "sm_80", + "ptx71" + ], + "representation": "PTX for the eight standard-metadata sparse floating MMA forms assembled for sm_80", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds.", + "tool_path": "/usr/local/cuda-13.3/bin/ptxas", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.33", + "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + } + ] + } + ], + "matrices": [ + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k8_f32_tf32" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k8_row_col_tf32", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k8.row.col.tf32", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k8", + "row", + "col", + "f32", + "tf32", + "tf32", + "f32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": 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}, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "f32", + "f32", + "f32", + "f32", + "i32", + "i32" + ], + "llvm_results": [ + "f32", + "f32", + "f32", + "f32" + ] + } + } + }, + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k16_f32_bf16" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k16_row_col_bf16", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k16.row.col.bf16", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k16", + "row", + "col", + "f32", + "bf16", + "bf16", + "f32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "i32", + "i32", + "i32", + "i32", + "f32", + "f32", + "f32", + "f32", + "i32", + "i32" + ], + "llvm_results": [ + "f32", + "f32", + "f32", + "f32" + ] + } + } + }, + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k16_f16_f16" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k16_row_col_f16_f16", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k16.row.col.f16.f16", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k16", + "row", + "col", + "f16", + "f16", + "f16", + "f16" + ], + "operands": [ + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "i32", + "i32" + ], + "llvm_results": [ + "v2f16", + "v2f16" + ] + } + } + }, + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k16_f32_f16" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k16_row_col_f32_f32", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k16.row.col.f32.f32", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k16", + "row", + "col", + "f32", + "f16", + "f16", + "f32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "f32", + "f32", + "f32", + "f32", + "i32", + "i32" + ], + "llvm_results": [ + "f32", + "f32", + "f32", + "f32" + ] + } + } + }, + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k32_f32_bf16" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_bf16", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.bf16", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "f32", + "bf16", + "bf16", + "f32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "i32", + "f32", + "f32", + "f32", + "f32", + "i32", + "i32" + ], + "llvm_results": [ + "f32", + "f32", + "f32", + "f32" + ] + } + } + }, + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k32_f16_f16" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_f16_f16", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.f16.f16", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "f16", + "f16", + "f16", + "f16" + ], + "operands": [ + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 2 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "i32", + "i32" + ], + "llvm_results": [ + "v2f16", + "v2f16" + ] + } + } + }, + { + "axes": [ + { + "name": "variant", + "values": [ + "mma_sp_m16n8k32_f32_f16" + ] + } + ], + "product_count": 1, + "fixtures": [ + "ampere_float_all" + ], + "template": { + "id": "${variant}", + "source_record": "int_nvvm_mma_sp_m16n8k32_row_col_f32_f32", + "llvm_symbol": "llvm.nvvm.mma.sp.m16n8k32.row.col.f32.f32", + "expected_ptx": { + "mnemonic": "mma", + "modifiers": [ + "sp", + "sync", + "aligned", + "m16n8k32", + "row", + "col", + "f32", + "f16", + "f16", + "f32" + ], + "operands": [ + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register_list", + "length": 4 + }, + { + "kind": "register" + }, + { + "kind": "immediate" + } + ] + }, + "facts": { + "llvm_arguments": [ + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "v2f16", + "f32", + "f32", + "f32", + "f32", + "i32", + "i32" + ], + "llvm_results": [ + "f32", + "f32", + "f32", + "f32" + ] + } + } + } + ] +} diff --git a/cuda-oxide/intrinsics/generated-reference.md b/cuda-oxide/intrinsics/generated-reference.md index 89e71cc573..79277f46fc 100644 --- a/cuda-oxide/intrinsics/generated-reference.md +++ b/cuda-oxide/intrinsics/generated-reference.md @@ -2,7 +2,7 @@ SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. SPDX-License-Identifier: Apache-2.0 @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. --> @@ -567,6 +567,13 @@ This table is generated from the resolved catalog. Evidence stages below disting | `cuda_intrinsics::matrix::mma_sp_m16n8k128_s32_u4_s4` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k128.row.col.u4.s4` from `int_nvvm_mma_sp_m16n8k128_row_col_u4_s4` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k128.row.col.s32.u4.s4.s32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::matrix::mma_sp_m16n8k128_s32_u4_s4_satfinite` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k128.row.col.satfinite.u4.s4` from `int_nvvm_mma_sp_m16n8k128_row_col_satfinite_u4_s4` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k128.row.col.satfinite.s32.u4.s4.s32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::matrix::mma_sp_m16n8k128_s32_u4_satfinite` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k128.row.col.satfinite.u4` from `int_nvvm_mma_sp_m16n8k128_row_col_satfinite_u4` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k128.row.col.satfinite.s32.u4.u4.s32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::matrix::mma_sp_m16n8k16_f16_f16` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k16.row.col.f16.f16` from `int_nvvm_mma_sp_m16n8k16_row_col_f16_f16` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k16.row.col.f16.f16.f16.f16 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_bf16` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k16.row.col.bf16` from `int_nvvm_mma_sp_m16n8k16_row_col_bf16` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k16.row.col.f32.bf16.bf16.f32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_f16` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k16.row.col.f32.f32` from `int_nvvm_mma_sp_m16n8k16_row_col_f32_f32` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_tf32` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k16.row.col.tf32` from `int_nvvm_mma_sp_m16n8k16_row_col_tf32` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k16.row.col.f32.tf32.tf32.f32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::matrix::mma_sp_m16n8k32_f16_f16` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k32.row.col.f16.f16` from `int_nvvm_mma_sp_m16n8k32_row_col_f16_f16` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k32.row.col.f16.f16.f16.f16 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::matrix::mma_sp_m16n8k32_f32_bf16` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k32.row.col.bf16` from `int_nvvm_mma_sp_m16n8k32_row_col_bf16` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k32.row.col.f32.bf16.bf16.f32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::matrix::mma_sp_m16n8k32_f32_f16` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k32.row.col.f32.f32` from `int_nvvm_mma_sp_m16n8k32_row_col_f32_f32` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k32.row.col.s8` from `int_nvvm_mma_sp_m16n8k32_row_col_s8` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k32.row.col.s32.s8.s8.s32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8_satfinite` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k32.row.col.satfinite.s8` from `int_nvvm_mma_sp_m16n8k32_row_col_satfinite_s8` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k32.row.col.satfinite.s32.s8.s8.s32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8_u8` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k32.row.col.s8.u8` from `int_nvvm_mma_sp_m16n8k32_row_col_s8_u8` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k32.row.col.s32.s8.u8.s32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | @@ -595,6 +602,7 @@ This table is generated from the resolved catalog. Evidence stages below disting | `cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8_s8` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k64.row.col.u8.s8` from `int_nvvm_mma_sp_m16n8k64_row_col_u8_s8` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k64.row.col.s32.u8.s8.s32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8_s8_satfinite` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u8.s8` from `int_nvvm_mma_sp_m16n8k64_row_col_satfinite_u8_s8` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.u8.s8.s32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8_satfinite` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u8` from `int_nvvm_mma_sp_m16n8k64_row_col_satfinite_u8` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.u8.u8.s32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::matrix::mma_sp_m16n8k8_f32_tf32` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.m16n8k8.row.col.tf32` from `int_nvvm_mma_sp_m16n8k8_row_col_tf32` | unsafe; scope warp; impure; memory none; convergent true | PTX 7.1 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::matrix::mma_sp_ordered_metadata_m16n8k128_s32_s4` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.ordered.metadata.m16n8k128.row.col.s4` from `int_nvvm_mma_sp_ordered_metadata_m16n8k128_row_col_s4` | unsafe; scope warp; impure; memory none; convergent true | PTX 8.5 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp::ordered_metadata.sync.aligned.m16n8k128.row.col.s32.s4.s4.s32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::matrix::mma_sp_ordered_metadata_m16n8k128_s32_s4_satfinite` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.ordered.metadata.m16n8k128.row.col.satfinite.s4` from `int_nvvm_mma_sp_ordered_metadata_m16n8k128_row_col_satfinite_s4` | unsafe; scope warp; impure; memory none; convergent true | PTX 8.5 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp::ordered_metadata.sync.aligned.m16n8k128.row.col.satfinite.s32.s4.s4.s32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::matrix::mma_sp_ordered_metadata_m16n8k128_s32_s4_u4` | `nvvm.sparse_mma` | LLVM `llvm.nvvm.mma.sp.ordered.metadata.m16n8k128.row.col.s4.u4` from `int_nvvm_mma_sp_ordered_metadata_m16n8k128_row_col_s4_u4` | unsafe; scope warp; impure; memory none; convergent true | PTX 8.5 on sm_80+ ([PTX ISA 9.3, 9.7.15.6.3 Multiply-and-Accumulate Instruction: mma.sp](https://docs.nvidia.com/cuda/parallel-thread-execution/#warp-level-matrix-instructions-mma-sp)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mma.sp::ordered_metadata.sync.aligned.m16n8k128.row.col.s32.s4.u4.s32 , , , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | @@ -3278,6 +3286,34 @@ This table is generated from the resolved catalog. Evidence stages below disting - canonical compiler path: `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0225` - public source path: `cuda_intrinsics::matrix::mma_sp_m16n8k128_s32_u4_satfinite` - compatibility compiler path: `cuda_device::wmma::mma_sp_m16n8k128_s32_u4_satfinite` +- `mma_sp_m16n8k16_f16_f16` (`i1042`) + - canonical compiler path: `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1042` + - public source path: `cuda_intrinsics::matrix::mma_sp_m16n8k16_f16_f16` + - compatibility compiler path: `cuda_device::wmma::mma_sp_m16n8k16_f16_f16` +- `mma_sp_m16n8k16_f32_bf16` (`i1041`) + - canonical compiler path: `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1041` + - public source path: `cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_bf16` + - compatibility compiler path: `cuda_device::wmma::mma_sp_m16n8k16_f32_bf16` +- `mma_sp_m16n8k16_f32_f16` (`i1043`) + - canonical compiler path: `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1043` + - public source path: `cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_f16` + - compatibility compiler path: `cuda_device::wmma::mma_sp_m16n8k16_f32_f16` +- `mma_sp_m16n8k16_f32_tf32` (`i1040`) + - canonical compiler path: `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1040` + - public source path: `cuda_intrinsics::matrix::mma_sp_m16n8k16_f32_tf32` + - compatibility compiler path: `cuda_device::wmma::mma_sp_m16n8k16_f32_tf32` +- `mma_sp_m16n8k32_f16_f16` (`i1045`) + - canonical compiler path: `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1045` + - public source path: `cuda_intrinsics::matrix::mma_sp_m16n8k32_f16_f16` + - compatibility compiler path: `cuda_device::wmma::mma_sp_m16n8k32_f16_f16` +- `mma_sp_m16n8k32_f32_bf16` (`i1044`) + - canonical compiler path: `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1044` + - public source path: `cuda_intrinsics::matrix::mma_sp_m16n8k32_f32_bf16` + - compatibility compiler path: `cuda_device::wmma::mma_sp_m16n8k32_f32_bf16` +- `mma_sp_m16n8k32_f32_f16` (`i1046`) + - canonical compiler path: `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1046` + - public source path: `cuda_intrinsics::matrix::mma_sp_m16n8k32_f32_f16` + - compatibility compiler path: `cuda_device::wmma::mma_sp_m16n8k32_f32_f16` - `mma_sp_m16n8k32_s32_s8` (`i0163`) - canonical compiler path: `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0163` - public source path: `cuda_intrinsics::matrix::mma_sp_m16n8k32_s32_s8` @@ -3390,6 +3426,10 @@ This table is generated from the resolved catalog. Evidence stages below disting - canonical compiler path: `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0193` - public source path: `cuda_intrinsics::matrix::mma_sp_m16n8k64_s32_u8_satfinite` - compatibility compiler path: `cuda_device::wmma::mma_sp_m16n8k64_s32_u8_satfinite` +- `mma_sp_m16n8k8_f32_tf32` (`i1039`) + - canonical compiler path: `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i1039` + - public source path: `cuda_intrinsics::matrix::mma_sp_m16n8k8_f32_tf32` + - compatibility compiler path: `cuda_device::wmma::mma_sp_m16n8k8_f32_tf32` - `mma_sp_ordered_metadata_m16n8k128_s32_s4` (`i0203`) - canonical compiler path: `cuda_intrinsics::__cuda_oxide_intrinsic_abi_v1::i0203` - public source path: `cuda_intrinsics::matrix::mma_sp_ordered_metadata_m16n8k128_s32_s4` @@ -5386,6 +5426,13 @@ This table is generated from the resolved catalog. Evidence stages below disting - `mma_sp_m16n8k128_s32_u4_s4` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k128.row.col.s32.u4.s4.s32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. Integer overflow wraps. Runtime validation is not executed on a GPU. - `mma_sp_m16n8k128_s32_u4_s4_satfinite` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k128.row.col.satfinite.s32.u4.s4.s32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. Integer overflow uses finite saturation. Runtime validation is not executed on a GPU. - `mma_sp_m16n8k128_s32_u4_satfinite` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k128.row.col.satfinite.s32.u4.u4.s32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. Integer overflow uses finite saturation. Runtime validation is not executed on a GPU. +- `mma_sp_m16n8k16_f16_f16` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k16.row.col.f16.f16.f16.f16` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0`, `1`, `2`, or `3`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. Overflow mode is not applicable. Runtime validation is executed on a GPU. +- `mma_sp_m16n8k16_f32_bf16` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k16.row.col.f32.bf16.bf16.f32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0`, `1`, `2`, or `3`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. Overflow mode is not applicable. Runtime validation is executed on a GPU. +- `mma_sp_m16n8k16_f32_f16` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0`, `1`, `2`, or `3`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. Overflow mode is not applicable. Runtime validation is executed on a GPU. +- `mma_sp_m16n8k16_f32_tf32` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k16.row.col.f32.tf32.tf32.f32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0` or `1`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. Overflow mode is not applicable. Runtime validation is executed on a GPU. +- `mma_sp_m16n8k32_f16_f16` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k32.row.col.f16.f16.f16.f16` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0` or `1`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. Overflow mode is not applicable. Runtime validation is executed on a GPU. +- `mma_sp_m16n8k32_f32_bf16` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k32.row.col.f32.bf16.bf16.f32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0` or `1`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. Overflow mode is not applicable. Runtime validation is executed on a GPU. +- `mma_sp_m16n8k32_f32_f16` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0` or `1`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must be `0x4`, `0x6`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. Overflow mode is not applicable. Runtime validation is executed on a GPU. - `mma_sp_m16n8k32_s32_s8` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k32.row.col.s32.s8.s8.s32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0` or `1`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. Integer overflow wraps. Runtime validation is not executed on a GPU. - `mma_sp_m16n8k32_s32_s8_satfinite` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k32.row.col.satfinite.s32.s8.s8.s32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0` or `1`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. Integer overflow uses finite saturation. Runtime validation is not executed on a GPU. - `mma_sp_m16n8k32_s32_s8_u8` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k32.row.col.s32.s8.u8.s32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0` or `1`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. Integer overflow wraps. Runtime validation is not executed on a GPU. @@ -5414,6 +5461,7 @@ This table is generated from the resolved catalog. Evidence stages below disting - `mma_sp_m16n8k64_s32_u8_s8` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k64.row.col.s32.u8.s8.s32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. Integer overflow wraps. Runtime validation is not executed on a GPU. - `mma_sp_m16n8k64_s32_u8_s8_satfinite` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.u8.s8.s32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. Integer overflow uses finite saturation. Runtime validation is not executed on a GPU. - `mma_sp_m16n8k64_s32_u8_satfinite` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k64.row.col.satfinite.s32.u8.u8.s32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. Integer overflow uses finite saturation. Runtime validation is not executed on a GPU. +- `mma_sp_m16n8k8_f32_tf32` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0`, `1`, `2`, or `3`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must encode two distinct 2-bit indices; `0x0`, `0x5`, `0xa`, and `0xf` are undefined behavior. Overflow mode is not applicable. Runtime validation is executed on a GPU. - `mma_sp_ordered_metadata_m16n8k128_s32_s4` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp::ordered_metadata.sync.aligned.m16n8k128.row.col.s32.s4.s4.s32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must be `0x4`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. Integer overflow wraps. Runtime validation is not executed on a GPU. - `mma_sp_ordered_metadata_m16n8k128_s32_s4_satfinite` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp::ordered_metadata.sync.aligned.m16n8k128.row.col.satfinite.s32.s4.s4.s32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must be `0x4`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. Integer overflow uses finite saturation. Runtime validation is not executed on a GPU. - `mma_sp_ordered_metadata_m16n8k128_s32_s4_u4` takes fragments in C, A, B, metadata, selector order and lowers to one convergent, register-only `mma.sp::ordered_metadata.sync.aligned.m16n8k128.row.col.s32.s4.u4.s32` instruction. Its LLVM source record uses A, B, C, metadata, selector order. The selector must be the compile-time constant `0`. Every non-exited warp lane must execute the same instruction and qualifiers. Every 4-bit metadata group must be `0x4`, `0x8`, `0x9`, `0xc`, `0xd`, or `0xe`; any other value is undefined behavior. Integer overflow wraps. Runtime validation is not executed on a GPU. @@ -6322,6 +6370,13 @@ This table is generated from the resolved catalog. Evidence stages below disting - `mma_sp_m16n8k128_s32_u4_s4`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19422`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` - `mma_sp_m16n8k128_s32_u4_s4_satfinite`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19489`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` - `mma_sp_m16n8k128_s32_u4_satfinite`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19492`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` +- `mma_sp_m16n8k16_f16_f16`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19344`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` +- `mma_sp_m16n8k16_f32_bf16`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19308`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` +- `mma_sp_m16n8k16_f32_f16`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19348`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` +- `mma_sp_m16n8k16_f32_tf32`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19336`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` +- `mma_sp_m16n8k32_f16_f16`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19356`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` +- `mma_sp_m16n8k32_f32_bf16`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19322`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` +- `mma_sp_m16n8k32_f32_f16`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19360`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` - `mma_sp_m16n8k32_s32_s8`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19434`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` - `mma_sp_m16n8k32_s32_s8_satfinite`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19495`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` - `mma_sp_m16n8k32_s32_s8_u8`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19439`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` @@ -6350,6 +6405,7 @@ This table is generated from the resolved catalog. Evidence stages below disting - `mma_sp_m16n8k64_s32_u8_s8`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19464`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` - `mma_sp_m16n8k64_s32_u8_s8_satfinite`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19513`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` - `mma_sp_m16n8k64_s32_u8_satfinite`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19516`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` +- `mma_sp_m16n8k8_f32_tf32`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19330`; selection predicates `Subtarget->getPTXVersion() >= 71`, `Subtarget->getSmVersion() >= 80` - `mma_sp_ordered_metadata_m16n8k128_s32_s4`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19622`; selection predicates `Subtarget->getPTXVersion() >= 85`, `Subtarget->getSmVersion() >= 80` - `mma_sp_ordered_metadata_m16n8k128_s32_s4_satfinite`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19693`; selection predicates `Subtarget->getPTXVersion() >= 85`, `Subtarget->getSmVersion() >= 80` - `mma_sp_ordered_metadata_m16n8k128_s32_s4_u4`: properties `ImmArg`, `IntrNoCallback`, `IntrNoMem`, `Range`; result `NoUndef` false; half-open result range `none`; selection records `anonymous_19627`; selection predicates `Subtarget->getPTXVersion() >= 85`, `Subtarget->getSmVersion() >= 80` @@ -13411,6 +13467,69 @@ This table is generated from the resolved catalog. Evidence stages below disting - backend codegen on `compute_80, ptx93`: `succeeded` — The same 4,867-byte NVVM IR fixture (SHA-256 98ef7b8e03f9f690c118f360514f74e6da85151fd83b1be71c8b102083abb76e) passed CUDA 13.3 libNVVM and produced 3,811-byte NUL-terminated PTX (SHA-256 595ec2f639ccb02e83580254efa78758160ccb8148198a08b932b9f7e2962afa) containing all eight variants with selector 0. Every standard-metadata nibble must encode two distinct 2-bit indices; 0x0, 0x5, 0xa, and 0xf are undefined behavior. This record retained exact saturating u4-by-u4 PTX. Production cargo oxide emit-ltoir generated_intrinsics --arch=sm_80 emitted 374,720-byte NVVM IR (SHA-256 d8180177c4f4e54c641636f7d894fa01314ca6c9251a423ef9027e1985ae120b) and 104,032-byte LTOIR (SHA-256 9f451bb1d66eb39596d0639eb95cf2712e82975f518cf89829eaf18fb5fb15f0). Its 25-byte sm_80 target manifest (SHA-256 06ecfb1b0100fd9886f26871a9fc48350b612a35370b154b07d83a3a57fbbadb) and 49-byte compile-options file (SHA-256 069d630cf5359ec49a571d9074d106aeda207bc279693d2a9ce3c21b168ad03a) pin the production inputs. - PTX assembly on `sm_80, ptx93`: `succeeded` — After removing libNVVM's single trailing NUL, CUDA 13.3 ptxas accepted the 3,810-byte PTX (SHA-256 302d6da269cd36de7991678afcc1b0c13be08302e4338bf9a170831d0e7f4dea), issued only the ordered-metadata performance advisory, and produced a 4,008-byte cubin (SHA-256 dca42ca41d8127353ab0a9a2aa1673bc9d5a1deff86d0c0aed18b7b5c88c4572) with exactly eight IMMA.SP.168128 instructions. The PTX 7.0, sm_75, selector 1, and dynamic-selector negatives are recorded by the paired pinned-LLVM evidence. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `CUDA 13.3 V13.3.33 build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - device link on `sm_80, ptx93`: `succeeded` — The direct CUDA 13.3 libNVVM-to-nvJitLink route produced a 4,008-byte cubin with SHA-256 e304b99f1ddaddb561a7cf45c39fa3b97c5252091ffafbcca7577dfb60d395fc retaining exactly eight IMMA.SP.168128 instructions. Production linking of that LTOIR through the repository nvJitLink helper produced a 30,952-byte sm_80 cubin (SHA-256 9c9f270e43b9732e814f899d9aeba2dc6f20aef85769bc83eaae8e345cb82ae6). Independent 92,603-byte nvdisasm (SHA-256 dd862d50b376cc5ae8cd083b71d5da500a751b44c4016ab5d6b3c838960cbc7e) and 349,080-byte cuobjdump (SHA-256 44f234c740a4c6f1b3dd917b979a9f495e7e838343130185febc9c604a3e84ca) views each retained exactly 80 IMMA.SP instructions: 20 m16n8k32, 40 m16n8k64, and 20 m16n8k128. The 16 raw and four compatibility calls added by this batch account for 20 instructions. The coverage kernel is unlaunched, so runtime validation remains unexecuted. Tool `/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33` reports `V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. +- `mma_sp_m16n8k16_f16_f16`: runtime `executed` + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.1 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) + - backend codegen on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. + - PTX assembly on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33` at PTX 7.1 / sm_80+: status `executed` (`CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) + - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. + - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33` reports `V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - runtime on `sm_120, ptx93`: `succeeded` — Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms. +- `mma_sp_m16n8k16_f32_bf16`: runtime `executed` + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.1 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) + - backend codegen on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. + - PTX assembly on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33` at PTX 7.1 / sm_80+: status `executed` (`CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) + - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. + - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33` reports `V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - runtime on `sm_120, ptx93`: `succeeded` — Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms. +- `mma_sp_m16n8k16_f32_f16`: runtime `executed` + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.1 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) + - backend codegen on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. + - PTX assembly on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33` at PTX 7.1 / sm_80+: status `executed` (`CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) + - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. + - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33` reports `V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - runtime on `sm_120, ptx93`: `succeeded` — Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms. +- `mma_sp_m16n8k16_f32_tf32`: runtime `executed` + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.1 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) + - backend codegen on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. + - PTX assembly on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33` at PTX 7.1 / sm_80+: status `executed` (`CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) + - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. + - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33` reports `V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - runtime on `sm_120, ptx93`: `succeeded` — Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms. +- `mma_sp_m16n8k32_f16_f16`: runtime `executed` + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.1 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) + - backend codegen on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. + - PTX assembly on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33` at PTX 7.1 / sm_80+: status `executed` (`CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) + - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. + - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33` reports `V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - runtime on `sm_120, ptx93`: `succeeded` — Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms. +- `mma_sp_m16n8k32_f32_bf16`: runtime `executed` + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.1 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) + - backend codegen on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. + - PTX assembly on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33` at PTX 7.1 / sm_80+: status `executed` (`CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) + - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. + - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33` reports `V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - runtime on `sm_120, ptx93`: `succeeded` — Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms. +- `mma_sp_m16n8k32_f32_f16`: runtime `executed` + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.1 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) + - backend codegen on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. + - PTX assembly on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33` at PTX 7.1 / sm_80+: status `executed` (`CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) + - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. + - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33` reports `V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - runtime on `sm_120, ptx93`: `succeeded` — Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms. - `mma_sp_m16n8k32_s32_s8`: runtime `unexecuted` - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.1 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - backend codegen on `sm_80, ptx71`: `succeeded` — Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 6117422b739d9c39ae85c36a064b6ba0cfe6242cbd6c19fffe7ff68365e00a79. @@ -13619,6 +13738,15 @@ This table is generated from the resolved catalog. Evidence stages below disting - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33` at PTX 7.1 / sm_80+: status `validated` (`CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - backend codegen on `compute_80, ptx93`: `succeeded` — The production generated_intrinsics route produced 269,916-byte compute_80 NVVM IR with SHA-256 976d4c2cb32144fc4c6c9923096685fbe1f34306bdcfd2b9b706764508183b78 and 75,912-byte LTOIR with SHA-256 bf01957e2400a1ba5a82246a85b584c1964536bf529a581b64ef4192e2b8a157. All eight raw variants and two compatibility-path calls use compile-time selector 0. - device link on `sm_80, ptx93`: `succeeded` — nvJitLink produced a 25,192-byte cubin with SHA-256 c1f9df611c9a113b3830ee6f837232382b95f104c4928668af27a181162afebb. Disassembly contained 40 IMMA.SP instructions: exactly 20 IMMA.SP.16864 instructions (10 new standard calls plus 10 existing ordered calls) and 20 IMMA.SP.16832 instructions. Tool `/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33` reports `V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. +- `mma_sp_m16n8k8_f32_tf32`: runtime `executed` + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.1 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) + - backend codegen on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. + - PTX assembly on `sm_80, ptx71`: `succeeded` — Recorded on an RTX 5090 with nightly-2026-10-11 llc SHA-256 7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297, LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019). Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Selected-evidence probe assembled all eight forms for sm_80. ptxas advises that .sp::ordered_metadata may be faster later; assembly still succeeds. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33` at PTX 7.1 / sm_80+: status `executed` (`CUDA toolkit 13.3; nvcc/libNVVM release V13.3.33`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) + - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. + - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. + - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM /usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0 SHA-256 b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0 (build-id 2330c0a294e54b60289a15d6ac9270ffe49b25be) and nvJitLink /usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33 SHA-256 3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8. Terminal assembly is /usr/local/cuda-13.3/bin/ptxas SHA-256 7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb, CUDA 13.3 V13.3.33. Tool `/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33` reports `V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - runtime on `sm_120, ptx93`: `succeeded` — Executed through libNVVM cubin materialization on an RTX 5090 with CUDA 13.3 V13.3.33. Command: cargo oxide run sparse_mma_standard_float --arch sm_120 --materialize-cubin. Result: exit code 0; SUCCESS: all 8 variants; 24 selector calls; all 32 lanes and 4 logical accumulators/lane match host GEMM. The same example without --materialize-cubin also exited 0. 16-bit metadata used 0x4, 0x6, 0x8, 0x9, 0xc, 0xd, and 0xe. tf32 used 0x4 and 0xe. Selectors 0-3 ran for the 2-register forms and 0-1 for the 4-register forms. - `mma_sp_ordered_metadata_m16n8k128_s32_s4`: runtime `unexecuted` - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 8.5 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - backend codegen on `sm_80, ptx85`: `succeeded` — Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 7797f8b2f85799bd268bf06f71383c5e441791fb25d6c11afe368dde7b688f2a. diff --git a/cuda-oxide/intrinsics/overlay.toml b/cuda-oxide/intrinsics/overlay.toml index 540796cc07..4d2022eb5a 100644 --- a/cuda-oxide/intrinsics/overlay.toml +++ b/cuda-oxide/intrinsics/overlay.toml @@ -45,6 +45,7 @@ shards = [ "overlay/scalar_arithmetic.toml", "overlay/scalar_conversion.toml", "overlay/scalar_math.toml", + "overlay/sparse_mma_ampere_float.toml", "overlay/sparse_mma_fp8_f32.toml", "overlay/sparse_mma_int4_m16n8k128.toml", "overlay/sparse_mma_int4_m16n8k64.toml", diff --git a/cuda-oxide/intrinsics/overlay/sparse_mma_ampere_float.toml b/cuda-oxide/intrinsics/overlay/sparse_mma_ampere_float.toml new file mode 100644 index 0000000000..f35d975a6b --- /dev/null +++ b/cuda-oxide/intrinsics/overlay/sparse_mma_ampere_float.toml @@ -0,0 +1,51 @@ +# Reviewed Ampere floating-point sparse register-MMA family. +# This shard admits the standard-metadata forms. + +schema = 63 +family = "sparse_mma" + +[sparse_mma_ampere_float] +llvm_evidence_profile = "rust-llvm-23.1.3-aab11ee0" +libnvvm_evidence_profile = "cuda-13.3-libnvvm-13.3.33" +runtime_validation = "executed" +metadata = "standard" + +[[sparse_mma_ampere_float.variant]] +shape = "m16n8k8" +accumulator = "f32" +element = "tf32" + +[[sparse_mma_ampere_float.variant]] +shape = "m16n8k16" +accumulator = "f32" +element = "tf32" + +[[sparse_mma_ampere_float.variant]] +shape = "m16n8k16" +accumulator = "f32" +element = "bf16" + +[[sparse_mma_ampere_float.variant]] +shape = "m16n8k16" +accumulator = "f16" +element = "f16" + +[[sparse_mma_ampere_float.variant]] +shape = "m16n8k16" +accumulator = "f32" +element = "f16" + +[[sparse_mma_ampere_float.variant]] +shape = "m16n8k32" +accumulator = "f32" +element = "bf16" + +[[sparse_mma_ampere_float.variant]] +shape = "m16n8k32" +accumulator = "f16" +element = "f16" + +[[sparse_mma_ampere_float.variant]] +shape = "m16n8k32" +accumulator = "f32" +element = "f16" diff --git a/cuda-oxide/intrinsics/overlay/sparse_mma_ordered_ampere_float.toml b/cuda-oxide/intrinsics/overlay/sparse_mma_ordered_ampere_float.toml index 157f8d1819..36934c2676 100644 --- a/cuda-oxide/intrinsics/overlay/sparse_mma_ordered_ampere_float.toml +++ b/cuda-oxide/intrinsics/overlay/sparse_mma_ordered_ampere_float.toml @@ -1,49 +1,51 @@ -# Reviewed ordered-metadata sparse Ampere floating-point register-MMA family. +# Reviewed Ampere floating-point sparse register-MMA family. +# This shard admits the ordered-metadata forms. schema = 63 family = "sparse_mma" -[sparse_mma_ordered_ampere_float] +[sparse_mma_ampere_float] llvm_evidence_profile = "rust-llvm-23.1.3-aab11ee0" libnvvm_evidence_profile = "cuda-13.3-libnvvm-13.3.33" runtime_validation = "executed" +metadata = "ordered" -[[sparse_mma_ordered_ampere_float.variant]] +[[sparse_mma_ampere_float.variant]] shape = "m16n8k8" accumulator = "f32" element = "tf32" -[[sparse_mma_ordered_ampere_float.variant]] +[[sparse_mma_ampere_float.variant]] shape = "m16n8k16" accumulator = "f32" element = "tf32" -[[sparse_mma_ordered_ampere_float.variant]] +[[sparse_mma_ampere_float.variant]] shape = "m16n8k16" accumulator = "f32" element = "bf16" -[[sparse_mma_ordered_ampere_float.variant]] +[[sparse_mma_ampere_float.variant]] shape = "m16n8k16" accumulator = "f16" element = "f16" -[[sparse_mma_ordered_ampere_float.variant]] +[[sparse_mma_ampere_float.variant]] shape = "m16n8k16" accumulator = "f32" element = "f16" -[[sparse_mma_ordered_ampere_float.variant]] +[[sparse_mma_ampere_float.variant]] shape = "m16n8k32" accumulator = "f32" element = "bf16" -[[sparse_mma_ordered_ampere_float.variant]] +[[sparse_mma_ampere_float.variant]] shape = "m16n8k32" accumulator = "f16" element = "f16" -[[sparse_mma_ordered_ampere_float.variant]] +[[sparse_mma_ampere_float.variant]] shape = "m16n8k32" accumulator = "f32" element = "f16" diff --git a/cuda-oxide/intrinsics/probes/abs_bf16x2.ll b/cuda-oxide/intrinsics/probes/abs_bf16x2.ll index 820da2cd7c..61d4ca6ed3 100644 --- a/cuda-oxide/intrinsics/probes/abs_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/abs_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/abs_f16x2.ll b/cuda-oxide/intrinsics/probes/abs_f16x2.ll index a472207d53..5d29b60eb4 100644 --- a/cuda-oxide/intrinsics/probes/abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/active_mask.ll b/cuda-oxide/intrinsics/probes/active_mask.ll index 78ae6bfbea..5a6e766243 100644 --- a/cuda-oxide/intrinsics/probes/active_mask.ll +++ b/cuda-oxide/intrinsics/probes/active_mask.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_bf16x2.ll b/cuda-oxide/intrinsics/probes/add_bf16x2.ll index f0ca5a8a84..d2f54c92bb 100644 --- a/cuda-oxide/intrinsics/probes/add_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/add_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_f16x2.ll b/cuda-oxide/intrinsics/probes/add_f16x2.ll index 9fa3930d68..bb394f791e 100644 --- a/cuda-oxide/intrinsics/probes/add_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/add_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_f32x2.ll b/cuda-oxide/intrinsics/probes/add_f32x2.ll index 6c27ffb137..2be5f5353b 100644 --- a/cuda-oxide/intrinsics/probes/add_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/add_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_ftz_f32x2.ll b/cuda-oxide/intrinsics/probes/add_ftz_f32x2.ll index ee4cc26e22..ed9ed3de09 100644 --- a/cuda-oxide/intrinsics/probes/add_ftz_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/add_ftz_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rm_f32.ll b/cuda-oxide/intrinsics/probes/add_rm_f32.ll index 3944d0f157..b4db6c4159 100644 --- a/cuda-oxide/intrinsics/probes/add_rm_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rm_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rm_f64.ll b/cuda-oxide/intrinsics/probes/add_rm_f64.ll index 3c2230a38d..dbf37c8555 100644 --- a/cuda-oxide/intrinsics/probes/add_rm_f64.ll +++ b/cuda-oxide/intrinsics/probes/add_rm_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rm_ftz_f32.ll b/cuda-oxide/intrinsics/probes/add_rm_ftz_f32.ll index 2528af60c0..5bf35d1bf3 100644 --- a/cuda-oxide/intrinsics/probes/add_rm_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rm_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rm_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rm_ftz_sat_f32.ll index 169bf3d16a..6826bb1dbe 100644 --- a/cuda-oxide/intrinsics/probes/add_rm_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rm_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rm_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rm_sat_f32.ll index bb8dc7c0ef..c2a20c9293 100644 --- a/cuda-oxide/intrinsics/probes/add_rm_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rm_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rn_f32.ll b/cuda-oxide/intrinsics/probes/add_rn_f32.ll index 8ab8b0aca4..a5f98c8657 100644 --- a/cuda-oxide/intrinsics/probes/add_rn_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rn_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rn_f64.ll b/cuda-oxide/intrinsics/probes/add_rn_f64.ll index 9162055320..5898e7d8f8 100644 --- a/cuda-oxide/intrinsics/probes/add_rn_f64.ll +++ b/cuda-oxide/intrinsics/probes/add_rn_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rn_ftz_f32.ll b/cuda-oxide/intrinsics/probes/add_rn_ftz_f32.ll index aace593662..e5040ad0e3 100644 --- a/cuda-oxide/intrinsics/probes/add_rn_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rn_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rn_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rn_ftz_sat_f32.ll index 00bb90659c..b91d2abe04 100644 --- a/cuda-oxide/intrinsics/probes/add_rn_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rn_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rn_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rn_sat_f32.ll index f874a95749..47116aa6bf 100644 --- a/cuda-oxide/intrinsics/probes/add_rn_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rn_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rp_f32.ll b/cuda-oxide/intrinsics/probes/add_rp_f32.ll index b644bcd3a7..ac6814bae8 100644 --- a/cuda-oxide/intrinsics/probes/add_rp_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rp_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rp_f64.ll b/cuda-oxide/intrinsics/probes/add_rp_f64.ll index 0510ccadf3..66d9741c41 100644 --- a/cuda-oxide/intrinsics/probes/add_rp_f64.ll +++ b/cuda-oxide/intrinsics/probes/add_rp_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rp_ftz_f32.ll b/cuda-oxide/intrinsics/probes/add_rp_ftz_f32.ll index 1f759051bc..172eaa2c95 100644 --- a/cuda-oxide/intrinsics/probes/add_rp_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rp_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rp_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rp_ftz_sat_f32.ll index d29cbd0ebb..a90ddc1189 100644 --- a/cuda-oxide/intrinsics/probes/add_rp_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rp_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rp_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rp_sat_f32.ll index 9cbe69276f..cceb47b683 100644 --- a/cuda-oxide/intrinsics/probes/add_rp_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rp_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rz_f32.ll b/cuda-oxide/intrinsics/probes/add_rz_f32.ll index 82784ead93..a93b52523e 100644 --- a/cuda-oxide/intrinsics/probes/add_rz_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rz_f64.ll b/cuda-oxide/intrinsics/probes/add_rz_f64.ll index 0815886450..fb5cd822a1 100644 --- a/cuda-oxide/intrinsics/probes/add_rz_f64.ll +++ b/cuda-oxide/intrinsics/probes/add_rz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rz_ftz_f32.ll b/cuda-oxide/intrinsics/probes/add_rz_ftz_f32.ll index c416532d6b..833b9ae969 100644 --- a/cuda-oxide/intrinsics/probes/add_rz_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rz_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rz_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rz_ftz_sat_f32.ll index aead4e9b2a..58b81124e5 100644 --- a/cuda-oxide/intrinsics/probes/add_rz_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rz_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rz_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rz_sat_f32.ll index 084f43cb3c..4bd45a0b19 100644 --- a/cuda-oxide/intrinsics/probes/add_rz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/all_sync.ll b/cuda-oxide/intrinsics/probes/all_sync.ll index 00dc2ed640..2affd5f386 100644 --- a/cuda-oxide/intrinsics/probes/all_sync.ll +++ b/cuda-oxide/intrinsics/probes/all_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/any_sync.ll b/cuda-oxide/intrinsics/probes/any_sync.ll index d5bf201652..fce474e2f9 100644 --- a/cuda-oxide/intrinsics/probes/any_sync.ll +++ b/cuda-oxide/intrinsics/probes/any_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ballot_sync.ll b/cuda-oxide/intrinsics/probes/ballot_sync.ll index a017c0fa54..c26b3ab929 100644 --- a/cuda-oxide/intrinsics/probes/ballot_sync.ll +++ b/cuda-oxide/intrinsics/probes/ballot_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive.ll b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive.ll index 764b76308f..06d98a92cc 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_aligned.ll b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_aligned.ll index b4f26875fb..f3c0d0f4c4 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_aligned.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_aligned.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed.ll b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed.ll index f797c2aa94..95d8b72882 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed_aligned.ll b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed_aligned.ll index 9f71d3d41b..752f0ccb11 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed_aligned.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed_aligned.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cluster_wait.ll b/cuda-oxide/intrinsics/probes/barrier_cluster_wait.ll index 5e14c105ef..0cb5db9a2c 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cluster_wait.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cluster_wait.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cluster_wait_aligned.ll b/cuda-oxide/intrinsics/probes/barrier_cluster_wait_aligned.ll index 73ab667e1a..cf742fd2ef 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cluster_wait_aligned.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cluster_wait_aligned.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cta_arrive.ll b/cuda-oxide/intrinsics/probes/barrier_cta_arrive.ll index 28c6f73fe3..0a6977466e 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cta_arrive.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cta_arrive.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cta_arrive_aligned.ll b/cuda-oxide/intrinsics/probes/barrier_cta_arrive_aligned.ll index ed64c94d01..2c36cc1746 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cta_arrive_aligned.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cta_arrive_aligned.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cta_sync.ll b/cuda-oxide/intrinsics/probes/barrier_cta_sync.ll index 6afefcc045..631a472f28 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cta_sync.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cta_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cta_sync_aligned.ll b/cuda-oxide/intrinsics/probes/barrier_cta_sync_aligned.ll index 2cc957877c..618ad22dd0 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cta_sync_aligned.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cta_sync_aligned.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/block_dim_x.ll b/cuda-oxide/intrinsics/probes/block_dim_x.ll index 022094229c..565c4fe9d4 100644 --- a/cuda-oxide/intrinsics/probes/block_dim_x.ll +++ b/cuda-oxide/intrinsics/probes/block_dim_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/block_dim_y.ll b/cuda-oxide/intrinsics/probes/block_dim_y.ll index aa303d6692..03e0443558 100644 --- a/cuda-oxide/intrinsics/probes/block_dim_y.ll +++ b/cuda-oxide/intrinsics/probes/block_dim_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/block_dim_z.ll b/cuda-oxide/intrinsics/probes/block_dim_z.ll index 22d90f8ef5..ea7032d450 100644 --- a/cuda-oxide/intrinsics/probes/block_dim_z.ll +++ b/cuda-oxide/intrinsics/probes/block_dim_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/block_idx_x.ll b/cuda-oxide/intrinsics/probes/block_idx_x.ll index 42c728c512..547b235d5d 100644 --- a/cuda-oxide/intrinsics/probes/block_idx_x.ll +++ b/cuda-oxide/intrinsics/probes/block_idx_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/block_idx_y.ll b/cuda-oxide/intrinsics/probes/block_idx_y.ll index 6f7763ef82..00fd743d47 100644 --- a/cuda-oxide/intrinsics/probes/block_idx_y.ll +++ b/cuda-oxide/intrinsics/probes/block_idx_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/block_idx_z.ll b/cuda-oxide/intrinsics/probes/block_idx_z.ll index c8081bec0f..0907d16a8a 100644 --- a/cuda-oxide/intrinsics/probes/block_idx_z.ll +++ b/cuda-oxide/intrinsics/probes/block_idx_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/breakpoint.ll b/cuda-oxide/intrinsics/probes/breakpoint.ll index c4ff1b007b..9292252368 100644 --- a/cuda-oxide/intrinsics/probes/breakpoint.ll +++ b/cuda-oxide/intrinsics/probes/breakpoint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_x.ll b/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_x.ll index 73fdda8ed5..5eee827b9b 100644 --- a/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_x.ll +++ b/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_y.ll b/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_y.ll index 1cf38a69cf..f319afc064 100644 --- a/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_y.ll +++ b/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_z.ll b/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_z.ll index 8283db9162..7ee062f8ea 100644 --- a/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_z.ll +++ b/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clc_query_is_canceled.ll b/cuda-oxide/intrinsics/probes/clc_query_is_canceled.ll index 402e3e8279..c577669687 100644 --- a/cuda-oxide/intrinsics/probes/clc_query_is_canceled.ll +++ b/cuda-oxide/intrinsics/probes/clc_query_is_canceled.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clc_try_cancel.ll b/cuda-oxide/intrinsics/probes/clc_try_cancel.ll index 031a2f5bdd..9c72275ce6 100644 --- a/cuda-oxide/intrinsics/probes/clc_try_cancel.ll +++ b/cuda-oxide/intrinsics/probes/clc_try_cancel.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clc_try_cancel_multicast.ll b/cuda-oxide/intrinsics/probes/clc_try_cancel_multicast.ll index 9237e0413a..c0425b0cc8 100644 --- a/cuda-oxide/intrinsics/probes/clc_try_cancel_multicast.ll +++ b/cuda-oxide/intrinsics/probes/clc_try_cancel_multicast.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clock.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/clock.lib_nvvm.ll index 5695695933..d9f39565ff 100644 --- a/cuda-oxide/intrinsics/probes/clock.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/clock.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clock.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/clock.llvm_nvptx.ll index 11f3ed0c18..9ed7b2597f 100644 --- a/cuda-oxide/intrinsics/probes/clock.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/clock.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clock64.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/clock64.lib_nvvm.ll index 624fd8ade1..4fb4f621c2 100644 --- a/cuda-oxide/intrinsics/probes/clock64.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/clock64.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clock64.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/clock64.llvm_nvptx.ll index f279a6c0cf..1978e7768d 100644 --- a/cuda-oxide/intrinsics/probes/clock64.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/clock64.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_block_count.ll b/cuda-oxide/intrinsics/probes/cluster_block_count.ll index 60f0366d04..5e0de623e9 100644 --- a/cuda-oxide/intrinsics/probes/cluster_block_count.ll +++ b/cuda-oxide/intrinsics/probes/cluster_block_count.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_block_idx_x.ll b/cuda-oxide/intrinsics/probes/cluster_block_idx_x.ll index 0ff80c75b0..772a18ebc4 100644 --- a/cuda-oxide/intrinsics/probes/cluster_block_idx_x.ll +++ b/cuda-oxide/intrinsics/probes/cluster_block_idx_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_block_idx_y.ll b/cuda-oxide/intrinsics/probes/cluster_block_idx_y.ll index 7fb37142c0..86c2151cde 100644 --- a/cuda-oxide/intrinsics/probes/cluster_block_idx_y.ll +++ b/cuda-oxide/intrinsics/probes/cluster_block_idx_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_block_idx_z.ll b/cuda-oxide/intrinsics/probes/cluster_block_idx_z.ll index 32b6d9d566..2a0bcd467d 100644 --- a/cuda-oxide/intrinsics/probes/cluster_block_idx_z.ll +++ b/cuda-oxide/intrinsics/probes/cluster_block_idx_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_block_rank.ll b/cuda-oxide/intrinsics/probes/cluster_block_rank.ll index 1eacdf4d0f..29c2a7d28f 100644 --- a/cuda-oxide/intrinsics/probes/cluster_block_rank.ll +++ b/cuda-oxide/intrinsics/probes/cluster_block_rank.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_dim_x.ll b/cuda-oxide/intrinsics/probes/cluster_dim_x.ll index a4842de88a..fe7437cb94 100644 --- a/cuda-oxide/intrinsics/probes/cluster_dim_x.ll +++ b/cuda-oxide/intrinsics/probes/cluster_dim_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_dim_y.ll b/cuda-oxide/intrinsics/probes/cluster_dim_y.ll index 9d28b59894..2925b7fff3 100644 --- a/cuda-oxide/intrinsics/probes/cluster_dim_y.ll +++ b/cuda-oxide/intrinsics/probes/cluster_dim_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_dim_z.ll b/cuda-oxide/intrinsics/probes/cluster_dim_z.ll index dc47fe51cd..3fe795ba20 100644 --- a/cuda-oxide/intrinsics/probes/cluster_dim_z.ll +++ b/cuda-oxide/intrinsics/probes/cluster_dim_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_grid_dim_x.ll b/cuda-oxide/intrinsics/probes/cluster_grid_dim_x.ll index 5ff42e10cb..dd04c00859 100644 --- a/cuda-oxide/intrinsics/probes/cluster_grid_dim_x.ll +++ b/cuda-oxide/intrinsics/probes/cluster_grid_dim_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_grid_dim_y.ll b/cuda-oxide/intrinsics/probes/cluster_grid_dim_y.ll index abe0f43d82..635fe4c448 100644 --- a/cuda-oxide/intrinsics/probes/cluster_grid_dim_y.ll +++ b/cuda-oxide/intrinsics/probes/cluster_grid_dim_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_grid_dim_z.ll b/cuda-oxide/intrinsics/probes/cluster_grid_dim_z.ll index ca97f3df2e..3c270564c1 100644 --- a/cuda-oxide/intrinsics/probes/cluster_grid_dim_z.ll +++ b/cuda-oxide/intrinsics/probes/cluster_grid_dim_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_idx_x.ll b/cuda-oxide/intrinsics/probes/cluster_idx_x.ll index e11ea30a1c..b46e6b7490 100644 --- a/cuda-oxide/intrinsics/probes/cluster_idx_x.ll +++ b/cuda-oxide/intrinsics/probes/cluster_idx_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_idx_y.ll b/cuda-oxide/intrinsics/probes/cluster_idx_y.ll index 2777c5df96..4a9e24b235 100644 --- a/cuda-oxide/intrinsics/probes/cluster_idx_y.ll +++ b/cuda-oxide/intrinsics/probes/cluster_idx_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_idx_z.ll b/cuda-oxide/intrinsics/probes/cluster_idx_z.ll index 039ce17b8b..80f9c44ce3 100644 --- a/cuda-oxide/intrinsics/probes/cluster_idx_z.ll +++ b/cuda-oxide/intrinsics/probes/cluster_idx_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cos_approx_f32.ll b/cuda-oxide/intrinsics/probes/cos_approx_f32.ll index 0675b0f1fe..ce58e4f10e 100644 --- a/cuda-oxide/intrinsics/probes/cos_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/cos_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cos_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/cos_approx_ftz_f32.ll index b8a6f625ed..604922a74d 100644 --- a/cuda-oxide/intrinsics/probes/cos_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/cos_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_commit_group.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_commit_group.ll index e8b0451538..b7fa9d4564 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_commit_group.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_commit_group.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2.ll index 19776baa5b..98d9ff9e0b 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2_cache_hint.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2_cache_hint.ll index 54b15d66ab..02d7452d7a 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2_cache_hint.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2_cache_hint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2.ll index e457e55008..0306100587 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2_cache_hint.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2_cache_hint.ll index c72aeb7e52..ee2e5763c3 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2_cache_hint.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2_cache_hint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2.ll index 451e5314ec..ff0f3d8f7e 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2_cache_hint.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2_cache_hint.ll index 1ad9179720..86b2c69676 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2_cache_hint.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2_cache_hint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2.ll index 4356a27f33..8b124373bc 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2_cache_hint.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2_cache_hint.ll index 0ca03a58df..a59b0264de 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2_cache_hint.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2_cache_hint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2.ll index 82e3c4fbc7..58d6ab62da 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2_cache_hint.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2_cache_hint.ll index 6727dfda3c..292a0d673f 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2_cache_hint.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2_cache_hint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2.ll index 2dd482fb79..84a1be26fe 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2_cache_hint.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2_cache_hint.ll index 6c54777f8f..421eee9617 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2_cache_hint.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2_cache_hint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s.ll index 143d5c6544..450c1a81d5 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s_cta.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s_cta.ll index 198dcef1ca..1f11421339 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s_cta.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_s2g.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_s2g.ll index 86a5cae74f..964b26a856 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_s2g.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_s2g.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s.ll index f9f4258f60..898a694335 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_cta.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_cta.ll index 4541f5c353..30fc983b40 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_cta.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast.ll index 1663a58681..01e1ef4416 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast_cg2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast_cg2.ll index e350e5bcc1..67db003470 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast_cg2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_s2g.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_s2g.ll index f1aed32ce2..824e07e6b3 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_s2g.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_s2g.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s.ll index 334dfe2f19..af1d9cd538 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s_cta.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s_cta.ll index e96f9bd1fa..a1468c8d39 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s_cta.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_s2g.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_s2g.ll index 0d7790e089..94b103c21e 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_s2g.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_s2g.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s.ll index a83d95870a..bc85493b82 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s_cta.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s_cta.ll index 6e8e0536e1..5352abfe1a 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s_cta.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_s2g.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_s2g.ll index 504f42c556..1413c99871 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_s2g.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_s2g.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s.ll index db2d9fea87..1ea67427ea 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s_cta.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s_cta.ll index aefd2a6c2b..c79e5a89e9 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s_cta.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_s2g.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_s2g.ll index fefc23b963..2ece7615c2 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_s2g.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_s2g.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_3d.ll index 3f6cc751cf..89bfb67f08 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_4d.ll index 49d01972de..fc9fae6881 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_5d.ll index c55a9a87bd..34913ba6d5 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_1d.ll index 6fd6d887f6..2a1618b4f4 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_2d.ll index 782738a93c..3bd401f786 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_3d.ll index a616b818e9..2b1ab35458 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_4d.ll index d5a4254fbc..31c6dfbf52 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_5d.ll index 5499433179..c2b4fb88b8 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_3d.ll index 0e28b5dc10..d25620098c 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_4d.ll index 6da4c82cfe..81c880feec 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_5d.ll index 6ee26d2deb..130a4b1ff6 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_1d.ll index 3e0e5a9928..71619074e0 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_2d.ll index daf85deee2..60a3802a2d 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_3d.ll index 1b31def62f..69a8c3f08a 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_4d.ll index 9f6936620e..da3eab0f3f 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_5d.ll index a56b77315f..38ec7d3f32 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_3d.ll index 1ea027abf4..9649956562 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_4d.ll index f39c93200d..139a10fb47 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_5d.ll index de606a5e1b..472e970739 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_1d.ll index e1ec073004..7bde45c0ef 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_2d.ll index 8492dd2322..7ee5ef8375 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_3d.ll index e0f87bd8f2..b9c849ceec 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_4d.ll index a0ad8ba2f3..63ac19a624 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_5d.ll index aac7e57185..57bda9e65e 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_3d.ll index 01e0251b88..78ed5f8759 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_4d.ll index 62ef5d9a6a..2a8b1ff8c6 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_5d.ll index ef89be96b0..1df34b676d 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_1d.ll index 13c0041fdd..41e48990c9 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_2d.ll index 4a236f5b7d..f17b77eb6c 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_3d.ll index 154aaa53d5..ea11b2c3ff 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_4d.ll index 424d89ad0b..fee768a332 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_5d.ll index 1978038d93..89f3b62da3 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_3d.ll index dab178db1f..c8a078acdc 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_4d.ll index d9e1ffeb59..c99bc43b56 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_5d.ll index 0f60aefdda..9f3cfc3a5b 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_1d.ll index 989d157bf1..61350edb98 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_2d.ll index 6a13a239be..0a156aadc7 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_3d.ll index a8de199276..5b6554fe9c 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_4d.ll index a0fce79a4b..ccaf32c9b0 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_5d.ll index 3b64e74118..30c4fae639 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_3d.ll index 1fbcacdda8..d511ede819 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_4d.ll index 92bc066a81..ed52f89594 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_5d.ll index 1c1e79edbf..9a13aaec0c 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_1d.ll index c9f2e97c01..d700020c99 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_2d.ll index e79a0b7ddc..fda22586a4 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_3d.ll index ac675c6c16..4b068a8d3e 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_4d.ll index 27578f280b..d80f36eb8a 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_5d.ll index 588b368da1..d80a5ef718 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_3d.ll index 7b0065f40f..bec7352428 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_4d.ll index f77fe42d62..1b562680f4 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_5d.ll index c3143adebf..3ab77a3482 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_1d.ll index 95b0fa5cda..619b6b4c8e 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_2d.ll index eac17692a1..7b099b9d74 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_3d.ll index fcd5917043..edeade25fe 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_4d.ll index a3defa7000..d3f9c30173 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_5d.ll index 84d256a079..11fdca67b2 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_3d.ll index d4a206e011..cc810eebf0 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_4d.ll index aedccec68b..24eeeddb04 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_5d.ll index b3df5d2dcf..3f35224dea 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_1d.ll index 1309bf5067..59380e017d 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_2d.ll index 10319e3bc9..9a680c0af9 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_3d.ll index d318378499..98c7126e3a 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_4d.ll index 8b846b0c9a..41e7941477 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_5d.ll index 6e28fd0fbc..4d2f3e0f8c 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group.ll index 197d4a8578..bc5fe7fdf4 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group_read.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group_read.ll index 9c914461f0..aeece62acf 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group_read.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group_read.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_ca_16.ll b/cuda-oxide/intrinsics/probes/cp_async_ca_16.ll index bbdd14bd3b..b1bcbd925d 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_ca_16.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_ca_16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_ca_4.ll b/cuda-oxide/intrinsics/probes/cp_async_ca_4.ll index 90c55b92fe..60aeb82973 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_ca_4.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_ca_4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_ca_8.ll b/cuda-oxide/intrinsics/probes/cp_async_ca_8.ll index 13c66aa5d1..2781005802 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_ca_8.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_ca_8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_16.ll b/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_16.ll index d2cfaa697d..4b766852e3 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_16.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_4.ll b/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_4.ll index 094e03ee1a..c4c72c8de9 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_4.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_8.ll b/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_8.ll index b768cb2c46..c85d92a99d 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_8.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_cg_16.ll b/cuda-oxide/intrinsics/probes/cp_async_cg_16.ll index e036327eb3..f0a330e432 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_cg_16.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_cg_16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_cg_zfill_16.ll b/cuda-oxide/intrinsics/probes/cp_async_cg_zfill_16.ll index cf00f3d77c..9d7aeacbe5 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_cg_zfill_16.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_cg_zfill_16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_commit_group.ll b/cuda-oxide/intrinsics/probes/cp_async_commit_group.ll index a82681555b..3c3eb35dfb 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_commit_group.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_commit_group.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive.ll b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive.ll index 1fe8122db4..94660e6e9d 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc.ll b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc.ll index c16e0e2043..1019b4d892 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc_shared.ll b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc_shared.ll index 8db1ff3c75..8ccc18e2de 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc_shared.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc_shared.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_shared.ll b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_shared.ll index 3851a724dc..ef5c6d5255 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_shared.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_shared.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_wait_all.ll b/cuda-oxide/intrinsics/probes/cp_async_wait_all.ll index 4959db8bc9..ddf96f3b34 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_wait_all.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_wait_all.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_wait_group.ll b/cuda-oxide/intrinsics/probes/cp_async_wait_group.ll index 081e7abdf0..5315597c14 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_wait_group.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_wait_group.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_f16x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_f16x2_f32.ll index 80fb6654c0..acb9216260 100644 --- a/cuda-oxide/intrinsics/probes/cvt_f16x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_f16x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_f32x2_bf16x2.ll b/cuda-oxide/intrinsics/probes/cvt_f32x2_bf16x2.ll index c380cbf8e8..013b942334 100644 --- a/cuda-oxide/intrinsics/probes/cvt_f32x2_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_f32x2_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e4m3x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e4m3x2.ll index fb0f8d478f..eb43afd5d4 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e4m3x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e4m3x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e5m2x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e5m2x2.ll index cdcfa9ef18..7f02d19785 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e5m2x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e5m2x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_relu_bf16x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_relu_bf16x2_f32.ll index 55737d88d3..77dc6f02e3 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_relu_bf16x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_relu_bf16x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e4m3x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e4m3x2.ll index 46ff3d13c5..f12d3794c3 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e4m3x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e4m3x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e5m2x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e5m2x2.ll index f6539bf85c..6f2dee63ac 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e5m2x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e5m2x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_f32.ll index 3660acc6e6..c21dab49a9 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_relu_satfinite_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_relu_satfinite_tf32_f32.ll index 416c82bfbc..34fc9ba910 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_relu_satfinite_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_relu_satfinite_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_relu_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_relu_tf32_f32.ll index 28ee7f2d65..5f6f71b93a 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_relu_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_relu_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_bf16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_bf16x2.ll index 45aa0e44b7..b2704b4a35 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f16x2.ll index cbb4bb1148..13954467dc 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f32.ll index d7846400e3..dd028eabdc 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_bf16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_bf16x2.ll index ad1b240c31..bd53ee89c7 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f16x2.ll index 0f414d0a6c..0a0eb9161a 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f32.ll index 5b97418ccf..4356d758d8 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_bf16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_bf16x2.ll index 2b765743ee..73ed90d11a 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f16x2.ll index 769085d017..54f4c0c9e3 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f32.ll index 2579998f7e..3e31362d60 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_bf16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_bf16x2.ll index c4607e6c42..767780b0e5 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f16x2.ll index feb0ff82c8..39b2b748b2 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f32.ll index 6b96a5e543..62e932a186 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_tf32_f32.ll index 76a50f9d46..361df46759 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_tf32_f32.ll index fef72309e8..64271a6db5 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rna_satfinite_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rna_satfinite_tf32_f32.ll index ebfa1e9914..0cb76269ab 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rna_satfinite_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rna_satfinite_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rna_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rna_tf32_f32.ll index 8e101fd655..6de038b0bd 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rna_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rna_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rz_bf16x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rz_bf16x2_f32.ll index 3e02184eb8..fac5825eba 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rz_bf16x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rz_bf16x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rz_f16x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rz_f16x2_f32.ll index 4b2bfca6e3..25948e2a4a 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rz_f16x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rz_f16x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rz_relu_satfinite_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rz_relu_satfinite_tf32_f32.ll index 94165928d1..5f0053df5a 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rz_relu_satfinite_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rz_relu_satfinite_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rz_relu_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rz_relu_tf32_f32.ll index f348c2c5bb..eec12de938 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rz_relu_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rz_relu_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rz_satfinite_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rz_satfinite_tf32_f32.ll index c134f6928b..41b38ed86b 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rz_satfinite_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rz_satfinite_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rz_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rz_tf32_f32.ll index 58993a946a..135ce03e9e 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rz_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rz_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rm_f32.ll b/cuda-oxide/intrinsics/probes/div_rm_f32.ll index 13fa1b5166..a3dcb38a05 100644 --- a/cuda-oxide/intrinsics/probes/div_rm_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rm_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rm_f64.ll b/cuda-oxide/intrinsics/probes/div_rm_f64.ll index c4caf76234..7a231f5cb3 100644 --- a/cuda-oxide/intrinsics/probes/div_rm_f64.ll +++ b/cuda-oxide/intrinsics/probes/div_rm_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rm_ftz_f32.ll b/cuda-oxide/intrinsics/probes/div_rm_ftz_f32.ll index 7ea8060431..b16424abb8 100644 --- a/cuda-oxide/intrinsics/probes/div_rm_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rm_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rn_f32.ll b/cuda-oxide/intrinsics/probes/div_rn_f32.ll index cb5357a1ac..56096ad921 100644 --- a/cuda-oxide/intrinsics/probes/div_rn_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rn_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rn_f64.ll b/cuda-oxide/intrinsics/probes/div_rn_f64.ll index 372b90903a..8a129eb196 100644 --- a/cuda-oxide/intrinsics/probes/div_rn_f64.ll +++ b/cuda-oxide/intrinsics/probes/div_rn_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rn_ftz_f32.ll b/cuda-oxide/intrinsics/probes/div_rn_ftz_f32.ll index 7284ead82b..3fe6105a97 100644 --- a/cuda-oxide/intrinsics/probes/div_rn_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rn_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rp_f32.ll b/cuda-oxide/intrinsics/probes/div_rp_f32.ll index 2a7ce47506..92b82ce823 100644 --- a/cuda-oxide/intrinsics/probes/div_rp_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rp_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rp_f64.ll b/cuda-oxide/intrinsics/probes/div_rp_f64.ll index 51075dcc8f..908ac132c0 100644 --- a/cuda-oxide/intrinsics/probes/div_rp_f64.ll +++ b/cuda-oxide/intrinsics/probes/div_rp_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rp_ftz_f32.ll b/cuda-oxide/intrinsics/probes/div_rp_ftz_f32.ll index 47f1a4a8f9..b989e826d2 100644 --- a/cuda-oxide/intrinsics/probes/div_rp_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rp_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rz_f32.ll b/cuda-oxide/intrinsics/probes/div_rz_f32.ll index b487a3c6c6..63a09ce7d7 100644 --- a/cuda-oxide/intrinsics/probes/div_rz_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rz_f64.ll b/cuda-oxide/intrinsics/probes/div_rz_f64.ll index a62bb2962b..aba956caaf 100644 --- a/cuda-oxide/intrinsics/probes/div_rz_f64.ll +++ b/cuda-oxide/intrinsics/probes/div_rz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rz_ftz_f32.ll b/cuda-oxide/intrinsics/probes/div_rz_ftz_f32.ll index 00f547738c..a53103d27b 100644 --- a/cuda-oxide/intrinsics/probes/div_rz_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rz_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dp2a_s32.ll b/cuda-oxide/intrinsics/probes/dp2a_s32.ll index 75efd2e63e..8b4bcdb3d8 100644 --- a/cuda-oxide/intrinsics/probes/dp2a_s32.ll +++ b/cuda-oxide/intrinsics/probes/dp2a_s32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dp2a_u32.ll b/cuda-oxide/intrinsics/probes/dp2a_u32.ll index 9945eeb09e..0165585dc6 100644 --- a/cuda-oxide/intrinsics/probes/dp2a_u32.ll +++ b/cuda-oxide/intrinsics/probes/dp2a_u32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dp4a_s32.ll b/cuda-oxide/intrinsics/probes/dp4a_s32.ll index 5742562191..5b7c8618c6 100644 --- a/cuda-oxide/intrinsics/probes/dp4a_s32.ll +++ b/cuda-oxide/intrinsics/probes/dp4a_s32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dp4a_u32.ll b/cuda-oxide/intrinsics/probes/dp4a_u32.ll index 62df5e0e56..9b2801685b 100644 --- a/cuda-oxide/intrinsics/probes/dp4a_u32.ll +++ b/cuda-oxide/intrinsics/probes/dp4a_u32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dsmem_read_u32.ll b/cuda-oxide/intrinsics/probes/dsmem_read_u32.ll index f1ed7f12a4..756e4e6606 100644 --- a/cuda-oxide/intrinsics/probes/dsmem_read_u32.ll +++ b/cuda-oxide/intrinsics/probes/dsmem_read_u32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dynamic_smem_size.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/dynamic_smem_size.lib_nvvm.ll index 51b26b9bd6..503cfa4c23 100644 --- a/cuda-oxide/intrinsics/probes/dynamic_smem_size.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/dynamic_smem_size.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dynamic_smem_size.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/dynamic_smem_size.llvm_nvptx.ll index a280926328..f9d4fc9520 100644 --- a/cuda-oxide/intrinsics/probes/dynamic_smem_size.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/dynamic_smem_size.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/elect_sync.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/elect_sync.lib_nvvm.ll index 1de958889e..a9e203beee 100644 --- a/cuda-oxide/intrinsics/probes/elect_sync.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/elect_sync.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/elect_sync.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/elect_sync.llvm_nvptx.ll index 5b3c3faaa2..d24676e6be 100644 --- a/cuda-oxide/intrinsics/probes/elect_sync.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/elect_sync.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/envreg1.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/envreg1.lib_nvvm.ll index b5c52b0e24..35178f97fa 100644 --- a/cuda-oxide/intrinsics/probes/envreg1.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/envreg1.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/envreg1.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/envreg1.llvm_nvptx.ll index 430a1e6d5a..d048a77833 100644 --- a/cuda-oxide/intrinsics/probes/envreg1.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/envreg1.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/envreg2.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/envreg2.lib_nvvm.ll index 67d8884ac2..8a83be94c7 100644 --- a/cuda-oxide/intrinsics/probes/envreg2.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/envreg2.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/envreg2.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/envreg2.llvm_nvptx.ll index 0a9efe30b1..8aa9a39347 100644 --- a/cuda-oxide/intrinsics/probes/envreg2.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/envreg2.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ex2_approx_f16.ll b/cuda-oxide/intrinsics/probes/ex2_approx_f16.ll index 5dcea4ac91..7da8d27843 100644 --- a/cuda-oxide/intrinsics/probes/ex2_approx_f16.ll +++ b/cuda-oxide/intrinsics/probes/ex2_approx_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ex2_approx_f32.ll b/cuda-oxide/intrinsics/probes/ex2_approx_f32.ll index 0cf0ad6b79..7ef1fda081 100644 --- a/cuda-oxide/intrinsics/probes/ex2_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/ex2_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ex2_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/ex2_approx_ftz_f32.ll index b7ed4250c7..b875e81a80 100644 --- a/cuda-oxide/intrinsics/probes/ex2_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/ex2_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_mbarrier_init_release_cluster.ll b/cuda-oxide/intrinsics/probes/fence_mbarrier_init_release_cluster.ll index 865ff31e03..47fbde9f5a 100644 --- a/cuda-oxide/intrinsics/probes/fence_mbarrier_init_release_cluster.ll +++ b/cuda-oxide/intrinsics/probes/fence_mbarrier_init_release_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_acquire_shared_cluster_cluster.ll b/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_acquire_shared_cluster_cluster.ll index 75e705b8ba..02fc1c5b65 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_acquire_shared_cluster_cluster.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_acquire_shared_cluster_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_release_shared_cta_cluster.ll b/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_release_shared_cta_cluster.ll index 32c992abb6..bf95d86e48 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_release_shared_cta_cluster.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_release_shared_cta_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_async_shared_cta.ll b/cuda-oxide/intrinsics/probes/fence_proxy_async_shared_cta.ll index 16d376c8dc..4d6ffc023b 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_async_shared_cta.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_async_shared_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cluster.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cluster.ll index 0bef66fe0a..67498a8c5d 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cluster.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cta.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cta.ll index 4a9a065787..500c82510f 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cta.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_gpu.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_gpu.ll index 2568a347ea..632603d6cc 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_gpu.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_gpu.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_system.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_system.ll index 6b80b9fb75..9db2dcc613 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_system.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_system.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cluster.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cluster.ll index a6efc0edfc..1da2026f95 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cluster.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cta.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cta.ll index 895465fffc..638799c35e 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cta.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_gpu.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_gpu.ll index 0ba3e6ad24..9e8cf41bad 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_gpu.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_gpu.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_system.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_system.ll index 74c746b5b1..03208da216 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_system.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_system.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_bf16x2.ll b/cuda-oxide/intrinsics/probes/fma_bf16x2.ll index 014abe6957..82a505a048 100644 --- a/cuda-oxide/intrinsics/probes/fma_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_f16x2.ll b/cuda-oxide/intrinsics/probes/fma_f16x2.ll index bdb41f88dd..d15cbbe0a0 100644 --- a/cuda-oxide/intrinsics/probes/fma_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_f32x2.ll b/cuda-oxide/intrinsics/probes/fma_f32x2.ll index e3e8074186..aa248729b9 100644 --- a/cuda-oxide/intrinsics/probes/fma_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_ftz_f16x2.ll b/cuda-oxide/intrinsics/probes/fma_ftz_f16x2.ll index b707863b9e..9c99c76ff5 100644 --- a/cuda-oxide/intrinsics/probes/fma_ftz_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_ftz_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_ftz_f32x2.ll b/cuda-oxide/intrinsics/probes/fma_ftz_f32x2.ll index 934f363739..fe6d336fc9 100644 --- a/cuda-oxide/intrinsics/probes/fma_ftz_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_ftz_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_ftz_relu_f16x2.ll b/cuda-oxide/intrinsics/probes/fma_ftz_relu_f16x2.ll index 28510c79c6..c6a8df1260 100644 --- a/cuda-oxide/intrinsics/probes/fma_ftz_relu_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_ftz_relu_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_ftz_sat_f16x2.ll b/cuda-oxide/intrinsics/probes/fma_ftz_sat_f16x2.ll index 9ec7d657dd..a565ed6a27 100644 --- a/cuda-oxide/intrinsics/probes/fma_ftz_sat_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_ftz_sat_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_relu_bf16x2.ll b/cuda-oxide/intrinsics/probes/fma_relu_bf16x2.ll index 7c292042d7..e70d5bc535 100644 --- a/cuda-oxide/intrinsics/probes/fma_relu_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_relu_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_relu_f16x2.ll b/cuda-oxide/intrinsics/probes/fma_relu_f16x2.ll index 67e04d0911..8527ea2035 100644 --- a/cuda-oxide/intrinsics/probes/fma_relu_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_relu_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rm_f32.ll b/cuda-oxide/intrinsics/probes/fma_rm_f32.ll index 140e573b17..fe30a2f499 100644 --- a/cuda-oxide/intrinsics/probes/fma_rm_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rm_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rm_f64.ll b/cuda-oxide/intrinsics/probes/fma_rm_f64.ll index f458206f70..2bc76938cd 100644 --- a/cuda-oxide/intrinsics/probes/fma_rm_f64.ll +++ b/cuda-oxide/intrinsics/probes/fma_rm_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rm_ftz_f32.ll b/cuda-oxide/intrinsics/probes/fma_rm_ftz_f32.ll index f9ca898e94..b554e059c5 100644 --- a/cuda-oxide/intrinsics/probes/fma_rm_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rm_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rm_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rm_ftz_sat_f32.ll index 206a5e49cd..276c1b930b 100644 --- a/cuda-oxide/intrinsics/probes/fma_rm_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rm_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rm_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rm_sat_f32.ll index 18e6b6a71d..aee111fd9e 100644 --- a/cuda-oxide/intrinsics/probes/fma_rm_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rm_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rn_f32.ll b/cuda-oxide/intrinsics/probes/fma_rn_f32.ll index cc34bbe510..daa15c20fb 100644 --- a/cuda-oxide/intrinsics/probes/fma_rn_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rn_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rn_f64.ll b/cuda-oxide/intrinsics/probes/fma_rn_f64.ll index ef958696e4..7a656f536a 100644 --- a/cuda-oxide/intrinsics/probes/fma_rn_f64.ll +++ b/cuda-oxide/intrinsics/probes/fma_rn_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rn_ftz_f32.ll b/cuda-oxide/intrinsics/probes/fma_rn_ftz_f32.ll index 81042ca1dc..204678938d 100644 --- a/cuda-oxide/intrinsics/probes/fma_rn_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rn_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rn_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rn_ftz_sat_f32.ll index f18dea3c04..19b8b69cdc 100644 --- a/cuda-oxide/intrinsics/probes/fma_rn_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rn_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rn_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rn_sat_f32.ll index efcec7f83f..3b526aef07 100644 --- a/cuda-oxide/intrinsics/probes/fma_rn_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rn_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rp_f32.ll b/cuda-oxide/intrinsics/probes/fma_rp_f32.ll index b97a12e659..15941e7c2a 100644 --- a/cuda-oxide/intrinsics/probes/fma_rp_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rp_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rp_f64.ll b/cuda-oxide/intrinsics/probes/fma_rp_f64.ll index 13b595b78e..f910ee9310 100644 --- a/cuda-oxide/intrinsics/probes/fma_rp_f64.ll +++ b/cuda-oxide/intrinsics/probes/fma_rp_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rp_ftz_f32.ll b/cuda-oxide/intrinsics/probes/fma_rp_ftz_f32.ll index 2e047987bc..91381942a8 100644 --- a/cuda-oxide/intrinsics/probes/fma_rp_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rp_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rp_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rp_ftz_sat_f32.ll index b0079179ec..3dda0b89bb 100644 --- a/cuda-oxide/intrinsics/probes/fma_rp_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rp_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rp_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rp_sat_f32.ll index d7553215e9..c2d2d2871d 100644 --- a/cuda-oxide/intrinsics/probes/fma_rp_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rp_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rz_f32.ll b/cuda-oxide/intrinsics/probes/fma_rz_f32.ll index fd4981c84c..4fa8ae68ab 100644 --- a/cuda-oxide/intrinsics/probes/fma_rz_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rz_f64.ll b/cuda-oxide/intrinsics/probes/fma_rz_f64.ll index 5b76dde961..095adf230f 100644 --- a/cuda-oxide/intrinsics/probes/fma_rz_f64.ll +++ b/cuda-oxide/intrinsics/probes/fma_rz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rz_ftz_f32.ll b/cuda-oxide/intrinsics/probes/fma_rz_ftz_f32.ll index 4cf599af20..0c977c73c6 100644 --- a/cuda-oxide/intrinsics/probes/fma_rz_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rz_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rz_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rz_ftz_sat_f32.ll index 39395d569d..5a12daf755 100644 --- a/cuda-oxide/intrinsics/probes/fma_rz_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rz_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rz_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rz_sat_f32.ll index 7eb7d598f9..fba91e3a37 100644 --- a/cuda-oxide/intrinsics/probes/fma_rz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_sat_f16x2.ll b/cuda-oxide/intrinsics/probes/fma_sat_f16x2.ll index 4120affed4..6d2696f0ea 100644 --- a/cuda-oxide/intrinsics/probes/fma_sat_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_sat_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/globaltimer.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/globaltimer.lib_nvvm.ll index d214ef9515..f973fcad6f 100644 --- a/cuda-oxide/intrinsics/probes/globaltimer.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/globaltimer.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/globaltimer.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/globaltimer.llvm_nvptx.ll index 9d454060e8..e102c4587b 100644 --- a/cuda-oxide/intrinsics/probes/globaltimer.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/globaltimer.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/grid_dependency_launch_dependents.ll b/cuda-oxide/intrinsics/probes/grid_dependency_launch_dependents.ll index f4075fd2f3..682562604e 100644 --- a/cuda-oxide/intrinsics/probes/grid_dependency_launch_dependents.ll +++ b/cuda-oxide/intrinsics/probes/grid_dependency_launch_dependents.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/grid_dependency_wait.ll b/cuda-oxide/intrinsics/probes/grid_dependency_wait.ll index b053a739f0..575e679785 100644 --- a/cuda-oxide/intrinsics/probes/grid_dependency_wait.ll +++ b/cuda-oxide/intrinsics/probes/grid_dependency_wait.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/grid_dim_x.ll b/cuda-oxide/intrinsics/probes/grid_dim_x.ll index 7add5b72fa..30c5d4e9a9 100644 --- a/cuda-oxide/intrinsics/probes/grid_dim_x.ll +++ b/cuda-oxide/intrinsics/probes/grid_dim_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/grid_dim_y.ll b/cuda-oxide/intrinsics/probes/grid_dim_y.ll index 5a0c364ca5..90c622d129 100644 --- a/cuda-oxide/intrinsics/probes/grid_dim_y.ll +++ b/cuda-oxide/intrinsics/probes/grid_dim_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/grid_dim_z.ll b/cuda-oxide/intrinsics/probes/grid_dim_z.ll index 6f0cbaf6a6..85e69b7976 100644 --- a/cuda-oxide/intrinsics/probes/grid_dim_z.ll +++ b/cuda-oxide/intrinsics/probes/grid_dim_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/gridid.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/gridid.lib_nvvm.ll index 5ad009ed7c..0a06459705 100644 --- a/cuda-oxide/intrinsics/probes/gridid.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/gridid.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/gridid.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/gridid.llvm_nvptx.ll index 845b87c3a5..51e8293089 100644 --- a/cuda-oxide/intrinsics/probes/gridid.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/gridid.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lane_id.ll b/cuda-oxide/intrinsics/probes/lane_id.ll index c895b72fe4..9bb8717dbf 100644 --- a/cuda-oxide/intrinsics/probes/lane_id.ll +++ b/cuda-oxide/intrinsics/probes/lane_id.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lanemask_eq.ll b/cuda-oxide/intrinsics/probes/lanemask_eq.ll index 10f548da78..0e9c92f508 100644 --- a/cuda-oxide/intrinsics/probes/lanemask_eq.ll +++ b/cuda-oxide/intrinsics/probes/lanemask_eq.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lanemask_ge.ll b/cuda-oxide/intrinsics/probes/lanemask_ge.ll index e4d3a41cc2..3318abeea9 100644 --- a/cuda-oxide/intrinsics/probes/lanemask_ge.ll +++ b/cuda-oxide/intrinsics/probes/lanemask_ge.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lanemask_gt.ll b/cuda-oxide/intrinsics/probes/lanemask_gt.ll index 19b328a351..ef1d266061 100644 --- a/cuda-oxide/intrinsics/probes/lanemask_gt.ll +++ b/cuda-oxide/intrinsics/probes/lanemask_gt.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lanemask_le.ll b/cuda-oxide/intrinsics/probes/lanemask_le.ll index 64281c5dab..ec8b6e5636 100644 --- a/cuda-oxide/intrinsics/probes/lanemask_le.ll +++ b/cuda-oxide/intrinsics/probes/lanemask_le.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lanemask_lt.ll b/cuda-oxide/intrinsics/probes/lanemask_lt.ll index 11c24a0970..3c3396cccf 100644 --- a/cuda-oxide/intrinsics/probes/lanemask_lt.ll +++ b/cuda-oxide/intrinsics/probes/lanemask_lt.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8.ll index 6b5caa30c1..8be755a35e 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b4x16_p64.ll index d28d7c03f6..493e5b9beb 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b6x16_p32.ll index 3289bc8fea..0bd29e6b08 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8.ll index a9fd3b7815..f5e5e14303 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b4x16_p64.ll index 16211f82d6..1ac49ad793 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b6x16_p32.ll index 50213b453d..1e48a25ed8 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b4x16_p64.ll index de179787a7..a6d630659e 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b6x16_p32.ll index 6beed8baea..12cf45c0f5 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b4x16_p64.ll index c959a9121d..0895a3193d 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b6x16_p32.ll index 086c26da7f..60277126ee 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b4x16_p64.ll index 9a676efc9c..14b9e37697 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b6x16_p32.ll index 780699789c..fb9c6c04cc 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_b16.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_b16.ll index 480fe2c031..38fae42a1f 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_b16.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_trans_b16.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_trans_b16.ll index a6e4e843ed..8db60c1182 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_trans_b16.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_trans_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_b16.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_b16.ll index 96810a812b..eb6f586796 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_b16.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_trans_b16.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_trans_b16.ll index a90ea74844..9a7a62345d 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_trans_b16.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_trans_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_b16.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_b16.ll index 6f51f9cdbe..390ff5951e 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_b16.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_trans_b16.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_trans_b16.ll index d1020ad593..aa341aeeb3 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_trans_b16.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_trans_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lg2_approx_f32.ll b/cuda-oxide/intrinsics/probes/lg2_approx_f32.ll index 18899ad7af..fa8936f07e 100644 --- a/cuda-oxide/intrinsics/probes/lg2_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/lg2_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lg2_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/lg2_approx_ftz_f32.ll index 7120bf7896..23f15d01a4 100644 --- a/cuda-oxide/intrinsics/probes/lg2_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/lg2_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/map_shared_rank.ll b/cuda-oxide/intrinsics/probes/map_shared_rank.ll index 89b9a84d1c..9839ba4e3c 100644 --- a/cuda-oxide/intrinsics/probes/map_shared_rank.ll +++ b/cuda-oxide/intrinsics/probes/map_shared_rank.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/match_all_i64_sync.ll b/cuda-oxide/intrinsics/probes/match_all_i64_sync.ll index 758fef6fec..d82d20c1b9 100644 --- a/cuda-oxide/intrinsics/probes/match_all_i64_sync.ll +++ b/cuda-oxide/intrinsics/probes/match_all_i64_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/match_all_sync.ll b/cuda-oxide/intrinsics/probes/match_all_sync.ll index a1b0f94092..b985b60e0c 100644 --- a/cuda-oxide/intrinsics/probes/match_all_sync.ll +++ b/cuda-oxide/intrinsics/probes/match_all_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/match_any_i64_sync.ll b/cuda-oxide/intrinsics/probes/match_any_i64_sync.ll index 65b105d0a4..017a14691a 100644 --- a/cuda-oxide/intrinsics/probes/match_any_i64_sync.ll +++ b/cuda-oxide/intrinsics/probes/match_any_i64_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/match_any_sync.ll b/cuda-oxide/intrinsics/probes/match_any_sync.ll index 6add7aad7f..315647b2ef 100644 --- a/cuda-oxide/intrinsics/probes/match_any_sync.ll +++ b/cuda-oxide/intrinsics/probes/match_any_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_bf16.ll b/cuda-oxide/intrinsics/probes/max_bf16.ll index 7003fbfafc..b5d165005e 100644 --- a/cuda-oxide/intrinsics/probes/max_bf16.ll +++ b/cuda-oxide/intrinsics/probes/max_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_bf16x2.ll b/cuda-oxide/intrinsics/probes/max_bf16x2.ll index 5630d73448..f5af7dcc45 100644 --- a/cuda-oxide/intrinsics/probes/max_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_f16.ll b/cuda-oxide/intrinsics/probes/max_f16.ll index 25d729540c..42fde4bb8c 100644 --- a/cuda-oxide/intrinsics/probes/max_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_f16x2.ll b/cuda-oxide/intrinsics/probes/max_f16x2.ll index 22ad40a976..b06cc818d2 100644 --- a/cuda-oxide/intrinsics/probes/max_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_f16.ll b/cuda-oxide/intrinsics/probes/max_ftz_f16.ll index fabb5a8715..3f84746931 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_f16x2.ll b/cuda-oxide/intrinsics/probes/max_ftz_f16x2.ll index 9a076bf3c7..0fd4369b83 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_nan_f16.ll b/cuda-oxide/intrinsics/probes/max_ftz_nan_f16.ll index d4860c3381..93ed940a93 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_nan_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_nan_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_nan_f16x2.ll b/cuda-oxide/intrinsics/probes/max_ftz_nan_f16x2.ll index 2477fbb824..20ce7ef5a7 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_nan_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_nan_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16.ll index 8f0168cabf..f8772bfe9d 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16x2.ll index 96cd313fa8..91a7508ade 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f32.ll index 7e5e0a398f..dc7c089686 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16.ll index 64fad0f26e..d94fd4802f 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16x2.ll index f99ed444ca..f8423e3e28 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f32.ll index fb25239caa..3f0bd20576 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_bf16.ll b/cuda-oxide/intrinsics/probes/max_nan_bf16.ll index 41cb304e44..a186a23c35 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_bf16.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_bf16x2.ll b/cuda-oxide/intrinsics/probes/max_nan_bf16x2.ll index 550f5861ab..0eea65825f 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_f16.ll b/cuda-oxide/intrinsics/probes/max_nan_f16.ll index 1ee56101cf..3941dae5aa 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_f16x2.ll b/cuda-oxide/intrinsics/probes/max_nan_f16x2.ll index 7d169c9aaa..475dbbaee0 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16.ll b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16.ll index af34d7066f..4e727f1093 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16x2.ll b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16x2.ll index f9d6be8587..a3f71d4c2f 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16.ll index ad7530f38e..3b7d460321 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16x2.ll index 17351d7e59..ca14b7e4bf 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f32.ll index d1af74b630..f4ec716c35 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_relu_s16x2.ll b/cuda-oxide/intrinsics/probes/max_relu_s16x2.ll index dffa51c6ca..58f22d3d7c 100644 --- a/cuda-oxide/intrinsics/probes/max_relu_s16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_relu_s16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_relu_s32.ll b/cuda-oxide/intrinsics/probes/max_relu_s32.ll index b83436d8b0..02d8549b11 100644 --- a/cuda-oxide/intrinsics/probes/max_relu_s32.ll +++ b/cuda-oxide/intrinsics/probes/max_relu_s32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_s16x2.ll b/cuda-oxide/intrinsics/probes/max_s16x2.ll index 273a321a55..28804ca7b8 100644 --- a/cuda-oxide/intrinsics/probes/max_s16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_s16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_u16x2.ll b/cuda-oxide/intrinsics/probes/max_u16x2.ll index 7c4c683e68..d4c3be67c3 100644 --- a/cuda-oxide/intrinsics/probes/max_u16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_u16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16.ll b/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16.ll index cd8f27628f..d4072224f4 100644 --- a/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16.ll +++ b/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16x2.ll b/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16x2.ll index ba04bb1f02..21fe05ad9b 100644 --- a/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16.ll index bdd22230fb..42263edabe 100644 --- a/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16x2.ll index 8715851544..106744840f 100644 --- a/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/max_xorsign_abs_f32.ll index db044ad31a..bf37f88d9b 100644 --- a/cuda-oxide/intrinsics/probes/max_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/max_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_arrive.ll b/cuda-oxide/intrinsics/probes/mbarrier_arrive.ll index 0e8f6a58ba..07cb0eb138 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_arrive.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_arrive.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_arrive_cluster.ll b/cuda-oxide/intrinsics/probes/mbarrier_arrive_cluster.ll index 51afc20531..5351314859 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_arrive_cluster.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_arrive_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx.ll b/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx.ll index 5b713f4bed..6c2bf2d47c 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx_cluster.ll b/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx_cluster.ll index 45fe39e9d0..8791ec9a56 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx_cluster.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_arrive_no_complete.ll b/cuda-oxide/intrinsics/probes/mbarrier_arrive_no_complete.ll index c51e3dac0b..404d4f45f2 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_arrive_no_complete.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_arrive_no_complete.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_init.ll b/cuda-oxide/intrinsics/probes/mbarrier_init.ll index 4337949941..6b628ca5dd 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_init.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_init.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_inval.ll b/cuda-oxide/intrinsics/probes/mbarrier_inval.ll index e3f1ac5513..86405eef0e 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_inval.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_inval.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_test_wait.ll b/cuda-oxide/intrinsics/probes/mbarrier_test_wait.ll index 0642dffdd1..8a33557a20 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_test_wait.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_test_wait.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_try_wait.ll b/cuda-oxide/intrinsics/probes/mbarrier_try_wait.ll index bfdbea3407..ba6e8718a9 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_try_wait.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_try_wait.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity.ll b/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity.ll index aaa27385f4..5a8e50d441 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity_cluster.ll b/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity_cluster.ll index 1ef2710e0c..464b13fa6a 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity_cluster.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_bf16.ll b/cuda-oxide/intrinsics/probes/min_bf16.ll index c8bb72e2b3..50a6d506f8 100644 --- a/cuda-oxide/intrinsics/probes/min_bf16.ll +++ b/cuda-oxide/intrinsics/probes/min_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_bf16x2.ll b/cuda-oxide/intrinsics/probes/min_bf16x2.ll index 7758c5c0a3..324e776768 100644 --- a/cuda-oxide/intrinsics/probes/min_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_f16.ll b/cuda-oxide/intrinsics/probes/min_f16.ll index 513bfe1c64..8929b0b489 100644 --- a/cuda-oxide/intrinsics/probes/min_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_f16x2.ll b/cuda-oxide/intrinsics/probes/min_f16x2.ll index b9e9fae24e..d313b71179 100644 --- a/cuda-oxide/intrinsics/probes/min_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_f16.ll b/cuda-oxide/intrinsics/probes/min_ftz_f16.ll index bae34d4dc8..5acd7e8a7c 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_f16x2.ll b/cuda-oxide/intrinsics/probes/min_ftz_f16x2.ll index c47bbc8dc2..34ceb5478d 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_nan_f16.ll b/cuda-oxide/intrinsics/probes/min_ftz_nan_f16.ll index 61ba7b841f..1e210dc1a6 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_nan_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_nan_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_nan_f16x2.ll b/cuda-oxide/intrinsics/probes/min_ftz_nan_f16x2.ll index 10b25431c9..10276246c5 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_nan_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_nan_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16.ll index 488951ec83..3911e6e876 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16x2.ll index a9875f8730..56c196e9bc 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f32.ll index 7cfa4c34c4..40e1d2a696 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16.ll index 185c1b2dff..a923cc7bfa 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16x2.ll index 4540c48dc7..4b07010be5 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f32.ll index 23ddd5f4f9..9adfebc6ff 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_bf16.ll b/cuda-oxide/intrinsics/probes/min_nan_bf16.ll index b4a82aa1aa..7fcf798d81 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_bf16.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_bf16x2.ll b/cuda-oxide/intrinsics/probes/min_nan_bf16x2.ll index 9dd95ceeea..3333f60ac0 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_f16.ll b/cuda-oxide/intrinsics/probes/min_nan_f16.ll index 80b6df9a95..d488c7d89a 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_f16x2.ll b/cuda-oxide/intrinsics/probes/min_nan_f16x2.ll index 8723e07d43..b794288f90 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16.ll b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16.ll index e2d44db46b..a07f00b2ff 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16x2.ll b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16x2.ll index 26ac69df64..0cc681aec3 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16.ll index bd6fc7fbaa..2e3b38289b 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16x2.ll index 280ee45503..91899aca93 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f32.ll index e689b8d5f0..2b57fc5486 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_relu_s16x2.ll b/cuda-oxide/intrinsics/probes/min_relu_s16x2.ll index 7d65d3244f..94fb6a76b9 100644 --- a/cuda-oxide/intrinsics/probes/min_relu_s16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_relu_s16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_relu_s32.ll b/cuda-oxide/intrinsics/probes/min_relu_s32.ll index 80eafe3306..1ad2dc002f 100644 --- a/cuda-oxide/intrinsics/probes/min_relu_s32.ll +++ b/cuda-oxide/intrinsics/probes/min_relu_s32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_s16x2.ll b/cuda-oxide/intrinsics/probes/min_s16x2.ll index 977c906ec0..97b70d27a7 100644 --- a/cuda-oxide/intrinsics/probes/min_s16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_s16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_u16x2.ll b/cuda-oxide/intrinsics/probes/min_u16x2.ll index 8c6d917dae..67fdc8ee2f 100644 --- a/cuda-oxide/intrinsics/probes/min_u16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_u16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16.ll b/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16.ll index a902a187c5..f1a97429e5 100644 --- a/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16.ll +++ b/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16x2.ll b/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16x2.ll index b389d6daf8..bd34ddeb42 100644 --- a/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16.ll index aa03121966..2f31453c5e 100644 --- a/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16x2.ll index b69733f08d..3dc8642efb 100644 --- a/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/min_xorsign_abs_f32.ll index 95e789cf68..2fc96adae1 100644 --- a/cuda-oxide/intrinsics/probes/min_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/min_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_and_popc.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_and_popc.ll index 94d189e2ad..43bde6e6c7 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_and_popc.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_and_popc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_xor_popc.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_xor_popc.ll index ff249526cc..cad7be1eb0 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_xor_popc.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_xor_popc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_f16_f16.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_f16_f16.ll index 089b0b8670..edee0ba0c0 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_f16_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_f16_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_bf16.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_bf16.ll index e125eb83a8..b2add66b44 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_bf16.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_f16.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_f16.ll index b806a1601a..8003bdb684 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e4m3.ll index c3bd5ae5b2..0b8f74b291 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e5m2.ll index 65a4b2a1b3..02c637d9c5 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e4m3.ll index 6a00fae015..abc65b9be8 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e5m2.ll index e6c4bca231..9de0807e62 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e4m3.ll index 6a25710cfa..1b9a71e154 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e5m2.ll index 95227a4237..a3b4e7b586 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e4m3.ll index b879b80003..b92cd8fefb 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e5m2.ll index 9bcc6172d4..305cb82c73 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8.ll index 50b2cc420c..2c67c4e743 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_satfinite.ll index eeeae78464..46620ae4ce 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8.ll index 5fa875b0e1..4ef3a58ed2 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8_satfinite.ll index 76d2f0fecc..aeb0bf2444 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8.ll index af7de12053..b23f653036 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8.ll index db032636a3..fd2561ca0e 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8_satfinite.ll index 1dd3132e2e..ba0b9f4743 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_satfinite.ll index 02c09afaab..1a20219f35 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_and_popc.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_and_popc.ll index 265fff8f2e..63ea691fe1 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_and_popc.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_and_popc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_xor_popc.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_xor_popc.ll index d94508a3e6..a6e9c90d08 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_xor_popc.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_xor_popc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m1.ll index e70bba6bbb..4ff2814538 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m3.ll index 821c489754..b4ab6dff3f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e3m2.ll index 700457186d..22a792bfea 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e4m3.ll index 750f9cd813..a419e2ad5c 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e5m2.ll index 28c18b6e59..21b172c231 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m1.ll index d00e85aa6f..e63235a033 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m3.ll index d8f1ae5c49..926de732e2 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e3m2.ll index 6d78f216ca..8b42296c66 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e4m3.ll index e9f725a68e..5edaa8daf4 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e5m2.ll index 4aeae8e244..65b58551bc 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m1.ll index 0b6ab3a575..879d5ef421 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m3.ll index 19fdbd2061..e507574bf3 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e3m2.ll index 444cd6278a..19602daf78 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e4m3.ll index e12fe44d5f..00e6b182eb 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e5m2.ll index b0a15ef57d..b694ca2fc8 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m1.ll index d4aa3acd14..febfc2c54c 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m3.ll index 333f033f78..8aa224c70a 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e3m2.ll index 6fc894f21b..c4867a7642 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e4m3.ll index 50ea77a565..4f431bc1c9 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e5m2.ll index 3b0d31c1e7..518cf7ae3d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m1.ll index d7a22aaa55..4a00aea615 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m3.ll index bf351ca94d..d273e0fbd6 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e3m2.ll index 1d82804b8c..e2fc76b0e0 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e4m3.ll index 9a28dc6109..27466a58d4 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e5m2.ll index 4c8bc49f2b..1a14a6720d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m1.ll index 5b37b3d83d..08430445f6 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m3.ll index 39fc6fec3d..ff5517d37f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e3m2.ll index aee2986abf..6f7409bac5 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e4m3.ll index 01438ac387..86fd86e840 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e5m2.ll index be62535a0b..319d466529 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m1.ll index 4704f25eaa..ff22583977 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m3.ll index b7ffe78946..af6b328e99 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e3m2.ll index d9364c662c..14a36751d1 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e4m3.ll index d4507b5008..f986560088 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e5m2.ll index 44e0e2af92..1ae2d46be9 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m1.ll index 23bf10e084..6f71d0b52f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m3.ll index cdc3569b84..1a47edfc84 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e3m2.ll index 95da4f205f..ea60f027c0 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e4m3.ll index 8b9c74061c..6f664163b1 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e5m2.ll index 4c51d3b211..68106513ae 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m1.ll index 6ed768e094..6f28e0c00d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m3.ll index 42500d263c..e2ac411062 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e3m2.ll index 3a305602e4..4cae520578 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e4m3.ll index 5ab54fbf5b..318464a7c8 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e5m2.ll index 80f0ebfd37..4ecfe04aca 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m1.ll index 5641ee5403..0a29f13932 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m3.ll index b94ff32763..5ddf820b05 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e3m2.ll index ab7fda343f..909ce7dde1 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e4m3.ll index 65269475bd..4343067999 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e5m2.ll index 1d194d4097..dd0902de98 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e4m3.ll index 62abfce67e..9ef12f0901 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e5m2.ll index b1f702cf4e..88584f10e2 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e4m3.ll index 5052ac0d1d..6cc29eca60 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e5m2.ll index b45a38856d..37ed062474 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e4m3.ll index 3f1389dc90..76da2cd64e 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e5m2.ll index ac26da3656..de66d04654 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e4m3.ll index 16b0812abb..e6d0b39d56 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e5m2.ll index 6346de9154..4154d12cc1 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m1.ll index fb55e1a87a..a14f797008 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m3.ll index a4a8b305d7..5b80f404ac 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e3m2.ll index fce6635334..e6b9612083 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e4m3.ll index 1276553fa8..f73f42dd0f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e5m2.ll index 6136f8eb99..513a51e47f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m1.ll index fad764be94..23955886c1 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m3.ll index 4d70a71922..75b433194e 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e3m2.ll index 071e814b92..168666dc9b 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e4m3.ll index e9aac08b65..c213945332 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e5m2.ll index c8d692beca..036315e32a 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m1.ll index 196f40911b..06e80c5f48 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m3.ll index 4614e9c14c..460d9b787a 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e3m2.ll index dd16ef03a8..8f929d098d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e4m3.ll index 956452833f..288331661b 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e5m2.ll index 61d4b28d79..c89522eb25 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m1.ll index 5161c22e2f..c9ab29f947 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m3.ll index 42dd53bb72..a48f22ef41 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e3m2.ll index 2bf54fe1aa..3f47457976 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e4m3.ll index 9085809fa7..0c4b572df4 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e5m2.ll index af2c157ccf..15acbd30a2 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m1.ll index da26929de7..8aefc78e7a 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m3.ll index db537b3446..2f2a293491 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e3m2.ll index 0d629c5bf8..174822a76d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e4m3.ll index ffcec3b42a..ae2417ebc8 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e5m2.ll index 4265b1d834..5ac8d1a411 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4.ll index 0165481d40..4948c29e6e 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_satfinite.ll index fa9406494c..bc66abb5c9 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4.ll index 4736d4d35a..dd56c340d5 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4_satfinite.ll index 07d3eca0c5..a3bd8f2a22 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8.ll index a539e82db4..4f077f2b59 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_satfinite.ll index c288b1d21f..00fd83ef2d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8.ll index 4e7d495db2..b56fa6429b 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8_satfinite.ll index c4a31a429d..f8a6f20b60 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4.ll index 7ff641181b..2eca208e2d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4.ll index afbc09aabe..d5032f1d7f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4_satfinite.ll index 1c0897885f..ebf7af5ecb 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_satfinite.ll index 7e2b9df01e..e58c0c6372 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8.ll index b4a7817def..1f3694af77 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8.ll index 2a9f955549..721a1017ac 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8_satfinite.ll index 0cee59c36f..2217ca58dc 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_satfinite.ll index 8a7465ee29..cc254ad836 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k4_f32_tf32.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k4_f32_tf32.ll index 4ef533fb36..3df79cd119 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k4_f32_tf32.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k4_f32_tf32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4.ll index 85815eb492..5a89c40995 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_satfinite.ll index 633c354b61..fd22c96e26 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4.ll index 39c8ddc35c..bcce1e4112 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4_satfinite.ll index 52567cd306..4615e52855 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4.ll index ff314065ae..505946232d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4.ll index c854d24cd7..7bf2d0ef4c 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4_satfinite.ll index eac4722673..f6195662cd 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_satfinite.ll index b1a84044fb..7402e77611 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f16_f16.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f16_f16.ll index c77784673f..f11b966bd6 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f16_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f16_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_bf16.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_bf16.ll index a0fc3fa54f..8783bd9436 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_bf16.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_f16.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_f16.ll index 47f5582d82..e5512ea6be 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_tf32.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_tf32.ll index 236b38bc2d..1dbb30606d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_tf32.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_tf32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_and_popc.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_and_popc.ll index bf31ddf93a..b4925d4e3e 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_and_popc.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_and_popc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_xor_popc.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_xor_popc.ll index 8c079733dc..ac7d15d660 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_xor_popc.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_xor_popc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8.ll index 3d19d9347a..685f3f97af 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_satfinite.ll index 4789d1d9f4..2caf8cf0bb 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8.ll index 38bcecb164..f7b041f44d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8_satfinite.ll index 614b4e0752..d37c1faa40 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8.ll index 2bffec8ae9..8a21af4971 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8.ll index 6a598c2c72..d9f165542c 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8_satfinite.ll index d96fcfac2e..54c44f648c 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_satfinite.ll index 862cc0a59f..c83baf8c4f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4.ll index 9de8fd246a..ebff091b5d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_satfinite.ll index 4f8108973a..1caea64f72 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4.ll index 52d149824a..5a30206469 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4_satfinite.ll index 381ebaa52a..8b6310c313 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4.ll index addfac560a..fb30fbd663 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4.ll index 629898b77e..7525e92856 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4_satfinite.ll index 0cc85592b5..c21388c548 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_satfinite.ll index eb7080ea2d..3beba15fce 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k4_f64.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k4_f64.ll index cddb7bfa9e..148ceb9478 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k4_f64.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k4_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4.ll index f5eb9d1234..aff23718fd 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_satfinite.ll index c146b1c841..3fc5a5ea86 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4.ll index 6f718db0e3..a507ed2187 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4_satfinite.ll index 0b8d8e8be1..8ed0974578 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4.ll index 1d8f20ef62..9b922e7073 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4.ll index 58f51d4694..6519780522 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4_satfinite.ll index d590ab8b48..8302580159 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_satfinite.ll index 4a061b1dd4..46da5e3c9b 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k16_f16_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k16_f16_f16.ll new file mode 100644 index 0000000000..cb2afb76ad --- /dev/null +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k16_f16_f16.ll @@ -0,0 +1,26 @@ +; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +; SPDX-License-Identifier: Apache-2.0 +; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. +; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. + +target triple = "nvptx64-nvidia-cuda" + +define { i32, i32 } @probe_mma_sp_m16n8k16_f16_f16_selector_0(i32 %c0, i32 %c1, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { i32, i32 } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f16.f16.f16.f16 {$0, $1}, {$4, $5}, {$6, $7}, {$2, $3}, $8, $9;", "=r,=r,r,r,r,r,r,r,r,n"(i32 %c0, i32 %c1, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 0) #0 + ret { i32, i32 } %result +} +define { i32, i32 } @probe_mma_sp_m16n8k16_f16_f16_selector_1(i32 %c0, i32 %c1, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { i32, i32 } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f16.f16.f16.f16 {$0, $1}, {$4, $5}, {$6, $7}, {$2, $3}, $8, $9;", "=r,=r,r,r,r,r,r,r,r,n"(i32 %c0, i32 %c1, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 1) #0 + ret { i32, i32 } %result +} +define { i32, i32 } @probe_mma_sp_m16n8k16_f16_f16_selector_2(i32 %c0, i32 %c1, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { i32, i32 } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f16.f16.f16.f16 {$0, $1}, {$4, $5}, {$6, $7}, {$2, $3}, $8, $9;", "=r,=r,r,r,r,r,r,r,r,n"(i32 %c0, i32 %c1, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 2) #0 + ret { i32, i32 } %result +} +define { i32, i32 } @probe_mma_sp_m16n8k16_f16_f16_selector_3(i32 %c0, i32 %c1, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { i32, i32 } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f16.f16.f16.f16 {$0, $1}, {$4, $5}, {$6, $7}, {$2, $3}, $8, $9;", "=r,=r,r,r,r,r,r,r,r,n"(i32 %c0, i32 %c1, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 3) #0 + ret { i32, i32 } %result +} + +attributes #0 = { convergent } diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k16_f32_bf16.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k16_f32_bf16.ll new file mode 100644 index 0000000000..a0f2075971 --- /dev/null +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k16_f32_bf16.ll @@ -0,0 +1,26 @@ +; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +; SPDX-License-Identifier: Apache-2.0 +; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. +; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. + +target triple = "nvptx64-nvidia-cuda" + +define { float, float, float, float } @probe_mma_sp_m16n8k16_f32_bf16_selector_0(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f32.bf16.bf16.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 0) #0 + ret { float, float, float, float } %result +} +define { float, float, float, float } @probe_mma_sp_m16n8k16_f32_bf16_selector_1(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f32.bf16.bf16.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 1) #0 + ret { float, float, float, float } %result +} +define { float, float, float, float } @probe_mma_sp_m16n8k16_f32_bf16_selector_2(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f32.bf16.bf16.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 2) #0 + ret { float, float, float, float } %result +} +define { float, float, float, float } @probe_mma_sp_m16n8k16_f32_bf16_selector_3(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f32.bf16.bf16.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 3) #0 + ret { float, float, float, float } %result +} + +attributes #0 = { convergent } diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k16_f32_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k16_f32_f16.ll new file mode 100644 index 0000000000..bf07788a77 --- /dev/null +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k16_f32_f16.ll @@ -0,0 +1,26 @@ +; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +; SPDX-License-Identifier: Apache-2.0 +; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. +; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. + +target triple = "nvptx64-nvidia-cuda" + +define { float, float, float, float } @probe_mma_sp_m16n8k16_f32_f16_selector_0(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 0) #0 + ret { float, float, float, float } %result +} +define { float, float, float, float } @probe_mma_sp_m16n8k16_f32_f16_selector_1(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 1) #0 + ret { float, float, float, float } %result +} +define { float, float, float, float } @probe_mma_sp_m16n8k16_f32_f16_selector_2(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 2) #0 + ret { float, float, float, float } %result +} +define { float, float, float, float } @probe_mma_sp_m16n8k16_f32_f16_selector_3(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f32.f16.f16.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 3) #0 + ret { float, float, float, float } %result +} + +attributes #0 = { convergent } diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k16_f32_tf32.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k16_f32_tf32.ll new file mode 100644 index 0000000000..6bc84b499b --- /dev/null +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k16_f32_tf32.ll @@ -0,0 +1,18 @@ +; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +; SPDX-License-Identifier: Apache-2.0 +; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. +; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. + +target triple = "nvptx64-nvidia-cuda" + +define { float, float, float, float } @probe_mma_sp_m16n8k16_f32_tf32_selector_0(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f32.tf32.tf32.f32 {$0, $1, $2, $3}, {$8, $9, $10, $11}, {$12, $13, $14, $15}, {$4, $5, $6, $7}, $16, $17;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata, i32 0) #0 + ret { float, float, float, float } %result +} +define { float, float, float, float } @probe_mma_sp_m16n8k16_f32_tf32_selector_1(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k16.row.col.f32.tf32.tf32.f32 {$0, $1, $2, $3}, {$8, $9, $10, $11}, {$12, $13, $14, $15}, {$4, $5, $6, $7}, $16, $17;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata, i32 1) #0 + ret { float, float, float, float } %result +} + +attributes #0 = { convergent } diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_f16_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_f16_f16.ll new file mode 100644 index 0000000000..479710771d --- /dev/null +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_f16_f16.ll @@ -0,0 +1,18 @@ +; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +; SPDX-License-Identifier: Apache-2.0 +; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. +; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. + +target triple = "nvptx64-nvidia-cuda" + +define { i32, i32 } @probe_mma_sp_m16n8k32_f16_f16_selector_0(i32 %c0, i32 %c1, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata) #0 { + %result = call { i32, i32 } asm sideeffect "mma.sp.sync.aligned.m16n8k32.row.col.f16.f16.f16.f16 {$0, $1}, {$4, $5, $6, $7}, {$8, $9, $10, $11}, {$2, $3}, $12, $13;", "=r,=r,r,r,r,r,r,r,r,r,r,r,r,n"(i32 %c0, i32 %c1, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata, i32 0) #0 + ret { i32, i32 } %result +} +define { i32, i32 } @probe_mma_sp_m16n8k32_f16_f16_selector_1(i32 %c0, i32 %c1, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata) #0 { + %result = call { i32, i32 } asm sideeffect "mma.sp.sync.aligned.m16n8k32.row.col.f16.f16.f16.f16 {$0, $1}, {$4, $5, $6, $7}, {$8, $9, $10, $11}, {$2, $3}, $12, $13;", "=r,=r,r,r,r,r,r,r,r,r,r,r,r,n"(i32 %c0, i32 %c1, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata, i32 1) #0 + ret { i32, i32 } %result +} + +attributes #0 = { convergent } diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_f32_bf16.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_f32_bf16.ll new file mode 100644 index 0000000000..e69219b45b --- /dev/null +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_f32_bf16.ll @@ -0,0 +1,18 @@ +; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +; SPDX-License-Identifier: Apache-2.0 +; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. +; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. + +target triple = "nvptx64-nvidia-cuda" + +define { float, float, float, float } @probe_mma_sp_m16n8k32_f32_bf16_selector_0(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k32.row.col.f32.bf16.bf16.f32 {$0, $1, $2, $3}, {$8, $9, $10, $11}, {$12, $13, $14, $15}, {$4, $5, $6, $7}, $16, $17;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata, i32 0) #0 + ret { float, float, float, float } %result +} +define { float, float, float, float } @probe_mma_sp_m16n8k32_f32_bf16_selector_1(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k32.row.col.f32.bf16.bf16.f32 {$0, $1, $2, $3}, {$8, $9, $10, $11}, {$12, $13, $14, $15}, {$4, $5, $6, $7}, $16, $17;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata, i32 1) #0 + ret { float, float, float, float } %result +} + +attributes #0 = { convergent } diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_f32_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_f32_f16.ll new file mode 100644 index 0000000000..49e41c1244 --- /dev/null +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_f32_f16.ll @@ -0,0 +1,18 @@ +; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +; SPDX-License-Identifier: Apache-2.0 +; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. +; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. + +target triple = "nvptx64-nvidia-cuda" + +define { float, float, float, float } @probe_mma_sp_m16n8k32_f32_f16_selector_0(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32 {$0, $1, $2, $3}, {$8, $9, $10, $11}, {$12, $13, $14, $15}, {$4, $5, $6, $7}, $16, $17;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata, i32 0) #0 + ret { float, float, float, float } %result +} +define { float, float, float, float } @probe_mma_sp_m16n8k32_f32_f16_selector_1(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k32.row.col.f32.f16.f16.f32 {$0, $1, $2, $3}, {$8, $9, $10, $11}, {$12, $13, $14, $15}, {$4, $5, $6, $7}, $16, $17;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %b0, i32 %b1, i32 %b2, i32 %b3, i32 %metadata, i32 1) #0 + ret { float, float, float, float } %result +} + +attributes #0 = { convergent } diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8.ll index 51ba4501ee..d3f8c973e4 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_satfinite.ll index ca9470e2e6..74c83149a9 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8.ll index d2ff4113d9..24166bbc7a 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8_satfinite.ll index 50a9ad3ee7..4ad4ca8c79 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8.ll index 82d5c71669..bf74363087 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8.ll index dad95bd661..e34f64b474 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8_satfinite.ll index 0ef210fbfe..f5991a3a85 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_satfinite.ll index b3242ac215..521aaa6d35 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e4m3_f32.ll index fc20835793..06514ae14c 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e5m2_f32.ll index 54b6183352..a583b50459 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e4m3_f32.ll index 7d8b86a3c5..9a91e86a05 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e5m2_f32.ll index 28f97e546b..8f4a076818 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4.ll index 4dd0487629..559a3990f6 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_satfinite.ll index f28e4da465..24e332e2fa 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4.ll index d060c922f3..5d266702a5 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4_satfinite.ll index 537441354a..beb301a66c 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8.ll index da020e17b2..ab88f831f9 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_satfinite.ll index 2d126310b1..f7d180d760 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8.ll index 13dd254cdf..2bc1c3df9d 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8_satfinite.ll index 26d9f43644..7f2be176e2 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4.ll index 73b8c5093b..51be4050ab 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4.ll index d42303a6ed..cdd0e78794 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4_satfinite.ll index c06aaf24d7..353116beb5 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_satfinite.ll index 70f222a4a1..b0433206ad 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8.ll index 07695e8d60..508ec0e613 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8.ll index 781e6528c7..084075e22c 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8_satfinite.ll index f5a42d56bf..4bc950a4d4 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_satfinite.ll index 287fe1fa8c..1f7cd43b37 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k8_f32_tf32.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k8_f32_tf32.ll new file mode 100644 index 0000000000..4092884402 --- /dev/null +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k8_f32_tf32.ll @@ -0,0 +1,26 @@ +; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +; SPDX-License-Identifier: Apache-2.0 +; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. +; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. + +target triple = "nvptx64-nvidia-cuda" + +define { float, float, float, float } @probe_mma_sp_m16n8k8_f32_tf32_selector_0(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 0) #0 + ret { float, float, float, float } %result +} +define { float, float, float, float } @probe_mma_sp_m16n8k8_f32_tf32_selector_1(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 1) #0 + ret { float, float, float, float } %result +} +define { float, float, float, float } @probe_mma_sp_m16n8k8_f32_tf32_selector_2(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 2) #0 + ret { float, float, float, float } %result +} +define { float, float, float, float } @probe_mma_sp_m16n8k8_f32_tf32_selector_3(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata) #0 { + %result = call { float, float, float, float } asm sideeffect "mma.sp.sync.aligned.m16n8k8.row.col.f32.tf32.tf32.f32 {$0, $1, $2, $3}, {$8, $9}, {$10, $11}, {$4, $5, $6, $7}, $12, $13;", "=f,=f,=f,=f,f,f,f,f,r,r,r,r,r,n"(float %c0, float %c1, float %c2, float %c3, i32 %a0, i32 %a1, i32 %b0, i32 %b1, i32 %metadata, i32 3) #0 + ret { float, float, float, float } %result +} + +attributes #0 = { convergent } diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4.ll index 0bc04132f0..3ea01dcc91 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_satfinite.ll index 01acea6e65..5c8ecc0eeb 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4.ll index 2d63aa9e37..68f27f3ca7 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4_satfinite.ll index e7d109c77f..e890bdf0c1 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4.ll index d41aba46f8..7e7e98fb6c 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4.ll index 3b4e5fbfb3..7f7aafd5d5 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4_satfinite.ll index 3b187511b5..396f79e758 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_satfinite.ll index 6f1e958d04..e3d2d35fb7 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f16_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f16_f16.ll index 86136dc740..146e84f17a 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f16_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f16_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_bf16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_bf16.ll index 060ca45641..f29e7f7cc0 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_bf16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_f16.ll index 5d3055c3c9..2fcdbea8a9 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_tf32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_tf32.ll index 68c150e5bf..aaaa313a93 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_tf32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_tf32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f16_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f16_f16.ll index f401166714..cce70c009b 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f16_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f16_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_bf16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_bf16.ll index 498a860a21..eb93d22337 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_bf16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_f16.ll index 0718d322bf..85d0c14129 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8.ll index c0b62354b2..48da649ee4 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_satfinite.ll index 19e221c81c..c68de1aad4 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8.ll index 62734d5f15..9999e4c531 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8_satfinite.ll index b6439ca3fd..643e23a94a 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8.ll index f5efa80731..cf8aa98926 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8.ll index fadca53433..8f00390772 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8_satfinite.ll index c65708fd4c..3b6be36034 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_satfinite.ll index 0d76037450..d5c4ee4c46 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m1_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m1_f16.ll index 4eb6ed8b64..110313e4aa 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m1_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m1_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m3_f16.ll index 6595beca7f..d5d94ce530 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e3m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e3m2_f16.ll index afd70228e8..1a140d2999 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e3m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e3m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e4m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e4m3_f16.ll index dba410c20a..314ccdbafc 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e4m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e4m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e5m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e5m2_f16.ll index 73b5d32b77..6a116e1b89 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e5m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e5m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m1_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m1_f16.ll index 6a26c5b4d5..f4a99603ae 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m1_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m1_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m3_f16.ll index 8e75c5c8fb..ed01416b13 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e3m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e3m2_f16.ll index 3ff042a24f..74668e9d7c 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e3m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e3m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e4m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e4m3_f16.ll index fa059c4896..836e525f99 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e4m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e4m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e5m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e5m2_f16.ll index 2c77b1f77a..1edec42cfa 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e5m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e5m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m1_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m1_f16.ll index 0047957133..26838db6b5 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m1_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m1_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m3_f16.ll index c7df28dd7f..48bb7259cf 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e3m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e3m2_f16.ll index 3133f76831..62ee72551a 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e3m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e3m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e4m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e4m3_f16.ll index 1eaa985568..a8551068ea 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e4m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e4m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e5m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e5m2_f16.ll index bbb722be6a..f76b83ed72 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e5m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e5m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m1_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m1_f16.ll index 419650d1c6..4abbf4522a 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m1_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m1_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m3_f16.ll index aba3f233c8..d1dcd1675d 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e3m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e3m2_f16.ll index 4405e33779..a3e031324d 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e3m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e3m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e4m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e4m3_f16.ll index 9e35d839e5..ef54354591 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e4m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e4m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e5m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e5m2_f16.ll index ef5690709b..8a188beec2 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e5m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e5m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m1_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m1_f16.ll index 492187b7ea..7a73417871 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m1_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m1_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m3_f16.ll index b06939db6b..d5ac1c19eb 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e3m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e3m2_f16.ll index 358b2f0a90..eed9894d62 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e3m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e3m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e4m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e4m3_f16.ll index 83f2209719..c05875f7a1 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e4m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e4m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e5m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e5m2_f16.ll index e705b9650d..2a7165aea6 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e5m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e5m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m1_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m1_f32.ll index afda2888c1..c465f4f633 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m1_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m1_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m3_f32.ll index 64e6f2f030..9a034744e5 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e3m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e3m2_f32.ll index 83be487e27..7a80201f3d 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e3m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e3m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e4m3_f32.ll index e3b425d064..5c4b999830 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e5m2_f32.ll index 910b1c2cb1..57289b9067 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m1_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m1_f32.ll index 8c572622da..945fd2d73a 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m1_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m1_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m3_f32.ll index 812d890c02..9ebd097325 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e3m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e3m2_f32.ll index 70ef0dc6bf..1cfe18bad9 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e3m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e3m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e4m3_f32.ll index 31956edd1e..e4b642854a 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e5m2_f32.ll index 3fb24ff383..250ecab2b9 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m1_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m1_f32.ll index 71712d785b..de8a0f9589 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m1_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m1_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m3_f32.ll index 14b925ad75..5ccce3da37 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e3m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e3m2_f32.ll index 105d8a328f..10c41d546c 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e3m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e3m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e4m3_f32.ll index acced2cae8..2e70961932 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e5m2_f32.ll index 832fea59b1..8277925989 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m1_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m1_f32.ll index 2c7cbf97da..2fe450d51a 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m1_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m1_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m3_f32.ll index 89db7d1a3e..31edc0da1f 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e3m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e3m2_f32.ll index 09264dfaee..55090950ed 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e3m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e3m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e4m3_f32.ll index 06b14fa250..dc737ed426 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e5m2_f32.ll index 568b50d190..edf20dc4ae 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m1_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m1_f32.ll index 6d1c0f9900..5896418d8b 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m1_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m1_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m3_f32.ll index f961831a91..0a20ab4a9a 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e3m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e3m2_f32.ll index 241263e99d..ba954fe36e 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e3m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e3m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e4m3_f32.ll index 8d405c0063..5f3f62760e 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e5m2_f32.ll index fbd742a1ab..75dfdadf5e 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4.ll index f0de660215..e15b02a184 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_satfinite.ll index 15dd05cd27..9155bed779 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4.ll index f2ca70175a..3c3ba7b9a9 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4_satfinite.ll index 86ca4244c8..708d3f26a7 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8.ll index d7adca0af8..bbac6b1950 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_satfinite.ll index 79a7f0d3dd..0b10d1226b 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8.ll index 7ef3c1930a..2552346dfb 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8_satfinite.ll index 137cd5424e..53bcf0076e 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4.ll index 89cd09d317..4d2b37a851 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4.ll index f675920f0c..2d8a0777a9 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4_satfinite.ll index 571c313877..54a00a1259 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_satfinite.ll index 498e03a20a..96631586d7 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8.ll index f6947a5717..286663501c 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8.ll index 81d41fcf74..227f0a6379 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8_satfinite.ll index 06786e2a21..c19576cabd 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_satfinite.ll index d641934dcd..012cc41627 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k8_f32_tf32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k8_f32_tf32.ll index 911892a1fc..71166155c4 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k8_f32_tf32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k8_f32_tf32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/movmatrix_trans_b16.ll b/cuda-oxide/intrinsics/probes/movmatrix_trans_b16.ll index fbac762810..40eabf9583 100644 --- a/cuda-oxide/intrinsics/probes/movmatrix_trans_b16.ll +++ b/cuda-oxide/intrinsics/probes/movmatrix_trans_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_bf16x2.ll b/cuda-oxide/intrinsics/probes/mul_bf16x2.ll index bc17cead14..29aa542d44 100644 --- a/cuda-oxide/intrinsics/probes/mul_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/mul_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_f16x2.ll b/cuda-oxide/intrinsics/probes/mul_f16x2.ll index 549d9a9bcd..dcfae835f8 100644 --- a/cuda-oxide/intrinsics/probes/mul_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/mul_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_f32x2.ll b/cuda-oxide/intrinsics/probes/mul_f32x2.ll index 830ec1dd6c..31d6230518 100644 --- a/cuda-oxide/intrinsics/probes/mul_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/mul_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_ftz_f32x2.ll b/cuda-oxide/intrinsics/probes/mul_ftz_f32x2.ll index 37fa4f34dd..c19832a731 100644 --- a/cuda-oxide/intrinsics/probes/mul_ftz_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/mul_ftz_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rm_f32.ll b/cuda-oxide/intrinsics/probes/mul_rm_f32.ll index 17f3b9c2d7..08d865a9d4 100644 --- a/cuda-oxide/intrinsics/probes/mul_rm_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rm_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rm_f64.ll b/cuda-oxide/intrinsics/probes/mul_rm_f64.ll index 6518123504..ace70b35f5 100644 --- a/cuda-oxide/intrinsics/probes/mul_rm_f64.ll +++ b/cuda-oxide/intrinsics/probes/mul_rm_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rm_ftz_f32.ll b/cuda-oxide/intrinsics/probes/mul_rm_ftz_f32.ll index 913e7cdbfc..b11e796fac 100644 --- a/cuda-oxide/intrinsics/probes/mul_rm_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rm_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rn_f32.ll b/cuda-oxide/intrinsics/probes/mul_rn_f32.ll index 5f08185755..2ba1786733 100644 --- a/cuda-oxide/intrinsics/probes/mul_rn_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rn_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rn_f64.ll b/cuda-oxide/intrinsics/probes/mul_rn_f64.ll index 0e31cfe5e0..259d8204cb 100644 --- a/cuda-oxide/intrinsics/probes/mul_rn_f64.ll +++ b/cuda-oxide/intrinsics/probes/mul_rn_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rn_ftz_f32.ll b/cuda-oxide/intrinsics/probes/mul_rn_ftz_f32.ll index b9252b788e..da036888b7 100644 --- a/cuda-oxide/intrinsics/probes/mul_rn_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rn_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rp_f32.ll b/cuda-oxide/intrinsics/probes/mul_rp_f32.ll index a4aa855352..418b5238f1 100644 --- a/cuda-oxide/intrinsics/probes/mul_rp_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rp_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rp_f64.ll b/cuda-oxide/intrinsics/probes/mul_rp_f64.ll index db651871c8..ea2984720e 100644 --- a/cuda-oxide/intrinsics/probes/mul_rp_f64.ll +++ b/cuda-oxide/intrinsics/probes/mul_rp_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rp_ftz_f32.ll b/cuda-oxide/intrinsics/probes/mul_rp_ftz_f32.ll index 5d372f8457..45443ddd6d 100644 --- a/cuda-oxide/intrinsics/probes/mul_rp_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rp_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rz_f32.ll b/cuda-oxide/intrinsics/probes/mul_rz_f32.ll index 0c460e963d..b51def13cf 100644 --- a/cuda-oxide/intrinsics/probes/mul_rz_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rz_f64.ll b/cuda-oxide/intrinsics/probes/mul_rz_f64.ll index d1fd06f25c..dc8c5b8282 100644 --- a/cuda-oxide/intrinsics/probes/mul_rz_f64.ll +++ b/cuda-oxide/intrinsics/probes/mul_rz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rz_ftz_f32.ll b/cuda-oxide/intrinsics/probes/mul_rz_ftz_f32.ll index e2524680f3..6d73f68969 100644 --- a/cuda-oxide/intrinsics/probes/mul_rz_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rz_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/nanosleep.ll b/cuda-oxide/intrinsics/probes/nanosleep.ll index 4b459dc453..55ae4104c2 100644 --- a/cuda-oxide/intrinsics/probes/nanosleep.ll +++ b/cuda-oxide/intrinsics/probes/nanosleep.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/neg_bf16x2.ll b/cuda-oxide/intrinsics/probes/neg_bf16x2.ll index f4da6ba2a5..edecba237a 100644 --- a/cuda-oxide/intrinsics/probes/neg_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/neg_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/neg_f16x2.ll b/cuda-oxide/intrinsics/probes/neg_f16x2.ll index f28008ff5b..a9c61b782f 100644 --- a/cuda-oxide/intrinsics/probes/neg_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/neg_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/nsmid.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/nsmid.lib_nvvm.ll index dc2ce542a4..fa92ffd9c0 100644 --- a/cuda-oxide/intrinsics/probes/nsmid.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/nsmid.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/nsmid.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/nsmid.llvm_nvptx.ll index 850084fa3a..07aa307c54 100644 --- a/cuda-oxide/intrinsics/probes/nsmid.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/nsmid.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/nwarpid.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/nwarpid.lib_nvvm.ll index 03f483a462..13a5150b56 100644 --- a/cuda-oxide/intrinsics/probes/nwarpid.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/nwarpid.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/nwarpid.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/nwarpid.llvm_nvptx.ll index d89077ebca..bb0ac93d06 100644 --- a/cuda-oxide/intrinsics/probes/nwarpid.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/nwarpid.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/packed_atomic_add_bf16x2.ll b/cuda-oxide/intrinsics/probes/packed_atomic_add_bf16x2.ll index 86be101128..5384106a04 100644 --- a/cuda-oxide/intrinsics/probes/packed_atomic_add_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/packed_atomic_add_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/packed_atomic_add_f16x2.ll b/cuda-oxide/intrinsics/probes/packed_atomic_add_f16x2.ll index 4b3177d25e..dc51d04821 100644 --- a/cuda-oxide/intrinsics/probes/packed_atomic_add_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/packed_atomic_add_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/pmevent.ll b/cuda-oxide/intrinsics/probes/pmevent.ll index 8b701333c6..2e1e531c2f 100644 --- a/cuda-oxide/intrinsics/probes/pmevent.ll +++ b/cuda-oxide/intrinsics/probes/pmevent.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prefetch_tma_descriptor.ll b/cuda-oxide/intrinsics/probes/prefetch_tma_descriptor.ll index 3a757bcb6a..88c62aea9a 100644 --- a/cuda-oxide/intrinsics/probes/prefetch_tma_descriptor.ll +++ b/cuda-oxide/intrinsics/probes/prefetch_tma_descriptor.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt.ll b/cuda-oxide/intrinsics/probes/prmt.ll index 97a24a5093..a38f9c68af 100644 --- a/cuda-oxide/intrinsics/probes/prmt.ll +++ b/cuda-oxide/intrinsics/probes/prmt.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt_b4e.ll b/cuda-oxide/intrinsics/probes/prmt_b4e.ll index 645fef4bd3..ddb67ee10e 100644 --- a/cuda-oxide/intrinsics/probes/prmt_b4e.ll +++ b/cuda-oxide/intrinsics/probes/prmt_b4e.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt_ecl.ll b/cuda-oxide/intrinsics/probes/prmt_ecl.ll index 2dadcade53..cff35e5c89 100644 --- a/cuda-oxide/intrinsics/probes/prmt_ecl.ll +++ b/cuda-oxide/intrinsics/probes/prmt_ecl.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt_ecr.ll b/cuda-oxide/intrinsics/probes/prmt_ecr.ll index 1a9ffbc57e..c20fd1a840 100644 --- a/cuda-oxide/intrinsics/probes/prmt_ecr.ll +++ b/cuda-oxide/intrinsics/probes/prmt_ecr.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt_f4e.ll b/cuda-oxide/intrinsics/probes/prmt_f4e.ll index 2c68ef8255..90af32e39f 100644 --- a/cuda-oxide/intrinsics/probes/prmt_f4e.ll +++ b/cuda-oxide/intrinsics/probes/prmt_f4e.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt_rc16.ll b/cuda-oxide/intrinsics/probes/prmt_rc16.ll index ecbb47fd9f..5769ddfffd 100644 --- a/cuda-oxide/intrinsics/probes/prmt_rc16.ll +++ b/cuda-oxide/intrinsics/probes/prmt_rc16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt_rc8.ll b/cuda-oxide/intrinsics/probes/prmt_rc8.ll index a0afe97644..cef791ca1a 100644 --- a/cuda-oxide/intrinsics/probes/prmt_rc8.ll +++ b/cuda-oxide/intrinsics/probes/prmt_rc8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f32.ll index 61fe9c0636..01c630a083 100644 --- a/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f64.ll b/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f64.ll index d14e19bcf2..87bd1b5615 100644 --- a/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f64.ll +++ b/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rm_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rm_f32.ll index 296048e1a5..89b098b6d8 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rm_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rm_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rm_f64.ll b/cuda-oxide/intrinsics/probes/rcp_rm_f64.ll index 7b8ecdf2c8..86c1eb2e16 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rm_f64.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rm_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rm_ftz_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rm_ftz_f32.ll index daf7f5f544..adefffd442 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rm_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rm_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rn_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rn_f32.ll index 70df3b939b..bc17b3dcff 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rn_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rn_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rn_f64.ll b/cuda-oxide/intrinsics/probes/rcp_rn_f64.ll index 9886c2dcfd..4c1e818437 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rn_f64.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rn_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rn_ftz_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rn_ftz_f32.ll index 861593480a..2f57c2511a 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rn_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rn_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rp_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rp_f32.ll index 9f45b783a4..170004cb54 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rp_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rp_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rp_f64.ll b/cuda-oxide/intrinsics/probes/rcp_rp_f64.ll index 9b01325634..357f30cd3e 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rp_f64.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rp_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rp_ftz_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rp_ftz_f32.ll index c1c9d18e37..33d72dffdd 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rp_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rp_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rz_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rz_f32.ll index 58023db687..18ec779db6 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rz_f64.ll b/cuda-oxide/intrinsics/probes/rcp_rz_f64.ll index e3e1b09c6c..b94738a5d4 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rz_f64.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rz_ftz_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rz_ftz_f32.ll index 3dbb13425c..ce7a3dd25c 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rz_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rz_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_add.ll b/cuda-oxide/intrinsics/probes/redux_sync_add.ll index 369b489648..8c2f6c3033 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_add.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_add.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_and.ll b/cuda-oxide/intrinsics/probes/redux_sync_and.ll index 9eee9cd4ca..69f7b91cba 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_and.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_and.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_max_abs_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_max_abs_f32.ll index 5d0ad1e81c..0300e99644 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_max_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_max_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_max_abs_nan_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_max_abs_nan_f32.ll index fc4af38bf2..acd93cda6f 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_max_abs_nan_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_max_abs_nan_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_max_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_max_f32.ll index 927dd237f0..5472ada23b 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_max_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_max_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_max_i32.ll b/cuda-oxide/intrinsics/probes/redux_sync_max_i32.ll index ddca4dd239..f4c2043645 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_max_i32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_max_i32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_max_nan_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_max_nan_f32.ll index 099fd3868f..f7708901d5 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_max_nan_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_max_nan_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_max_u32.ll b/cuda-oxide/intrinsics/probes/redux_sync_max_u32.ll index c5ec2695a5..def64e0737 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_max_u32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_max_u32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_min_abs_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_min_abs_f32.ll index 3980cc4b44..25bf2242bb 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_min_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_min_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_min_abs_nan_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_min_abs_nan_f32.ll index 5ea00f6ccf..f6227b0650 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_min_abs_nan_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_min_abs_nan_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_min_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_min_f32.ll index ef0470cf98..638d54af13 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_min_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_min_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_min_i32.ll b/cuda-oxide/intrinsics/probes/redux_sync_min_i32.ll index 54290f0ff3..42d517341b 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_min_i32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_min_i32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_min_nan_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_min_nan_f32.ll index 62e74949f3..bf273c8ccb 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_min_nan_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_min_nan_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_min_u32.ll b/cuda-oxide/intrinsics/probes/redux_sync_min_u32.ll index 3fb7b71c28..02e2a13227 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_min_u32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_min_u32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_or.ll b/cuda-oxide/intrinsics/probes/redux_sync_or.ll index 6000336623..c9b619b938 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_or.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_or.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_xor.ll b/cuda-oxide/intrinsics/probes/redux_sync_xor.ll index 7eb91f2186..cbb1ec1fe2 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_xor.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_xor.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rsqrt_approx_f32.ll b/cuda-oxide/intrinsics/probes/rsqrt_approx_f32.ll index ab1a1d1a6a..538c15cafa 100644 --- a/cuda-oxide/intrinsics/probes/rsqrt_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/rsqrt_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rsqrt_approx_f64.ll b/cuda-oxide/intrinsics/probes/rsqrt_approx_f64.ll index e9dc893edf..56eb2008fb 100644 --- a/cuda-oxide/intrinsics/probes/rsqrt_approx_f64.ll +++ b/cuda-oxide/intrinsics/probes/rsqrt_approx_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rsqrt_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/rsqrt_approx_ftz_f32.ll index 74e1453f5a..d4a9c5aa1d 100644 --- a/cuda-oxide/intrinsics/probes/rsqrt_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rsqrt_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/setmaxnreg_dec.ll b/cuda-oxide/intrinsics/probes/setmaxnreg_dec.ll index c07af8ce8a..da0c398649 100644 --- a/cuda-oxide/intrinsics/probes/setmaxnreg_dec.ll +++ b/cuda-oxide/intrinsics/probes/setmaxnreg_dec.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/setmaxnreg_inc.ll b/cuda-oxide/intrinsics/probes/setmaxnreg_inc.ll index 6615fc3fbd..3d34581f52 100644 --- a/cuda-oxide/intrinsics/probes/setmaxnreg_inc.ll +++ b/cuda-oxide/intrinsics/probes/setmaxnreg_inc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_down_f32_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_down_f32_sync.ll index 9b4b8b8134..a2b897178b 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_down_f32_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_down_f32_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_down_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_down_sync.ll index 6d7c75863f..7226b56dd3 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_down_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_down_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_down_u64_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_down_u64_sync.ll index 16e7f345a6..cf749182c7 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_down_u64_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_down_u64_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_f32_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_f32_sync.ll index f8bec9729f..286f66db20 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_f32_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_f32_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_sync.ll index 255e7d7822..e3ce994ee9 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_u64_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_u64_sync.ll index 9a9ceaab62..108b9e5f49 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_u64_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_u64_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_up_f32_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_up_f32_sync.ll index 18ebbd19b2..c50d94eb9d 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_up_f32_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_up_f32_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_up_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_up_sync.ll index 5e16919808..87884b0e5f 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_up_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_up_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_up_u64_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_up_u64_sync.ll index 1b6827f766..be1f173182 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_up_u64_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_up_u64_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_xor_f32_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_xor_f32_sync.ll index 229d16a682..c00634ffad 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_xor_f32_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_xor_f32_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_xor_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_xor_sync.ll index 80297bbe5c..8273bace81 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_xor_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_xor_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_xor_u64_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_xor_u64_sync.ll index f6ee3d84a6..f6229b10a7 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_xor_u64_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_xor_u64_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sin_approx_f32.ll b/cuda-oxide/intrinsics/probes/sin_approx_f32.ll index 5127f609f7..d25571d379 100644 --- a/cuda-oxide/intrinsics/probes/sin_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/sin_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sin_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/sin_approx_ftz_f32.ll index a905a8b4ba..a55bed58d6 100644 --- a/cuda-oxide/intrinsics/probes/sin_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sin_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/smid.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/smid.lib_nvvm.ll index 768a40747f..fcbc14dce3 100644 --- a/cuda-oxide/intrinsics/probes/smid.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/smid.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/smid.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/smid.llvm_nvptx.ll index 0153e860f1..699b8e1b68 100644 --- a/cuda-oxide/intrinsics/probes/smid.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/smid.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_approx_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_approx_f32.ll index c6e5ceb7d7..cfe1a12341 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_approx_ftz_f32.ll index cc0b4e1c64..38f05309d9 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rm_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rm_f32.ll index 4288226a88..38c9f6ecbe 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rm_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rm_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rm_f64.ll b/cuda-oxide/intrinsics/probes/sqrt_rm_f64.ll index 01e221b6d9..c1da7ec5af 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rm_f64.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rm_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rm_ftz_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rm_ftz_f32.ll index 5f9f80305d..36d8af8634 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rm_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rm_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rn_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rn_f32.ll index cba941850f..506940635c 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rn_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rn_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rn_f64.ll b/cuda-oxide/intrinsics/probes/sqrt_rn_f64.ll index bb4dd1e37e..18153c8b4a 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rn_f64.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rn_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rn_ftz_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rn_ftz_f32.ll index 6222239043..fe235003ea 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rn_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rn_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rp_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rp_f32.ll index a6a838604b..dd516c0f4a 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rp_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rp_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rp_f64.ll b/cuda-oxide/intrinsics/probes/sqrt_rp_f64.ll index 575956827d..486a4b1c15 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rp_f64.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rp_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rp_ftz_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rp_ftz_f32.ll index 9c4cffcf2c..18c29f4ecc 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rp_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rp_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rz_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rz_f32.ll index 72eb6dd6d3..0d7caea8bc 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rz_f64.ll b/cuda-oxide/intrinsics/probes/sqrt_rz_f64.ll index f36e33e0a5..37ca09ddbb 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rz_f64.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rz_ftz_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rz_ftz_f32.ll index d92817164f..757bc38cf9 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rz_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rz_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_b16.ll b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_b16.ll index d520769546..63bcf7896a 100644 --- a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_b16.ll +++ b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_trans_b16.ll b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_trans_b16.ll index 459c30c797..0e8b894e57 100644 --- a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_trans_b16.ll +++ b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_trans_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_b16.ll b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_b16.ll index 3d64c917c2..9b7c695068 100644 --- a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_b16.ll +++ b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_trans_b16.ll b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_trans_b16.ll index 8cac5dc88b..d1c9d9203c 100644 --- a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_trans_b16.ll +++ b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_trans_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sub_bf16x2.ll b/cuda-oxide/intrinsics/probes/sub_bf16x2.ll index aa6d61e7a6..dd901b2c5e 100644 --- a/cuda-oxide/intrinsics/probes/sub_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/sub_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sub_f16x2.ll b/cuda-oxide/intrinsics/probes/sub_f16x2.ll index e2ef8b7f6e..57d6d26b3b 100644 --- a/cuda-oxide/intrinsics/probes/sub_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/sub_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sub_f32x2.ll b/cuda-oxide/intrinsics/probes/sub_f32x2.ll index ea16ff1d5f..595e9c724d 100644 --- a/cuda-oxide/intrinsics/probes/sub_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/sub_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sub_ftz_f32x2.ll b/cuda-oxide/intrinsics/probes/sub_ftz_f32x2.ll index cfdb900b7d..e982f7fead 100644 --- a/cuda-oxide/intrinsics/probes/sub_ftz_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/sub_ftz_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sync_mask.ll b/cuda-oxide/intrinsics/probes/sync_mask.ll index c790662607..e841b77741 100644 --- a/cuda-oxide/intrinsics/probes/sync_mask.ll +++ b/cuda-oxide/intrinsics/probes/sync_mask.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sync_threads.ll b/cuda-oxide/intrinsics/probes/sync_threads.ll index e601307d5a..8bd93a1ade 100644 --- a/cuda-oxide/intrinsics/probes/sync_threads.ll +++ b/cuda-oxide/intrinsics/probes/sync_threads.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tanh_approx_f32.ll b/cuda-oxide/intrinsics/probes/tanh_approx_f32.ll index 0ab7242e83..96454f4428 100644 --- a/cuda-oxide/intrinsics/probes/tanh_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/tanh_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_alloc.ll b/cuda-oxide/intrinsics/probes/tcgen05_alloc.ll index 9b493d02ab..ce5aa609b2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_alloc.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_alloc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_alloc_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_alloc_cg2.ll index 703164e325..a72216ef0e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_alloc_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_alloc_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_commit.ll b/cuda-oxide/intrinsics/probes/tcgen05_commit.ll index 04c8d1a446..b5391df798 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_commit.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_commit.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_commit_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_commit_cg2.ll index 9a727ae60f..21a2002284 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_commit_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_commit_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast.ll b/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast.ll index ace1a5127d..345421be96 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast_cg2.ll index 412aa6b9ee..1fabca9646 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster.ll b/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster.ll index 92ccb3a677..75596c938e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster_cg2.ll index 9bc40d088d..6aed62de06 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b.ll index a32c4c51fb..15b986ddeb 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64.ll index e2f2067359..6271211d6d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64_cg2.ll index cd0ede7e42..283b4d6d85 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32.ll index 65eaea91d7..fb81d85124 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32_cg2.ll index 1e14d41601..7be8911834 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_cg2.ll index e481657183..afe3ed84aa 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64.ll index e1ea9b5f75..595e6252fc 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64_cg2.ll index b796c00112..11025cd4ed 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32.ll index 2def3c41fb..e4b528bab4 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32_cg2.ll index 65941e4d06..956d58a7a2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4.ll index 6a4f1d00cb..70831d608e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64.ll index 68ed0459d8..e4536278ae 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64_cg2.ll index c3ca4162d2..c813947144 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32.ll index 87af209f53..ca5c541bdd 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32_cg2.ll index 6fd6248d97..f623daf58b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_cg2.ll index 45fec44c38..d80654895d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b.ll index 1af46920c8..5efe2b8e85 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64.ll index 84ef0494eb..664203801c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64_cg2.ll index 43908277ea..4022af6117 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32.ll index 275dc85c07..a999269f57 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32_cg2.ll index 0c02a202b6..c4a1a929f2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_cg2.ll index 5e5ba89711..cc8cd5b722 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23.ll index 5b7d44ea01..5b74456fa9 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64.ll index 7d426e25ef..9647cf7dbd 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64_cg2.ll index 7d57560ae8..b0e22bed6f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32.ll index a3cada3ac9..5b68b810f7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32_cg2.ll index 692d9a52d7..f533fcba63 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_cg2.ll index d09dbc2483..5b7562604f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13.ll index b5cec2481f..72e84c86cb 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64.ll index 95cd4f21b2..997ca360c8 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64_cg2.ll index 98e0af4069..cdc7dcd591 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32.ll index 2150522aa7..3e1d995c6a 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32_cg2.ll index c0d0776e1c..35c7bc4ac2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_cg2.ll index e72639c513..1c4b7557d9 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem.ll index 33a182f927..30aa535b79 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem_cg2.ll index 7152759e9c..9aa9897131 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_dealloc.ll b/cuda-oxide/intrinsics/probes/tcgen05_dealloc.ll index fe52114075..3e364bac53 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_dealloc.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_dealloc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_dealloc_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_dealloc_cg2.ll index 7c43aa95ca..5f70779a2d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_dealloc_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_dealloc_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_fence_after_thread_sync.ll b/cuda-oxide/intrinsics/probes/tcgen05_fence_after_thread_sync.ll index 366d32e0b6..0e45a4dadf 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_fence_after_thread_sync.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_fence_after_thread_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_fence_before_thread_sync.ll b/cuda-oxide/intrinsics/probes/tcgen05_fence_before_thread_sync.ll index f27b4796bd..ddbb0419f8 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_fence_before_thread_sync.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_fence_before_thread_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_pack16.ll index 0fa7521577..654f135e8f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_raw.ll index ca767628b3..8ecb736a3b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_pack16.ll index 077549ae3f..b4a0c57f37 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_raw.ll index 4262807b09..f0e894ac14 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_pack16.ll index 3a59c14349..29f8c943af 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_raw.ll index f5018f6a30..b883922620 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_pack16.ll index cdb8d8862b..5ebdfa07d1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_raw.ll index 0dfb7a5a31..19fe998b58 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_pack16.ll index 4b6dcababb..29f0a4da88 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_raw.ll index cbd3f33cf1..2c196cb255 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_pack16.ll index 784cd5c303..ba617cc777 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_raw.ll index b6ec1430a9..5e9a1ed77c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_pack16.ll index 965322e2e0..e0758f5e9a 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_raw.ll index 4890a7875d..0a11d8e6b3 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_pure.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_pure.ll index e08f464230..c3f17a3684 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_pure.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_pure.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_pack16.ll index 8f5b00c775..b6db4156d7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_raw.ll index da304e8611..db22c3d606 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_pack16.ll index 45befb7748..9f9053197a 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_raw.ll index 7845e154c8..4ecba42549 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_pack16.ll index 11d707bd04..445ce8c424 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_raw.ll index 4c48c687fd..a84af37340 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_pack16.ll index f93aa0988a..f3f1ebd857 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_raw.ll index 59b2f4f243..f1570114a6 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_pack16.ll index f96fbb515b..534c9f5284 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_raw.ll index d24ebbb96c..ac5b095605 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pack16.ll index 61d69e9e59..b8d3a2ed36 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pure.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pure.ll index 2fb63ba170..21fad4493b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pure.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pure.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_raw.ll index e73a78f3b2..fc043eef36 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_pack16.ll index 0e095e0cbd..0ca708e6b8 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_raw.ll index 2c3b19489d..451cbfb66f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_pack16.ll index 87848ee658..603f1dcdd2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_raw.ll index a262eafb58..2c04920587 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_pack16.ll index 1b044e5241..2bb10a22e7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_raw.ll index 6c7fdd1c06..9032db7975 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_pack16.ll index 3af7ee31d4..90e1cc3145 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_raw.ll index a9e36d2b19..17acd3f98b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_pack16.ll index a292a00f41..e999da458f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_raw.ll index 3b03596b7e..c98def2fa1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_pack16.ll index c3fa6569dd..a3538f2df2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_raw.ll index cea4d9dcba..9705628d6a 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_pack16.ll index 3895fb5b33..0fe5eb2c31 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_raw.ll index f142ea7d01..292285b034 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_pack16.ll index b0af335181..9a09747ee1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_raw.ll index b8f7c7a570..b3aeaa095f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_pack16.ll index 289175bedb..d86d627843 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_raw.ll index 3955dccb9e..f1f0f13848 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_pack16.ll index 65d8524dad..b33d205fa9 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_raw.ll index 5d77edd061..d61d019042 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_pack16.ll index cb6c524e5b..89fc3132f6 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_raw.ll index e3bb7911f0..6f0ea31422 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_pack16.ll index b16dbaf336..67510cdbfe 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_raw.ll index ecad9aae82..f6e101241a 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_pack16.ll index 56fc9f9ccd..b139cd3443 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_raw.ll index f350d79670..538ab0c3ce 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_pack16.ll index e6f6800cba..607b734459 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_raw.ll index 55a3829eb3..2a67a33d28 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_pack16.ll index f4300e6dcf..7f94ca3e87 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_raw.ll index 462f29d76d..728c959bf9 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_pack16.ll index 940f635d74..66d8d75f13 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_raw.ll index 6be7884d16..da55fd3b97 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_pack16.ll index 998b60770a..f08d530616 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_raw.ll index 77b4ed559d..047a98cae3 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_pack16.ll index 12506d91fd..166d051296 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_raw.ll index 5a5cf5eb1f..58d663d5c0 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_pack16.ll index 0b78d82abd..d8572b7892 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_raw.ll index 459897a5cf..2fdc8d871f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_pack16.ll index bbed1329f9..5e48464ff1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_raw.ll index 3b727c2da9..6d2b31f570 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_pack16.ll index dc4d6630f0..df7cf79bd7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_raw.ll index 9fc30e3663..1362abdb60 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_pack16.ll index 342d3fe813..5a2dafd8c1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_raw.ll index e5c5d77ceb..4d4f095439 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_pack16.ll index c1c794c1e5..2e7b75e6c3 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_raw.ll index 1e570737d4..7129d206e5 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_pack16.ll index 08285b0414..e7d20e32d5 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_raw.ll index 739dd7f198..31f8f8fb0b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_load_wait.ll b/cuda-oxide/intrinsics/probes/tcgen05_load_wait.ll index eb887c6fe3..e59d9b0b8d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_load_wait.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_load_wait.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m1.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m1.ll index 9cb6edaf64..94ccffa8dc 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m3.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m3.ll index 25ef58a188..ad776fddf5 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_e3m2.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_e3m2.ll index 32de5ee575..1c88e97821 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_e4m3.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_e4m3.ll index 79aa74540c..4b5474b7b1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_e5m2.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_e5m2.ll index 1fa831b85b..72b95ab37e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_f16.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_f16.ll index 692eee13f1..c92f7e65bf 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_f16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_f16_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_f16_cg2.ll index 751edaa61e..f945c5f1d8 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_f16_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_f16_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_shared.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_shared.ll index 01c0278deb..db759c34e1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_shared.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_shared.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_shared.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_shared.ll index d326b3f167..8203da7f82 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_shared.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_shared.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor.ll index ff12ee9a46..45a19e65d1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor_ashift.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor_ashift.ll index 91f7dd4cd8..c125f067c1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor_ashift.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor_ashift.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor.ll index 902bd8c2e7..fbfd2296a6 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor_ashift.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor_ashift.ll index de7a581e67..7b325fa47f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor_ashift.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor_ashift.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_bf16.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_bf16.ll index 61f19238bd..29a8ddaf26 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_bf16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m1.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m1.ll index ad77f195f4..544b9c4b80 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m3.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m3.ll index 0f203e427c..1d6904d8f9 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e3m2.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e3m2.ll index 8ee513f131..76c5b1b37b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e4m3.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e4m3.ll index 028384a0fd..ada3c627f2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e5m2.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e5m2.ll index f2296fc1e9..e0ff90978d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_f16.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_f16.ll index f231aaff57..d40b13f9a4 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_f16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared.ll index d5c00d1af3..abbf388f1e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared_zero_col_mask.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared_zero_col_mask.ll index 74c0222e41..99949fc6d9 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared_zero_col_mask.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared_zero_col_mask.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared.ll index 8ea1ab8168..132ffce279 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared_zero_col_mask.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared_zero_col_mask.ll index 2f95673c5e..f611a556c7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared_zero_col_mask.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared_zero_col_mask.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor.ll index 04f2bf257d..3110fff271 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor_zero_col_mask.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor_zero_col_mask.ll index 59443e1c13..c4db4c5cd3 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor_zero_col_mask.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor_zero_col_mask.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor.ll index 58ea2e5d05..02bf7ec13b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor_zero_col_mask.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor_zero_col_mask.ll index ef50d4c45e..28e680dc1b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor_zero_col_mask.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor_zero_col_mask.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tf32.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tf32.ll index 4f49694de5..b3439019f2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tf32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tf32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit.ll b/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit.ll index f09243aacc..ce50df4dd7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit_cg2.ll index 27604d7cad..c13a8a445d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_shift_down.ll b/cuda-oxide/intrinsics/probes/tcgen05_shift_down.ll index d400646ec1..b48cdb7039 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_shift_down.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_shift_down.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_shift_down_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_shift_down_cg2.ll index 9fd2e8767a..97f9c89e4e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_shift_down_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_shift_down_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_raw.ll index 64b7ddc3a8..fb248594e7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_unpack16.ll index 0bf41023bb..93f09bf3fe 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_raw.ll index 8b6e03900e..52a47b7ed1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_unpack16.ll index bfe4ba8131..a074a4b763 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_raw.ll index 7ab4405188..0b82e40eef 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_unpack16.ll index e1133bcf48..300a240567 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_raw.ll index 220b9c23b2..4871c5267f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_unpack16.ll index 8ee92bc4fd..28e32efaae 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_raw.ll index a3d5246bbd..294f2c83f5 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_unpack16.ll index 27c2fd5a26..777d157f36 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_raw.ll index 4f0d12000e..7db27db518 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_unpack16.ll index b527efdfad..9dd6749cdc 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_raw.ll index 067fdc600d..a7336aeefe 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_unpack16.ll index 363284dc85..87e1c9cea9 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_raw.ll index 9e27c55fda..7f00896842 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_unpack16.ll index 3702f1f277..fef140df28 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_raw.ll index 822614aa14..1b6bad878c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_unpack16.ll index c40691eeb1..4dcba9999b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_raw.ll index 1cdd7269ca..c133cc147c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_unpack16.ll index f1ed5d0271..c0b2003577 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_raw.ll index 0b0c95f87e..3277935b53 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_unpack16.ll index 8e6ce10854..ad9dc535f8 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_raw.ll index 06fbdf0122..ff9182aa4a 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_unpack16.ll index ccc8ba27b9..917b97391f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_raw.ll index c4e1e51f16..a2974a1d9d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_unpack16.ll index 192ee95c43..97bc531dc8 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_raw.ll index 46816f87dc..ec09360944 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_unpack16.ll index 2349b1c579..051d068745 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_raw.ll index a6cad351f2..63deba7de9 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_unpack16.ll index d8649d8638..e557e36599 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_raw.ll index a24e68b4c1..363afe0c42 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_unpack16.ll index 9bbacfcc02..4fa8dc45b1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_raw.ll index ebe47605fa..cf96f76831 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_unpack16.ll index 8ffd08f2fb..371b6cc725 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_raw.ll index 680697339d..c38d9351b3 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_unpack16.ll index f6334b3c95..5f28cff041 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_raw.ll index c89a62e8f0..e6d132ac35 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_unpack16.ll index 91e683d58e..d8abef41c8 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_raw.ll index fe83569fe6..5edceaf14c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_unpack16.ll index 45a8d44a1a..f33d6f1e57 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_raw.ll index 8832f46ece..6af58de11f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_unpack16.ll index e48d74e08a..0c7dfa2495 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_raw.ll index 877c894308..4560568395 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_unpack16.ll index 02a248d768..5eed0017ce 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_raw.ll index 1584173546..560134056f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_unpack16.ll index 7976e12d59..2d450f4daf 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_raw.ll index 3122a2f05e..b4737d45a0 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_unpack16.ll index 008cd29bd2..887071877f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_raw.ll index 01970fc430..1905ef529f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_unpack16.ll index eecb02db79..dc838548cd 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_raw.ll index 09bc873585..78c8a15fca 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_unpack16.ll index 9c9dc50191..ddc9d8bff8 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_raw.ll index e4497f8d3b..16a61e56ac 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_unpack16.ll index 6ecaa2be81..518c60e837 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_raw.ll index 6f6ba79d0f..50ae70c7b7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_unpack16.ll index a3f7cd2991..7dbf1f6a17 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_raw.ll index 54aa854e3f..30ce010373 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_unpack16.ll index 957eef2dda..c7c831b760 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_raw.ll index b214790eb4..b69f82a997 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_unpack16.ll index f241a9b2fc..f0c6639399 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_raw.ll index 17851de6fb..1b2a698191 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_unpack16.ll index e08923d17e..b17af9d44c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_raw.ll index 3c3c4dd2f5..b45f70b619 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_unpack16.ll index d5fb40372a..c74bd29c67 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_raw.ll index 9045a44c01..4ea6689985 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_unpack16.ll index 7ea3724bc3..c0797151f9 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_raw.ll index 48dd2324a9..ef4ceb0976 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_unpack16.ll index 913ccb9177..66a495d9b9 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_raw.ll index b0fcb4b4c0..4bdea404f2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_unpack16.ll index 0a48112520..4a5ad972e1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_raw.ll index 0545874478..017b4ebaa1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_unpack16.ll index 21b1c32a06..e78ad98072 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_raw.ll index 3d7bdbc49f..e2e6f7cd7b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_unpack16.ll index 4e99fda579..8289c54996 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_store_wait.ll b/cuda-oxide/intrinsics/probes/tcgen05_store_wait.ll index dc137a3532..315874d0d1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_store_wait.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_store_wait.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_box_dim.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_box_dim.ll index 553cc0c6a0..0d739abea6 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_box_dim.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_box_dim.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_element_stride.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_element_stride.ll index 4bfbf8cf93..f61f2bc6e0 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_element_stride.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_element_stride.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_element_type.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_element_type.ll index cda18f2f22..ee9a320950 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_element_type.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_element_type.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_fill_mode.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_fill_mode.ll index 16c8b324de..c55cb9da60 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_fill_mode.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_fill_mode.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_global_address.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_global_address.ll index 1917c5f452..8a9cbb752e 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_global_address.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_global_address.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_global_dim.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_global_dim.ll index 58997d9a1e..66a9434f74 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_global_dim.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_global_dim.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_global_stride.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_global_stride.ll index a2f7bdbd23..e01a86f170 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_global_stride.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_global_stride.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_interleave_layout.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_interleave_layout.ll index 8cc37553ce..f734c0b20d 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_interleave_layout.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_interleave_layout.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_rank.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_rank.ll index 1f8c30b0f4..291fb0fa78 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_rank.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_rank.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_atomicity.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_atomicity.ll index 6710cc26ee..9b980325c6 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_atomicity.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_atomicity.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_mode.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_mode.ll index 89627a96d5..84181f00a2 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_mode.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_mode.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/thread_idx_x.ll b/cuda-oxide/intrinsics/probes/thread_idx_x.ll index 9ce25322a0..a8c78a4b98 100644 --- a/cuda-oxide/intrinsics/probes/thread_idx_x.ll +++ b/cuda-oxide/intrinsics/probes/thread_idx_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/thread_idx_y.ll b/cuda-oxide/intrinsics/probes/thread_idx_y.ll index 736bfc58a8..14f48ab988 100644 --- a/cuda-oxide/intrinsics/probes/thread_idx_y.ll +++ b/cuda-oxide/intrinsics/probes/thread_idx_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/thread_idx_z.ll b/cuda-oxide/intrinsics/probes/thread_idx_z.ll index c9df45ab16..f881dba482 100644 --- a/cuda-oxide/intrinsics/probes/thread_idx_z.ll +++ b/cuda-oxide/intrinsics/probes/thread_idx_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/threadfence.ll b/cuda-oxide/intrinsics/probes/threadfence.ll index 7bf693618f..48b10e7911 100644 --- a/cuda-oxide/intrinsics/probes/threadfence.ll +++ b/cuda-oxide/intrinsics/probes/threadfence.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/threadfence_block.ll b/cuda-oxide/intrinsics/probes/threadfence_block.ll index 2aa1aa5239..4a9be04599 100644 --- a/cuda-oxide/intrinsics/probes/threadfence_block.ll +++ b/cuda-oxide/intrinsics/probes/threadfence_block.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/threadfence_system.ll b/cuda-oxide/intrinsics/probes/threadfence_system.ll index 567dad42c7..edd3a678a3 100644 --- a/cuda-oxide/intrinsics/probes/threadfence_system.ll +++ b/cuda-oxide/intrinsics/probes/threadfence_system.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/total_smem_size.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/total_smem_size.lib_nvvm.ll index 87e7217cc6..19315a3eb6 100644 --- a/cuda-oxide/intrinsics/probes/total_smem_size.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/total_smem_size.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/total_smem_size.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/total_smem_size.llvm_nvptx.ll index 2dceb092bb..97c3040aac 100644 --- a/cuda-oxide/intrinsics/probes/total_smem_size.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/total_smem_size.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/trap.ll b/cuda-oxide/intrinsics/probes/trap.ll index d1c64b5ce7..e7a0de7eaf 100644 --- a/cuda-oxide/intrinsics/probes/trap.ll +++ b/cuda-oxide/intrinsics/probes/trap.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/uni_sync.ll b/cuda-oxide/intrinsics/probes/uni_sync.ll index 85ddb9bf16..d0e749778a 100644 --- a/cuda-oxide/intrinsics/probes/uni_sync.ll +++ b/cuda-oxide/intrinsics/probes/uni_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/warpid.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/warpid.lib_nvvm.ll index 21c8ce359c..292f0b42f3 100644 --- a/cuda-oxide/intrinsics/probes/warpid.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/warpid.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/warpid.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/warpid.llvm_nvptx.ll index 73c5882d2e..2d1016da5c 100644 --- a/cuda-oxide/intrinsics/probes/warpid.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/warpid.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/wgmma_commit_group.ll b/cuda-oxide/intrinsics/probes/wgmma_commit_group.ll index 5c6be95e36..d716626831 100644 --- a/cuda-oxide/intrinsics/probes/wgmma_commit_group.ll +++ b/cuda-oxide/intrinsics/probes/wgmma_commit_group.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/wgmma_fence.ll b/cuda-oxide/intrinsics/probes/wgmma_fence.ll index 2262c1f57c..6e65e4eb7b 100644 --- a/cuda-oxide/intrinsics/probes/wgmma_fence.ll +++ b/cuda-oxide/intrinsics/probes/wgmma_fence.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/wgmma_wait_group.ll b/cuda-oxide/intrinsics/probes/wgmma_wait_group.ll index 7d6be0f2f2..b67bbb6bb4 100644 --- a/cuda-oxide/intrinsics/probes/wgmma_wait_group.ll +++ b/cuda-oxide/intrinsics/probes/wgmma_wait_group.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 3f56e2a1acd3d2b767a2a5c91c66a7f2e7276516404e8385da9d2dece37cf0d7. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 1187c7d4a3274dec030ef46efd23bb9bcb32debdf01ba539ae64944718052a6e. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda"