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Fix MVE 1xN convolution padding, im2col bounds, and s4 fallbacks - #258

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veblush:fix/convolve-1xn-padding-and-s4-odd-ch
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veblush wants to merge 1 commit into
ARM-software:mainfrom
veblush:fix/convolve-1xn-padding-and-s4-odd-ch

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@veblush veblush commented Oct 29, 2026

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Fix several edge cases in arm_convolve_1_x_n_s8, arm_convolve_1_x_n_s4, and their MVE buffer-size functions:

  • Clamp total_pad to >= 0 when trailing input columns are unused (e.g. strided VALID convolution).
  • In s8, compute pad_size_right from (pad_x + asym_pad) instead of right_pad_num and clamp num_elem_left/num_elem_right to the available input width so arm_memcpy_s8 does not read past input_data.
  • Fall back to arm_convolve_s8/arm_convolve_s4 when padding is non-SAME/VALID, output_dims->h != 1, left and right padding overlap in s4, or input_ch is odd in s4 (where arm_nn_mat_mul_core_1x_s4 requires byte-aligned weight rows).

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veblush force-pushed the fix/convolve-1xn-padding-and-s4-odd-ch branch from d44b2d0 to e730657 Compare October 29, 2026 20:48
quant_params,
input_dims,
input_data,
filter_dims,

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Can the guard be kept here and add the routing logic to the wrapper instead?

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Done. Kept the guards in arm_convolve_1_x_n_s4/s8 and moved the checks to the wrappers and buffer-size helpers.

const int32_t bias_data[2] = {5, -4};
const int32_t output_mult[2] = {0x40000000, 0x40000000};
const int32_t output_shift[2] = {1, 1};
const int8_t kernel_data[40] = {1, -1, 2, 1, -2, 1, 1, -1, 2, -1, 1, 2, 2, 3, 1, 2, -1, 2, -2, 1,

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Can you make datasets reproducible through existing generators and TFL/TFLM reference kernels following unit test conventions (Tests/UnitTest/README.md:147)?
Same in other unit test.

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Done. Replaced the hand-written test arrays in both unit tests with datasets from json.

@veblush
veblush force-pushed the fix/convolve-1xn-padding-and-s4-odd-ch branch from e730657 to d5b14e5 Compare November 3, 2026 00:27

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