FW Lab Instructions and Project Spec Found here
This lab is meant to teach you how to think about firmware while giving enough practice to get you started writing it.
The firmware lab will seem challenging, but succeeding in everything is not the point. The goal will be to walk out of the lab being able to conceptually understand firmware, while getting some reps in writing it. We are looking for effort and understanding, not code accuracy, so please use this as an opportunity to learn.
Section 6 additional reading is more challenging and not fully needed to complete the final project. We urge ambitious members to try and understand the sections, but we would prefer for members to prioritize the other sections more heavily. However, the bonus tasks of the project can dip into the content of the additional readings, so use this section as a resource.
- Section 0: Introduction to Firmware
- Section 1: C Basics
- Section 2: ESP32 Basics
- Section 3: Design Basics
- Section 4: Asynchronous Comm Protocols
- Section 5: Synchronous Comm Protocols
- Section 6: Additional Reading
- Section 7: Final Project
Below is the timeline for the FW lab. Extenuating circumstances notwithstanding and PMs informed (we have already considered the CS61A midterm), failure to meet checkpoint deliverables will result in being dropped from onboarding.
- 9/28: Firmware Lab released!
- 9/30: Finish readings and exercises
- 10/4: (CHECKPOINT 1 DUE 11:59PM) Design Doc turned in
- 10/5: Design Doc reviewed and feedback provided
- 10/7: Hardware setup for lab is available for testing
- 10/12: (CHECKPOINT 2 DUE 8:00PM) Code reviewed, ran and report written
- Turn in your design doc by 10/4 11:59PM
- Complete a code review
- Test your code on hardware
- Submit your report by 10/12 8:00PM
Kadon L, Matthew L, Huan N, Emma C, Howard Y, Simon N, Tashvi M, Ahmed A
The lab and project structure is inspired by many courses at UC Berkeley including CS61A/B/C and 162 💀