PredecodeRE - An analysis of the predecode cache used in intels goldmont plus microarchitecture
Because the predecode cache logic is undocumented and I couldn't find anyone else who has reverse engineered it yet, all thats documented in relation to it (in the optimisation reference manual v1) is that it's 64kb...
src/driver - Source code for driver used for reversing
analysis/references.md - Useful resources & references for this project
analysis/results.md - Overall analysis of the predecode cache