All 11 BIR_ATOMIC_* opcodes and the 7 shuffle, ballot and vote opcodes refuse on the RV32 path. The baby cores are RV32IM with no A extension, so atomics need either the Tensix hardware semaphores in the 0xFFE80000 MMIO range or an L1 software protocol.
Warp primitives are the harder question. A baby core is a single hardware thread with no SIMT and no warp scheduler, so there is no warp to shuffle across. Probably wants a decision on what a warp means in this execution model before any lowering is attempted, rather than picking something and finding out later it was wrong.
All 11 BIR_ATOMIC_* opcodes and the 7 shuffle, ballot and vote opcodes refuse on the RV32 path. The baby cores are RV32IM with no A extension, so atomics need either the Tensix hardware semaphores in the 0xFFE80000 MMIO range or an L1 software protocol.
Warp primitives are the harder question. A baby core is a single hardware thread with no SIMT and no warp scheduler, so there is no warp to shuffle across. Probably wants a decision on what a warp means in this execution model before any lowering is attempted, rather than picking something and finding out later it was wrong.