Remove bitvec runtime dependency (fixes #114)

[rudib]

Fixes #114.

Why

bitvec depends on radium, which fails to compile on targets without AtomicU64, such as the ESP32-S3 (xtensa-esp32s3-none-elf):

error[E0432]: unresolved imports `core::sync::atomic::AtomicI64`, `core::sync::atomic::AtomicU64`
  --> radium-0.7.0/src/lib.rs:53:34

That blocks downstream crates like usbd-human-interface-device on those chips. packed_struct only used bitvec in LsbInteger::pack/unpack, to shift a bit range when an LSB-endian integer isn't a whole number of bytes wide (e.g. Integer<u16, Bits<10>>).

What changed

• LsbInteger::pack/unpack now use two small private helpers, msb0_shift_right and msb0_shift_left, in types_num.rs. They reproduce BitSlice::<u8, Msb0>::shift_end/shift_start on the [0, len) bit range. They move one bit at a time, which is plenty fast since the arrays are at most 32 bytes (256 with byte_types_256).
• bitvec moved from [dependencies] to [dev-dependencies] of packed_struct. The workspace dependency entry is kept for that.
• PackingError::BitsError is now unused, but I kept it to avoid a breaking API change.

Tests

• Unit test test_msb0_shift_against_bitvec: compares both helpers against bitvec's shift_end/shift_start for every len and shift amount on 1–8 byte buffers, over fixed and pseudo-random byte patterns.
• New packing_lsb_unaligned.rs integration test: no existing test exercised this code path, since all current endian="lsb" tests use whole-byte widths. The new test uses 10-, 12-, 20-, 3- and 27-bit LSB fields. Its expected packed bytes were recorded from the previous bitvec implementation before the swap. It also round-trips 1,000 pseudo-random structs.

Verification

• cargo test --workspace passes.
• cargo clippy -p packed_struct --all-targets reports no warnings.
• cargo tree -p packed_struct -e normal no longer lists bitvec/radium.
• cargo +esp build -p packed_struct --no-default-features --target xtensa-esp32s3-none-elf -Zbuild-std=core fails on master with the error above and succeeds on this branch.
• riscv32imc-unknown-none-elf and thumbv6m-none-eabi built fine even before this change. The failure is specific to Xtensa targets, because radium 0.7 doesn't know they lack 64-bit atomics.

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