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gen_icf_map_lh1_06 finds a match for every position with a gather of 16 hash table entries, a scatter of the 16 positions, and two gathers of 8 qwords at the matches. The lookups of each vector of positions wait for the previous vector's scatter. Add gen_icf_map_lh1_06_nogather, which works in four stages, each a vector behind the one before: hash and find conflicts, look up and update the hash table, find the distances and load the data there, then find the match lengths and write the match map. Its lookups and data loads are scalar, and it stores the positions as 2-byte entries. The scatter stores 4 bytes per position, so where an earlier position in the vector has a hash one higher, it puts back that entry's old value. vpconflictd finds these vectors, about 0.3% of Silesia's, and they store 4-byte entries as the scatter does, so the output does not change. A build that selected it on every processor with AVX-512 made level 3 31% and 32% slower on Emerald Rapids and Granite Rapids and 5% faster on Ice Lake. So give mbin_dispatch_init6 an optional 7th function for AMD processors and select gen_icf_map_lh1_06_nogather that way. Other processors with AVX-512 keep gen_icf_map_lh1_06. Signed-off-by: Parker Loflin <parker@cronstable.dev>
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gen_icf_map_lh1_06, the AVX-512 level 3 match finder, updates its hash table with a gather and a scatter per 16 positions, so each vector's lookups wait for the previous vector's scatter. This PR addsgen_icf_map_lh1_06_nogather, which uses scalar loads and 2-byte stores in four stages one vector apart, and 4-byte stores wherevpconflictdfinds that the scatter's stores overlap, so the hash table and match map stay the same.Which CPUs run it
AMD processors with AVX-512 (Zen 4, Zen 5), at level 3:
mbin_dispatch_init6takes an optional 7th function, which it selects instead of the 6th on AuthenticAMD processors. Selected on every AVX-512 processor, the new function made level 3 whole files 30.9% slower on Emerald Rapids and 32.4% slower on Granite Rapids, and 4.6% faster on Ice Lake (run, both builds on top of my other open changes).Output does not change.
Results
Level 3 MB/s, master → this PR, in-process A/B on GitHub runners (Zen 4, Zen 5, harness): median over all runs (two per runner) of the best of 11 rounds; in parentheses, the median over runs of the change in median-round throughput; Silesia files and 256 slices of the Silesia tar.
Testing
make checkpasses on Linux and natively on Windows 11 (mingw, Ryzen 7 9800X3D, which selects the new function). On Windows, xmm6-xmm15, the callee-saved GPRs, rsp and DF survive every call to the new function and its dispatcher.PROT_NONEpage, and stateless and stateful level 3 output equals master's.mbin_dispatch_init6users assemble to the same objects as on master.