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Rework PDK handling and add post-synthesis simulation Full Flow #343: Pull request #132 synchronize by phsauter
2h 7m 40s phsauter/cmos5l
phsauter/cmos5l
2h 7m 40s
ci: test RTL and post-Yosys simulations Short Flow #455: Commit 0033797 pushed by phsauter
27m 41s phsauter/cmos5l
phsauter/cmos5l
27m 41s
ci: test RTL and post-Yosys simulations lint-format #170: Commit 0033797 pushed by phsauter
22s phsauter/cmos5l
phsauter/cmos5l
22s
Rework PDK handling and add post-synthesis simulation Full Flow #342: Pull request #132 synchronize by phsauter
2h 19m 3s phsauter/cmos5l
phsauter/cmos5l
2h 19m 3s
sim: validate post-Yosys netlists Short Flow #454: Commit 3bb5494 pushed by phsauter
28m 53s phsauter/cmos5l
phsauter/cmos5l
28m 53s
sim: validate post-Yosys netlists lint-format #169: Commit 3bb5494 pushed by phsauter
1m 2s phsauter/cmos5l
phsauter/cmos5l
1m 2s
ArtistIC Render ArtistIC Render #56: completed by phsauter
34m 50s
34m 50s
Rework PDK handling and add post-synthesis simulation Full Flow #341: Pull request #132 synchronize by phsauter
1h 23m 38s phsauter/cmos5l
phsauter/cmos5l
1h 23m 38s
pdk: handle dangling technology links lint-format #168: Commit fa7e0c5 pushed by phsauter
1m 29s phsauter/cmos5l
phsauter/cmos5l
1m 29s
pdk: handle dangling technology links Short Flow #453: Commit fa7e0c5 pushed by phsauter
12m 7s phsauter/cmos5l
phsauter/cmos5l
12m 7s
Rework PDK handling and add post-synthesis simulation Full Flow #340: Pull request #132 synchronize by phsauter
2h 11m 11s phsauter/cmos5l
phsauter/cmos5l
2h 11m 11s
verilator: preserve netlist dry runs lint-format #167: Commit a760d4b pushed by phsauter
26s phsauter/cmos5l
phsauter/cmos5l
26s
verilator: preserve netlist dry runs Short Flow #452: Commit a760d4b pushed by phsauter
11m 42s phsauter/cmos5l
phsauter/cmos5l
11m 42s
xilinx: Add support for Digilent Basys3 board (#130) Short Flow #451: Commit 511f5fa pushed by phsauter
11m 46s main
main
11m 46s
xilinx: Add support for Digilent Basys3 board (#130) Full Flow #339: Commit 511f5fa pushed by phsauter
1h 4m 15s main
main
1h 4m 15s
xilinx: Add support for Digilent Basys3 board (#130) lint-format #166: Commit 511f5fa pushed by phsauter
24s main
main
24s
xilinx: Add support for Digilent Basys3 board Full Flow #338: Pull request #130 synchronize by FrancescoConti
1h 6m 13s FrancescoConti:main
FrancescoConti:main
1h 6m 13s
Rework PDK handling and add post-synthesis simulation Full Flow #337: Pull request #132 synchronize by phsauter
2h 2m 59s phsauter/cmos5l
phsauter/cmos5l
2h 2m 59s
verilator: preserve netlist dry runs Short Flow #450: Commit 99ad645 pushed by phsauter
12m 4s phsauter/cmos5l
phsauter/cmos5l
12m 4s
verilator: preserve netlist dry runs lint-format #165: Commit 99ad645 pushed by phsauter
31s phsauter/cmos5l
phsauter/cmos5l
31s
Rework PDK handling and add post-synthesis simulation Full Flow #336: Pull request #132 synchronize by phsauter
2h 9m 22s phsauter/cmos5l
phsauter/cmos5l
2h 9m 22s
flow: keep dry runs read-only Short Flow #449: Commit f9e9a61 pushed by phsauter
13m 55s phsauter/cmos5l
phsauter/cmos5l
13m 55s
flow: keep dry runs read-only lint-format #164: Commit f9e9a61 pushed by phsauter
20s phsauter/cmos5l
phsauter/cmos5l
20s
Rework PDK handling and add post-synthesis simulation Full Flow #335: Pull request #132 synchronize by phsauter
2h 8m 27s phsauter/cmos5l
phsauter/cmos5l
2h 8m 27s
flow: preserve dry-run and compile failures Short Flow #448: Commit f265588 pushed by phsauter
12m 22s phsauter/cmos5l
phsauter/cmos5l
12m 22s