[Tzeentchnet]

Summary

• Mask VIF0 and VIF1 MPG destinations to their micro-memory address ranges.
• Wrap payload bytes that cross the end of VU micro memory back to address zero.
• Validate the complete MPG payload before modifying micro memory.

Rationale

MPG addresses and payloads operate within fixed-size VU micro memory (4 KiB for VU0 and 16 KiB for VU1). The current interpreter truncates uploads at the end of either region and ignores VIF1 destinations outside the first 16 KiB instead of applying the address mask. A truncated packet can also partially update memory when its first segment reaches the end of the buffer.

The updated behavior matches PCSX2's VIF implementation: destination addresses are masked to the target VU's micro-memory size, and crossing uploads are split between the end and beginning of that memory.

Testing

Added focused VIF0 and VIF1 coverage for:

• payloads crossing the micro-memory boundary;
• immediate values 0x0200 (VIF0) and 0x0800 (VIF1) aliasing address zero;
• incomplete crossing payloads leaving micro memory unchanged.

Windows Release builds:

• MSVC 19.44: ps2x_tests — 448 passed, 0 failed.
• ClangCL 19.1.5: ps2x_tests — 448 passed, 0 failed.