`armv7a-none-eabi` sets both fpregs and soft-float features

[jonathanpallant]

I tried this code:

rustc +nightly --print cfg --target armv7a-none-eabi | grep target_feature

I expected to see this happen: no FPU related features would be set

Instead, this happened: both soft-float and vfp3 features were set

target_feature="aclass"
target_feature="d32"
target_feature="dsp"
target_feature="fp64"
target_feature="fpregs"
target_feature="soft-float"
target_feature="thumb2"
target_feature="v5te"
target_feature="v6"
target_feature="v6k"
target_feature="v6m"
target_feature="v6t2"
target_feature="v7"
target_feature="v8m"
target_feature="vfp2"
target_feature="vfp2sp"
target_feature="vfp3"

This doesn't happen on targets like armv7r-none-eabi.

rustc +nightly --print cfg --target armv7r-none-eabi | grep target_feature

target_feature="dsp"
target_feature="rclass"
target_feature="thumb2"
target_feature="v5te"
target_feature="v6"
target_feature="v6k"
target_feature="v6m"
target_feature="v6t2"
target_feature="v7"
target_feature="v8m"

Meta

rustc --version --verbose:

rustc +nightly --version --verbose
rustc 1.100.0-nightly (cea272fa3 2026-09-07)
binary: rustc
commit-hash: cea272fa356e94bd2ee2cadf376630aa0683867a
commit-date: 2026-09-07
host: aarch64-apple-darwin
release: 1.100.0-nightly
LLVM version: 23.1.1

[jonathanpallant]

Spotted whilst reviewing #160911

cc @adamgemmell

[adamgemmell]

Not enabling fp registers at all would be consistent with the aarch64 softfloat targets. The platform support docs say this:

Rust targets ending with eabi use the so-called soft-float ABI: functions which take f32 or f64 as arguments will have those values packed into integer registers. This means that an FPU is not required from an ABI perspective, but within a function floating-point instructions may still be used if the code is compiled with a target-cpu or target-feature option that enables FPU support.

which implies that this behaviour wasn't intended to be the default.

[jonathanpallant]

I would be surprised if I was using an *-eabi target and rustc let me use FPU registers in an inline assembly block.

Which this target currently allows: https://rust.godbolt.org/z/z4s9Yabsr

[jonathanpallant]

I think this will do the trick:

diff --git a/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs
index 01d55ce979e..a16678dcd42 100644
--- a/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs
@@ -4,7 +4,7 @@

 pub(crate) fn target() -> Target {
     Target {
-        llvm_target: "armv7a-none-eabi".into(),
+        llvm_target: "arm-none-eabi".into(),
         metadata: TargetMetadata {
             description: Some("Bare Armv7-A".into()),
             tier: Some(2),
@@ -17,7 +17,7 @@ pub(crate) fn target() -> Target {
         options: TargetOptions {
             cfg_abi: CfgAbi::Eabi,
             llvm_floatabi: Some(FloatAbi::Soft),
-            features: "+soft-float,-neon,+strict-align".into(),
+            features: "+v7,+db,+dsp,+aclass,+perfmon,+strict-align".into(),
             max_atomic_width: Some(64),
             has_thumb_interworking: true,
             ..base::arm_none::opts()

$ ./target/debug/diff $(rustup which rustc --toolchain=nightly) $(rustup which rustc --toolchain=stage1) armv7a-none-eabi
Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "armv7a-none-eabi"
Compiler 2 adds : ""
Compiler 2 drops: "d32, fp64, fpregs, soft-float, vfp2, vfp2sp, vfp3"
Both have       : "aclass, dsp, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m"