Rustc pull update

crates/core_arch/src/aarch64/mte.rs

@@ -2,7 +2,7 @@
 //!
 //! [ACLE documentation](https://arm-software.github.io/acle/main/acle.html#markdown-toc-mte-intrinsics)
 
-unsafe extern "unadjusted" {
+unsafe extern "llvm-intrinsic" {
     #[link_name = "llvm.aarch64.irg"]
     fn irg_(ptr: *const (), exclude: i64) -> *const ();
     #[link_name = "llvm.aarch64.gmi"]

crates/core_arch/src/aarch64/prefetch.rs

@@ -1,7 +1,7 @@
 #[cfg(test)]
 use stdarch_test::assert_instr;
 
-unsafe extern "unadjusted" {
+unsafe extern "llvm-intrinsic" {
     #[link_name = "llvm.prefetch.p0"]
     fn prefetch(p: *const i8, rw: i32, loc: i32, ty: i32);
 }

crates/core_arch/src/aarch64/rand.rs

@@ -5,7 +5,7 @@
 #[cfg(test)]
 use stdarch_test::assert_instr;
 
-unsafe extern "unadjusted" {
+unsafe extern "llvm-intrinsic" {
     #[link_name = "llvm.aarch64.rndr"]
     fn rndr_() -> Tuple;
 

crates/core_arch/src/aarch64/sve/mod.rs

@@ -138,7 +138,7 @@ macro_rules! impl_internal_sve_predicate {
             #[target_feature(enable = "sve")]
             unsafe fn sve_into(self) -> svbool_t {
                 #[allow(improper_ctypes)]
-                unsafe extern "unadjusted" {
+                unsafe extern "llvm-intrinsic" {
                     #[cfg_attr(
                         target_arch = "aarch64",
                         link_name = concat!("llvm.aarch64.sve.convert.to.svbool.nxv", $elt, "i1")
@@ -155,7 +155,7 @@ macro_rules! impl_internal_sve_predicate {
             #[target_feature(enable = "sve")]
             unsafe fn sve_into(self) -> $name {
                 #[allow(improper_ctypes)]
-                unsafe extern "unadjusted" {
+                unsafe extern "llvm-intrinsic" {
                     #[cfg_attr(
                         target_arch = "aarch64",
                         link_name = concat!("llvm.aarch64.sve.convert.from.svbool.nxv", $elt, "i1")

crates/core_arch/src/amdgpu/mod.rs

@@ -7,7 +7,7 @@
 //! [LLVM implementation]: https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
 
 #[allow(improper_ctypes)]
-unsafe extern "unadjusted" {
+unsafe extern "llvm-intrinsic" {
     #[link_name = "llvm.amdgcn.workitem.id.x"]
     safe fn llvm_workitem_id_x() -> u32;
     #[link_name = "llvm.amdgcn.workitem.id.y"]

crates/core_arch/src/arm/dsp.rs

@@ -23,7 +23,7 @@
 #[cfg(test)]
 use stdarch_test::assert_instr;
 
-unsafe extern "unadjusted" {
+unsafe extern "llvm-intrinsic" {
     #[link_name = "llvm.arm.smulbb"]
     fn arm_smulbb(a: i32, b: i32) -> i32;
 

crates/core_arch/src/arm/neon.rs

@@ -4,7 +4,7 @@ use crate::core_arch::arm_shared::neon::*;
 use stdarch_test::assert_instr;
 
 #[allow(improper_ctypes)]
-unsafe extern "unadjusted" {
+unsafe extern "llvm-intrinsic" {
     #[link_name = "llvm.arm.neon.vbsl.v8i8"]
     fn vbsl_s8_(a: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t;
     #[link_name = "llvm.arm.neon.vbsl.v16i8"]

crates/core_arch/src/arm/sat.rs

@@ -27,7 +27,7 @@ pub unsafe fn __usat<const WIDTH: u32>(x: i32) -> u32 {
     arm_usat(x, WIDTH as i32)
 }
 
-unsafe extern "unadjusted" {
+unsafe extern "llvm-intrinsic" {
     #[link_name = "llvm.arm.ssat"]
     fn arm_ssat(x: i32, y: i32) -> i32;
 

crates/core_arch/src/arm/simd32.rs

@@ -93,7 +93,7 @@ macro_rules! dsp_call {
     };
 }
 
-unsafe extern "unadjusted" {
+unsafe extern "llvm-intrinsic" {
     #[link_name = "llvm.arm.qadd8"]
     fn arm_qadd8(a: i32, b: i32) -> i32;
 

crates/core_arch/src/arm_shared/barrier/mod.rs

@@ -144,7 +144,7 @@ where
     arg.__isb()
 }
 
-unsafe extern "unadjusted" {
+unsafe extern "llvm-intrinsic" {
     #[cfg_attr(
         any(target_arch = "aarch64", target_arch = "arm64ec"),
         link_name = "llvm.aarch64.dmb"

crates/core_arch/src/arm_shared/hints.rs

@@ -110,7 +110,7 @@ pub unsafe fn __nop() {
     crate::arch::asm!("nop", options(nomem, nostack, preserves_flags));
 }
 
-unsafe extern "unadjusted" {
+unsafe extern "llvm-intrinsic" {
     #[cfg_attr(
         any(target_arch = "aarch64", target_arch = "arm64ec"),
         link_name = "llvm.aarch64.hint"