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1. fpga-ai-accelerator fpga-ai-accelerator Public

   Open-source 8×8 INT8 systolic array inference accelerator — from RTL to bitstream

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2. HLS_FPGA HLS_FPGA Public

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3. kvcache-compress-engine kvcache-compress-engine Public

   COMPRESSION_RATIO = 8× — Hardware KV-cache compression engine eliminates the memory wall in LLM inference. 1,155 LUTs, 1 DSP, 400 MHz.

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4. flashattn-softmax-engine flashattn-softmax-engine Public

   PERF_STALL_CYCLES = 0 — Hardened softmax pipeline eliminates the #1 bottleneck in transformer attention. 550 LUTs, 0 DSPs, 400 MHz.

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5. rope-hls-vs-rtl rope-hls-vs-rtl Public

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6. gnss_spoof_jam_detector_hls_rtl gnss_spoof_jam_detector_hls_rtl Public

   Streaming GNSS spoofing/jamming detection accelerator - HLS metric engine + RTL NCO/PRN/AXI streaming, verified under cycle-level backpressure in XSim and Zynq UltraScale MPSoC. Vitis HLS 2025.2 sy…

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