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You must be logged in to vote Ordering async copies and sizing dynamic shared memory in the CUDA target
topic:roadmapLong-running goal tracked across several PRs area:analysisTraffic, footprint, cost, and reports area:codegenTargets and code emitted from TIR -
You must be logged in to vote feat(distributed): support distributed features across HIR, analysis, and runtime
topic:roadmapLong-running goal tracked across several PRs topic:distributedMulti-card meshes, sharding, and communication -
You must be logged in to vote feat(hir): settle where cross-device communication semantics live
topic:distributedMulti-card meshes, sharding, and communication area:irHIR, TIR, shard layouts, passes, and printing area:evaluatorReference execution and check -
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