Multi-group CachePool with coherence-free write-through private L1 cache - #24

Open

HHT1228 wants to merge 40 commits into

pulp-platform:dev/wt-l1from

HHT1228:hohung-multi-group

Commits on Jun 15, 2026

init
msc25h24 Ho Tin Hung (hohung)
committed
4c73e96

Commits on Jun 16, 2026

[HW] init L1 private cache controller
msc25h24 Ho Tin Hung (hohung)
committed
d1dcb95
[HW] init L1 private cache controller
msc25h24 Ho Tin Hung (hohung)
committed
1471b1a
[HW] init l1 ctrl and comitter overwrite
HHT1228
committed
e9c5785
unknown reason conflict fix
HHT1228
committed
94e5c68

Commits on Jun 19, 2026

private L1 defs and configs
HHT1228
committed
b9e916a
[HW] L1 instantiate, upstream wiring, and tile_id handling
HHT1228
committed
8ae8f13

Commits on Jun 22, 2026

Commits on Jun 23, 2026

Private L1 bender and dep setup and portid_t matching, sim clear
HHT1228
committed
79c44e9
[Periph] Clean up unused register.

DiyouS
authored and
HHT1228
committed
41a4a29
[SW] Remove unused runtime functions

DiyouS
authored and
HHT1228
committed
2dbe169
[Lint] Fix some small linting issues and adjust L2 ICache size.

DiyouS
authored and
HHT1228
committed
75080d8
[MISC] Clean up Makefile and change the test size for load-store test.

DiyouS
authored and
HHT1228
committed
79d5281
[CFG] Add a 4x4 smaller configuration for faster testing

DiyouS
authored and
HHT1228
committed
c154ed1
[CFG] tiny config setup
HHT1228
committed
3dd812e

Commits on Jun 24, 2026

[SW] simple kernels to test private L1 functions
HHT1228
committed
39dc1dc

Commits on Jun 25, 2026

[CFG][SW] init 4x4 mesh build; replacement/refill sw test
HHT1228
committed
a452ce8

Commits on Jun 26, 2026

[HW] init AMO support impl
HHT1228
committed
08db94b

Commits on Jun 29, 2026

[HW] shared D$ AMO support impl
HHT1228
committed
44e36f8
[SW] amo sanity test
HHT1228
committed
77683f1

Commits on Jun 30, 2026

[HW] hpdcache memIdWidth match with reqid_t
HHT1228
committed
cbe237a
[SW] LRSC amo test
HHT1228
committed
876a581

Commits on Jul 1, 2026

[HW] peripheral reg, port extension, and FSM for private L1 CMO
HHT1228
committed
896e748

Commits on Jul 2, 2026

[SW] private L1 CMO runtime, spin-lock and multi-spin-lock passed
HHT1228
committed
69ee3d1

Commits on Jul 7, 2026

[SW] MCS lock protection for non-coherence L1
HHT1228
committed
7ae5cf6
[SW] fdotp reduction protection for private L1
HHT1228
committed
67af6c8

Commits on Jul 8, 2026

[HW] CMO periph reg parameterize (follow total core num)
HHT1228
committed
ef0d64d

Commits on Jul 9, 2026

[SW] init FFT coherence protection
HHT1228
committed
8d42ee6

Commits on Jul 10, 2026

[SW] FFT data generation change from .pdcp_src to .data (DRAM)
HHT1228
committed
fd06fda

Commits on Jul 13, 2026

MATMUL access misalignment fix
HHT1228
committed
6233342

Commits on Jul 14, 2026

[SW] gemv protection and fix
HHT1228
committed
8f87b20

Commits on Jul 15, 2026

[SW] fmamtul data alignment, def flag clean up for multiple kernels
HHT1228
committed
3845add

Commits on Jul 17, 2026

[HW] private L1 byte-enable fix
HHT1228
committed
3711453

Commits on Jul 20, 2026

Code clean-up and composed a note
HHT1228
committed
546a399
note adjust
HHT1228
committed
9de023c

Commits on Jul 23, 2026

[SW HW] re-route private L1 CMOs from peripheral to snitch CSR
HHT1228
committed
34f053b

Commits on Jul 24, 2026

Commits on Jul 30, 2026

[HW] HW code clean-up and cachepool_hpd_pkg created
HHT1228
committed
566dec5