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Rv64 fixes - #427

Merged

tinebp merged 30 commits into

masterfrom

rv64-fixes

Oct 13, 2026

Merged

Rv64 fixes#427
tinebp merged 30 commits into
masterfrom
rv64-fixes

Commits on Oct 6, 2026
- simx: deliver same-cycle channel events in the order they were sent
  
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Commits on Oct 8, 2026
- sw, tests: make device index math portable to RV64
  
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  cbd9cbe
Commits on Oct 10, 2026
- rtu: carry full-width scene and payload pointers on RV64
  
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  577a4af
- rtu: NaN-box single-precision slot reads into FP registers on RV64
  
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  9e90dab
- gfx: store the depth plane modulo 2^32 instead of converting out of range
  
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  127b039
- kernel: check vx_printf formats, and print vx_putint without a float detour
  
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  afd7acb
- sgemm_tcu_wg_dxa: widen the SW_LOAD_B index math, build SW_LOAD_A + SW_LOAD_B
  
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  2a8e29d
- tests: widen the index math of demo, fence, dogfood, softmax and sgemm_tcu
  
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  5d224d8
- Merge origin/master into rv64-fixes
  
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  5ad73c1
- rtu: carry the full scene address through the ray log and rt_replay
  
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  6c26b42
- config: hardware profiles shared by every flow
  
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  78dbecf
Commits on Oct 11, 2026
- build: restore the zero-warnings policy everywhere
  
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  7b91e0e
- gen_config: accept enum flag overrides whose value contains '_'
  
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  57f28d2
- caps: report exact warp, core and cluster counts
  
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  4b924f2
- runtime: VORTEX_VM_MEGAPAGE_HEAP maps the heap with superpages
  
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  5f6d3e1
- simx: widen the cache config's input count and pipeline latency
  
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  4dbb615
- lsu: declare the LMEM window parameters only when LMEM exists
  
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  325d685
- tests: guard the global index in vecadd, relu, dropout and minimal
  
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  1642289
- cache: admit LLC fills against the AMO writeback queue's room
  
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  997ee24
- sim: redesign the DRAM model: independent channels, refresh, configurable type
  
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  843536c
Commits on Oct 12, 2026
- profiles: add a100, h100, v100, rtx1080 and tinygpu; document profiles
  
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  0897cbd
- CHANGELOG: profiles, RV64 portability, zero warnings, DRAM model
  
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  21861d6
- ci: default GEM5_HOME to the configured tool directory
  
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  49613f8
- ci: re-record the rtlsim perf-gate baselines
  
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  1c6ef7e
- tests: compute dogfood's fused multiply-add references fused
  
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  2970e9d
- vm: share one VPN superpage mask function from the TLB package
  
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  0a46eef
- sim: configure the DRAM model from data-sheet values
  
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  f80af4c
- simx: issue warps with the RTL's greedy round-robin arbiter
  
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  03efecb
- simx: let a cache bank pipeline hold one request per stage
  
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  72b574b
- ci: re-record the rtlsim perf-gate baselines for the DRAM model
  
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  c068cea

Commits

Commits on Oct 6, 2026

Commits on Oct 8, 2026

Commits on Oct 10, 2026

Commits on Oct 11, 2026

Commits on Oct 12, 2026